Re: [PATCH v5 3/3] ARM: zynq: dt: Add I2C nodes to Zynq device tree
On 04/04/2014 11:27 PM, Soren Brinkmann wrote: > Signed-off-by: Soren Brinkmann > Tested-by: Michal Simek > --- > > Changes in v5: > - use lower case hex digits in 'reg' property > > Changes in v4: None > Changes in v3: None > Changes in v2: > - replace 'pmbus' with 'ti' in compatibility strings of UCD devices > > --- > arch/arm/boot/dts/zynq-7000.dtsi | 22 > arch/arm/boot/dts/zynq-zc702.dts | 76 > > arch/arm/boot/dts/zynq-zc706.dts | 68 +++ > 3 files changed, 166 insertions(+) Applied to zynq-dt branch. Thanks, Michal -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/ Maintainer of Linux kernel - Xilinx Zynq ARM architecture Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform signature.asc Description: OpenPGP digital signature
Re: [PATCH v5 3/3] ARM: zynq: dt: Add I2C nodes to Zynq device tree
On 04/04/2014 11:27 PM, Soren Brinkmann wrote: Signed-off-by: Soren Brinkmann soren.brinkm...@xilinx.com Tested-by: Michal Simek michal.si...@xilinx.com --- Changes in v5: - use lower case hex digits in 'reg' property Changes in v4: None Changes in v3: None Changes in v2: - replace 'pmbus' with 'ti' in compatibility strings of UCD devices --- arch/arm/boot/dts/zynq-7000.dtsi | 22 arch/arm/boot/dts/zynq-zc702.dts | 76 arch/arm/boot/dts/zynq-zc706.dts | 68 +++ 3 files changed, 166 insertions(+) Applied to zynq-dt branch. Thanks, Michal -- Michal Simek, Ing. (M.Eng), OpenPGP - KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/ Maintainer of Linux kernel - Xilinx Zynq ARM architecture Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform signature.asc Description: OpenPGP digital signature
[PATCH v5 3/3] ARM: zynq: dt: Add I2C nodes to Zynq device tree
Signed-off-by: Soren Brinkmann
Tested-by: Michal Simek
---
Changes in v5:
- use lower case hex digits in 'reg' property
Changes in v4: None
Changes in v3: None
Changes in v2:
- replace 'pmbus' with 'ti' in compatibility strings of UCD devices
---
arch/arm/boot/dts/zynq-7000.dtsi | 22
arch/arm/boot/dts/zynq-zc702.dts | 76
arch/arm/boot/dts/zynq-zc706.dts | 68 +++
3 files changed, 166 insertions(+)
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
index 789d0bacc110..7a7da1d45351 100644
--- a/arch/arm/boot/dts/zynq-7000.dtsi
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -54,6 +54,28 @@
interrupt-parent = <>;
ranges;
+ i2c0: zynq-i2c@e0004000 {
+ compatible = "cdns,i2c-r1p10";
+ status = "disabled";
+ clocks = < 38>;
+ interrupt-parent = <>;
+ interrupts = <0 25 4>;
+ reg = <0xe0004000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c1: zynq-i2c@e0005000 {
+ compatible = "cdns,i2c-r1p10";
+ status = "disabled";
+ clocks = < 39>;
+ interrupt-parent = <>;
+ interrupts = <0 48 4>;
+ reg = <0xe0005000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
intc: interrupt-controller@f8f01000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
diff --git a/arch/arm/boot/dts/zynq-zc702.dts b/arch/arm/boot/dts/zynq-zc702.dts
index c913f77a21eb..5e09cee33d42 100644
--- a/arch/arm/boot/dts/zynq-zc702.dts
+++ b/arch/arm/boot/dts/zynq-zc702.dts
@@ -34,6 +34,82 @@
phy-mode = "rgmii";
};
+ {
+ status = "okay";
+ clock-frequency = <40>;
+
+ i2cswitch@74 {
+ compatible = "nxp,pca9548";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x74>;
+
+ i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ si570: clock-generator@5d {
+ #clock-cells = <0>;
+ compatible = "silabs,si570";
+ temperature-stability = <50>;
+ reg = <0x5d>;
+ factory-fout = <15625>;
+ clock-frequency = <14850>;
+ };
+ };
+
+ i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ eeprom@54 {
+ compatible = "at,24c08";
+ reg = <0x54>;
+ };
+ };
+
+ i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ gpio@21 {
+ compatible = "ti,tca6416";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+ };
+
+ i2c@4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <4>;
+ rtc@51 {
+ compatible = "nxp,pcf8563";
+ reg = <0x51>;
+ };
+ };
+
+ i2c@7 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <7>;
+ hwmon@52 {
+ compatible = "ti,ucd9248";
+ reg = <52>;
+ };
+ hwmon@53 {
+ compatible = "ti,ucd9248";
+ reg = <53>;
+ };
+ hwmon@54 {
+ compatible = "ti,ucd9248";
+ reg = <54>;
+ };
+ };
+ };
+};
+
{
status = "okay";
};
diff --git a/arch/arm/boot/dts/zynq-zc706.dts b/arch/arm/boot/dts/zynq-zc706.dts
index 88f62c50382e..4cc9913078cd 100644
--- a/arch/arm/boot/dts/zynq-zc706.dts
+++ b/arch/arm/boot/dts/zynq-zc706.dts
@@ -35,6 +35,74 @@
phy-mode = "rgmii";
};
+ {
+ status = "okay";
+
[PATCH v5 3/3] ARM: zynq: dt: Add I2C nodes to Zynq device tree
Signed-off-by: Soren Brinkmann soren.brinkm...@xilinx.com
Tested-by: Michal Simek michal.si...@xilinx.com
---
Changes in v5:
- use lower case hex digits in 'reg' property
Changes in v4: None
Changes in v3: None
Changes in v2:
- replace 'pmbus' with 'ti' in compatibility strings of UCD devices
---
arch/arm/boot/dts/zynq-7000.dtsi | 22
arch/arm/boot/dts/zynq-zc702.dts | 76
arch/arm/boot/dts/zynq-zc706.dts | 68 +++
3 files changed, 166 insertions(+)
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
index 789d0bacc110..7a7da1d45351 100644
--- a/arch/arm/boot/dts/zynq-7000.dtsi
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -54,6 +54,28 @@
interrupt-parent = intc;
ranges;
+ i2c0: zynq-i2c@e0004000 {
+ compatible = cdns,i2c-r1p10;
+ status = disabled;
+ clocks = clkc 38;
+ interrupt-parent = intc;
+ interrupts = 0 25 4;
+ reg = 0xe0004000 0x1000;
+ #address-cells = 1;
+ #size-cells = 0;
+ };
+
+ i2c1: zynq-i2c@e0005000 {
+ compatible = cdns,i2c-r1p10;
+ status = disabled;
+ clocks = clkc 39;
+ interrupt-parent = intc;
+ interrupts = 0 48 4;
+ reg = 0xe0005000 0x1000;
+ #address-cells = 1;
+ #size-cells = 0;
+ };
+
intc: interrupt-controller@f8f01000 {
compatible = arm,cortex-a9-gic;
#interrupt-cells = 3;
diff --git a/arch/arm/boot/dts/zynq-zc702.dts b/arch/arm/boot/dts/zynq-zc702.dts
index c913f77a21eb..5e09cee33d42 100644
--- a/arch/arm/boot/dts/zynq-zc702.dts
+++ b/arch/arm/boot/dts/zynq-zc702.dts
@@ -34,6 +34,82 @@
phy-mode = rgmii;
};
+i2c0 {
+ status = okay;
+ clock-frequency = 40;
+
+ i2cswitch@74 {
+ compatible = nxp,pca9548;
+ #address-cells = 1;
+ #size-cells = 0;
+ reg = 0x74;
+
+ i2c@0 {
+ #address-cells = 1;
+ #size-cells = 0;
+ reg = 0;
+ si570: clock-generator@5d {
+ #clock-cells = 0;
+ compatible = silabs,si570;
+ temperature-stability = 50;
+ reg = 0x5d;
+ factory-fout = 15625;
+ clock-frequency = 14850;
+ };
+ };
+
+ i2c@2 {
+ #address-cells = 1;
+ #size-cells = 0;
+ reg = 2;
+ eeprom@54 {
+ compatible = at,24c08;
+ reg = 0x54;
+ };
+ };
+
+ i2c@3 {
+ #address-cells = 1;
+ #size-cells = 0;
+ reg = 3;
+ gpio@21 {
+ compatible = ti,tca6416;
+ reg = 0x21;
+ gpio-controller;
+ #gpio-cells = 2;
+ };
+ };
+
+ i2c@4 {
+ #address-cells = 1;
+ #size-cells = 0;
+ reg = 4;
+ rtc@51 {
+ compatible = nxp,pcf8563;
+ reg = 0x51;
+ };
+ };
+
+ i2c@7 {
+ #address-cells = 1;
+ #size-cells = 0;
+ reg = 7;
+ hwmon@52 {
+ compatible = ti,ucd9248;
+ reg = 52;
+ };
+ hwmon@53 {
+ compatible = ti,ucd9248;
+ reg = 53;
+ };
+ hwmon@54 {
+ compatible = ti,ucd9248;
+ reg = 54;
+ };
+ };
+ };
+};
+
sdhci0 {
status = okay;
};
diff --git a/arch/arm/boot/dts/zynq-zc706.dts b/arch/arm/boot/dts/zynq-zc706.dts
index 88f62c50382e..4cc9913078cd 100644
--- a/arch/arm/boot/dts/zynq-zc706.dts
+++ b/arch/arm/boot/dts/zynq-zc706.dts
@@ -35,6 +35,74 @@
phy-mode = rgmii;
};
+i2c0 {
+ status = okay;
+ clock-frequency = 40;
+
+
