subject:"\[PATCH v6 1\/5\] dt\-bindings\: iommu\: Add binding for mediatek IOMMU"

Re: [PATCH v6 1/5] dt-bindings: iommu: Add binding for mediatek IOMMU

2015-12-08 Thread Yong Wu

also add Mark.

On Tue, 2015-12-08 at 21:33 -0600, Rob Herring wrote:
> On Tue, Dec 08, 2015 at 05:49:09PM +0800, Yong Wu wrote:
> > This patch add mediatek iommu dts binding document.
> > 
> > Signed-off-by: Yong Wu 
> > ---
> >  .../devicetree/bindings/iommu/mediatek,iommu.txt   |  68 +
> >  include/dt-bindings/memory/mt8173-larb-port.h  | 111 
> > +
> 
> This should be iommu rather than memory.

Hi Rob,
   Thanks very much for review.

   From the HW, all the larbs and ports are defined in the SMI.
About the position of the SMI code, We also discussed before in [1].
So I put the header file in /dt-bindings/memory/.

This is a smi larb-port header file, maybe we should move this header
file into this patch:
[2/5] dt-bindings: mediatek: Add smi dts binding

is it ok if we move it into [2/5]?

[1]
http://lists.infradead.org/pipermail/linux-mediatek/2015-March/000121.html

> 
> Otherwise, it looks okay to me.

Thanks.

> 
> >  2 files changed, 179 insertions(+)
> >  create mode 100644 
> > Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
> >  create mode 100644 include/dt-bindings/memory/mt8173-larb-port.h

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Re: [PATCH v6 1/5] dt-bindings: iommu: Add binding for mediatek IOMMU

2015-12-08 Thread Rob Herring

On Tue, Dec 08, 2015 at 05:49:09PM +0800, Yong Wu wrote:
> This patch add mediatek iommu dts binding document.
> 
> Signed-off-by: Yong Wu 
> ---
>  .../devicetree/bindings/iommu/mediatek,iommu.txt   |  68 +
>  include/dt-bindings/memory/mt8173-larb-port.h  | 111 
> +

This should be iommu rather than memory.

Otherwise, it looks okay to me.

>  2 files changed, 179 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
>  create mode 100644 include/dt-bindings/memory/mt8173-larb-port.h
> 
> diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt 
> b/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
> new file mode 100644
> index 000..c2fb06e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
> @@ -0,0 +1,68 @@
> +* Mediatek IOMMU Architecture Implementation
> +
> +  Some Mediatek SOCs contain a Multimedia Memory Management Unit (M4U) which
> +uses the ARM Short-Descriptor translation table format for address 
> translation.
> +
> +  About the M4U Hardware Block Diagram, please check below:
> +
> +  EMI (External Memory Interface)
> +   |
> +  m4u (Multimedia Memory Management Unit)
> +   |
> +   SMI Common(Smart Multimedia Interface Common)
> +   |
> +   ++---
> +   ||
> +   ||
> +   SMI larb0SMI larb1   ... SoCs have several SMI local 
> arbiter(larb).
> +   (display) (vdec)
> +   ||
> +   ||
> + +-+-+ +++
> + | | | |||
> + | | |...  |||  ... There are different ports in each larb.
> + | | | |||
> +OVL0 RDMA0 WDMA0  MC   PP   VLD
> +
> +  As above, The Multimedia HW will go through SMI and M4U while it
> +access EMI. SMI is a brige between m4u and the Multimedia HW. It contain
> +smi local arbiter and smi common. It will control whether the Multimedia
> +HW should go though the m4u for translation or bypass it and talk
> +directly with EMI. And also SMI help control the power domain and clocks for
> +each local arbiter.
> +  Normally we specify a local arbiter(larb) for each multimedia HW
> +like display, video decode, and camera. And there are different ports
> +in each larb. Take a example, There are many ports like MC, PP, VLD in the
> +video decode local arbiter, all these ports are according to the video HW.
> +
> +Required properties:
> +- compatible : must be "mediatek,mt8173-m4u".
> +- reg : m4u register base and size.
> +- interrupts : the interrupt of m4u.
> +- clocks : must contain one entry for each clock-names.
> +- clock-names : must be "bclk", It is the block clock of m4u.
> +- mediatek,larbs : List of phandle to the local arbiters in the current Socs.
> + Refer to bindings/memory-controllers/mediatek,smi-larb.txt. It must sort
> + according to the local arbiter index, like larb0, larb1, larb2...
> +- iommu-cells : must be 1. This is the mtk_m4u_id according to the HW.
> + Specifies the mtk_m4u_id as defined in
> + dt-binding/memory/mt8173-larb-port.h.
> +
> +Example:
> + iommu: iommu@10205000 {
> + compatible = "mediatek,mt8173-m4u";
> + reg = <0 0x10205000 0 0x1000>;
> + interrupts = ;
> + clocks = < CLK_INFRA_M4U>;
> + clock-names = "bclk";
> + mediatek,larbs = < >;
> + #iommu-cells = <1>;
> + };
> +
> +Example for a client device:
> + display {
> + compatible = "mediatek,mt8173-disp";
> + iommus = < M4U_PORT_DISP_OVL0>,
> +  < M4U_PORT_DISP_RDMA0>;
> + ...
> + };
> diff --git a/include/dt-bindings/memory/mt8173-larb-port.h 
> b/include/dt-bindings/memory/mt8173-larb-port.h
> new file mode 100644
> index 000..50ccb93
> --- /dev/null
> +++ b/include/dt-bindings/memory/mt8173-larb-port.h
> @@ -0,0 +1,111 @@
> +/*
> + * Copyright (c) 2014-2015 MediaTek Inc.
> + * Author: Yong Wu 
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +#ifndef __DTS_IOMMU_PORT_MT8173_H
> +#define __DTS_IOMMU_PORT_MT8173_H
> +
> +#define MTK_M4U_ID(larb, port)   (((larb) << 5) | (port))
> +/* Local arbiter ID */
> +#define MTK_M4U_TO_LARB(id)  (((id) >> 5) & 0x7)
> +/* PortID within the local arbiter */
> +#define MTK_M4U_TO_PORT(id)  ((id) & 0x1f)
> +
> +#define M4U_LARB0_ID 0
>

[PATCH v6 1/5] dt-bindings: iommu: Add binding for mediatek IOMMU

2015-12-08 Thread Yong Wu

This patch add mediatek iommu dts binding document.

Signed-off-by: Yong Wu 
---
 .../devicetree/bindings/iommu/mediatek,iommu.txt   |  68 +
 include/dt-bindings/memory/mt8173-larb-port.h  | 111 +
 2 files changed, 179 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
 create mode 100644 include/dt-bindings/memory/mt8173-larb-port.h

diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt 
b/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
new file mode 100644
index 000..c2fb06e
--- /dev/null
+++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
@@ -0,0 +1,68 @@
+* Mediatek IOMMU Architecture Implementation
+
+  Some Mediatek SOCs contain a Multimedia Memory Management Unit (M4U) which
+uses the ARM Short-Descriptor translation table format for address translation.
+
+  About the M4U Hardware Block Diagram, please check below:
+
+  EMI (External Memory Interface)
+   |
+  m4u (Multimedia Memory Management Unit)
+   |
+   SMI Common(Smart Multimedia Interface Common)
+   |
+   ++---
+   ||
+   ||
+   SMI larb0SMI larb1   ... SoCs have several SMI local arbiter(larb).
+   (display) (vdec)
+   ||
+   ||
+ +-+-+ +++
+ | | | |||
+ | | |...  |||  ... There are different ports in each larb.
+ | | | |||
+OVL0 RDMA0 WDMA0  MC   PP   VLD
+
+  As above, The Multimedia HW will go through SMI and M4U while it
+access EMI. SMI is a brige between m4u and the Multimedia HW. It contain
+smi local arbiter and smi common. It will control whether the Multimedia
+HW should go though the m4u for translation or bypass it and talk
+directly with EMI. And also SMI help control the power domain and clocks for
+each local arbiter.
+  Normally we specify a local arbiter(larb) for each multimedia HW
+like display, video decode, and camera. And there are different ports
+in each larb. Take a example, There are many ports like MC, PP, VLD in the
+video decode local arbiter, all these ports are according to the video HW.
+
+Required properties:
+- compatible : must be "mediatek,mt8173-m4u".
+- reg : m4u register base and size.
+- interrupts : the interrupt of m4u.
+- clocks : must contain one entry for each clock-names.
+- clock-names : must be "bclk", It is the block clock of m4u.
+- mediatek,larbs : List of phandle to the local arbiters in the current Socs.
+   Refer to bindings/memory-controllers/mediatek,smi-larb.txt. It must sort
+   according to the local arbiter index, like larb0, larb1, larb2...
+- iommu-cells : must be 1. This is the mtk_m4u_id according to the HW.
+   Specifies the mtk_m4u_id as defined in
+   dt-binding/memory/mt8173-larb-port.h.
+
+Example:
+   iommu: iommu@10205000 {
+   compatible = "mediatek,mt8173-m4u";
+   reg = <0 0x10205000 0 0x1000>;
+   interrupts = ;
+   clocks = < CLK_INFRA_M4U>;
+   clock-names = "bclk";
+   mediatek,larbs = < >;
+   #iommu-cells = <1>;
+   };
+
+Example for a client device:
+   display {
+   compatible = "mediatek,mt8173-disp";
+   iommus = < M4U_PORT_DISP_OVL0>,
+< M4U_PORT_DISP_RDMA0>;
+   ...
+   };
diff --git a/include/dt-bindings/memory/mt8173-larb-port.h 
b/include/dt-bindings/memory/mt8173-larb-port.h
new file mode 100644
index 000..50ccb93
--- /dev/null
+++ b/include/dt-bindings/memory/mt8173-larb-port.h
@@ -0,0 +1,111 @@
+/*
+ * Copyright (c) 2014-2015 MediaTek Inc.
+ * Author: Yong Wu 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#ifndef __DTS_IOMMU_PORT_MT8173_H
+#define __DTS_IOMMU_PORT_MT8173_H
+
+#define MTK_M4U_ID(larb, port) (((larb) << 5) | (port))
+/* Local arbiter ID */
+#define MTK_M4U_TO_LARB(id)(((id) >> 5) & 0x7)
+/* PortID within the local arbiter */
+#define MTK_M4U_TO_PORT(id)((id) & 0x1f)
+
+#define M4U_LARB0_ID   0
+#define M4U_LARB1_ID   1
+#define M4U_LARB2_ID   2
+#define M4U_LARB3_ID   3
+#define M4U_LARB4_ID   4
+#define M4U_LARB5_ID   5
+
+/* larb0 */
+#define M4U_PORT_DISP_OVL0 MTK_M4U_ID(M4U_LARB0_ID, 0)
+#define M4U_PORT_DISP_RDMA0

[PATCH v6 1/5] dt-bindings: iommu: Add binding for mediatek IOMMU

2015-12-08 Thread Yong Wu

This patch add mediatek iommu dts binding document.

Signed-off-by: Yong Wu 
---
 .../devicetree/bindings/iommu/mediatek,iommu.txt   |  68 +
 include/dt-bindings/memory/mt8173-larb-port.h  | 111 +
 2 files changed, 179 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
 create mode 100644 include/dt-bindings/memory/mt8173-larb-port.h

diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt 
b/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
new file mode 100644
index 000..c2fb06e
--- /dev/null
+++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
@@ -0,0 +1,68 @@
+* Mediatek IOMMU Architecture Implementation
+
+  Some Mediatek SOCs contain a Multimedia Memory Management Unit (M4U) which
+uses the ARM Short-Descriptor translation table format for address translation.
+
+  About the M4U Hardware Block Diagram, please check below:
+
+  EMI (External Memory Interface)
+   |
+  m4u (Multimedia Memory Management Unit)
+   |
+   SMI Common(Smart Multimedia Interface Common)
+   |
+   ++---
+   ||
+   ||
+   SMI larb0SMI larb1   ... SoCs have several SMI local arbiter(larb).
+   (display) (vdec)
+   ||
+   ||
+ +-+-+ +++
+ | | | |||
+ | | |...  |||  ... There are different ports in each larb.
+ | | | |||
+OVL0 RDMA0 WDMA0  MC   PP   VLD
+
+  As above, The Multimedia HW will go through SMI and M4U while it
+access EMI. SMI is a brige between m4u and the Multimedia HW. It contain
+smi local arbiter and smi common. It will control whether the Multimedia
+HW should go though the m4u for translation or bypass it and talk
+directly with EMI. And also SMI help control the power domain and clocks for
+each local arbiter.
+  Normally we specify a local arbiter(larb) for each multimedia HW
+like display, video decode, and camera. And there are different ports
+in each larb. Take a example, There are many ports like MC, PP, VLD in the
+video decode local arbiter, all these ports are according to the video HW.
+
+Required properties:
+- compatible : must be "mediatek,mt8173-m4u".
+- reg : m4u register base and size.
+- interrupts : the interrupt of m4u.
+- clocks : must contain one entry for each clock-names.
+- clock-names : must be "bclk", It is the block clock of m4u.
+- mediatek,larbs : List of phandle to the local arbiters in the current Socs.
+   Refer to bindings/memory-controllers/mediatek,smi-larb.txt. It must sort
+   according to the local arbiter index, like larb0, larb1, larb2...
+- iommu-cells : must be 1. This is the mtk_m4u_id according to the HW.
+   Specifies the mtk_m4u_id as defined in
+   dt-binding/memory/mt8173-larb-port.h.
+
+Example:
+   iommu: iommu@10205000 {
+   compatible = "mediatek,mt8173-m4u";
+   reg = <0 0x10205000 0 0x1000>;
+   interrupts = ;
+   clocks = < CLK_INFRA_M4U>;
+   clock-names = "bclk";
+   mediatek,larbs = < >;
+   #iommu-cells = <1>;
+   };
+
+Example for a client device:
+   display {
+   compatible = "mediatek,mt8173-disp";
+   iommus = < M4U_PORT_DISP_OVL0>,
+< M4U_PORT_DISP_RDMA0>;
+   ...
+   };
diff --git a/include/dt-bindings/memory/mt8173-larb-port.h 
b/include/dt-bindings/memory/mt8173-larb-port.h
new file mode 100644
index 000..50ccb93
--- /dev/null
+++ b/include/dt-bindings/memory/mt8173-larb-port.h
@@ -0,0 +1,111 @@
+/*
+ * Copyright (c) 2014-2015 MediaTek Inc.
+ * Author: Yong Wu 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#ifndef __DTS_IOMMU_PORT_MT8173_H
+#define __DTS_IOMMU_PORT_MT8173_H
+
+#define MTK_M4U_ID(larb, port) (((larb) << 5) | (port))
+/* Local arbiter ID */
+#define MTK_M4U_TO_LARB(id)(((id) >> 5) & 0x7)
+/* PortID within the local arbiter */
+#define MTK_M4U_TO_PORT(id)((id) & 0x1f)
+
+#define M4U_LARB0_ID   0
+#define M4U_LARB1_ID   1
+#define M4U_LARB2_ID   2
+#define M4U_LARB3_ID   3
+#define M4U_LARB4_ID   4
+#define M4U_LARB5_ID   5
+
+/* larb0 */
+#define M4U_PORT_DISP_OVL0 MTK_M4U_ID(M4U_LARB0_ID, 0)

Re: [PATCH v6 1/5] dt-bindings: iommu: Add binding for mediatek IOMMU

2015-12-08 Thread Yong Wu

also add Mark.

On Tue, 2015-12-08 at 21:33 -0600, Rob Herring wrote:
> On Tue, Dec 08, 2015 at 05:49:09PM +0800, Yong Wu wrote:
> > This patch add mediatek iommu dts binding document.
> > 
> > Signed-off-by: Yong Wu 
> > ---
> >  .../devicetree/bindings/iommu/mediatek,iommu.txt   |  68 +
> >  include/dt-bindings/memory/mt8173-larb-port.h  | 111 
> > +
> 
> This should be iommu rather than memory.

Hi Rob,
   Thanks very much for review.

   From the HW, all the larbs and ports are defined in the SMI.
About the position of the SMI code, We also discussed before in [1].
So I put the header file in /dt-bindings/memory/.

This is a smi larb-port header file, maybe we should move this header
file into this patch:
[2/5] dt-bindings: mediatek: Add smi dts binding

is it ok if we move it into [2/5]?

[1]
http://lists.infradead.org/pipermail/linux-mediatek/2015-March/000121.html

> 
> Otherwise, it looks okay to me.

Thanks.

> 
> >  2 files changed, 179 insertions(+)
> >  create mode 100644 
> > Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
> >  create mode 100644 include/dt-bindings/memory/mt8173-larb-port.h

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Re: [PATCH v6 1/5] dt-bindings: iommu: Add binding for mediatek IOMMU

2015-12-08 Thread Rob Herring

On Tue, Dec 08, 2015 at 05:49:09PM +0800, Yong Wu wrote:
> This patch add mediatek iommu dts binding document.
> 
> Signed-off-by: Yong Wu 
> ---
>  .../devicetree/bindings/iommu/mediatek,iommu.txt   |  68 +
>  include/dt-bindings/memory/mt8173-larb-port.h  | 111 
> +

This should be iommu rather than memory.

Otherwise, it looks okay to me.

>  2 files changed, 179 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
>  create mode 100644 include/dt-bindings/memory/mt8173-larb-port.h
> 
> diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt 
> b/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
> new file mode 100644
> index 000..c2fb06e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
> @@ -0,0 +1,68 @@
> +* Mediatek IOMMU Architecture Implementation
> +
> +  Some Mediatek SOCs contain a Multimedia Memory Management Unit (M4U) which
> +uses the ARM Short-Descriptor translation table format for address 
> translation.
> +
> +  About the M4U Hardware Block Diagram, please check below:
> +
> +  EMI (External Memory Interface)
> +   |
> +  m4u (Multimedia Memory Management Unit)
> +   |
> +   SMI Common(Smart Multimedia Interface Common)
> +   |
> +   ++---
> +   ||
> +   ||
> +   SMI larb0SMI larb1   ... SoCs have several SMI local 
> arbiter(larb).
> +   (display) (vdec)
> +   ||
> +   ||
> + +-+-+ +++
> + | | | |||
> + | | |...  |||  ... There are different ports in each larb.
> + | | | |||
> +OVL0 RDMA0 WDMA0  MC   PP   VLD
> +
> +  As above, The Multimedia HW will go through SMI and M4U while it
> +access EMI. SMI is a brige between m4u and the Multimedia HW. It contain
> +smi local arbiter and smi common. It will control whether the Multimedia
> +HW should go though the m4u for translation or bypass it and talk
> +directly with EMI. And also SMI help control the power domain and clocks for
> +each local arbiter.
> +  Normally we specify a local arbiter(larb) for each multimedia HW
> +like display, video decode, and camera. And there are different ports
> +in each larb. Take a example, There are many ports like MC, PP, VLD in the
> +video decode local arbiter, all these ports are according to the video HW.
> +
> +Required properties:
> +- compatible : must be "mediatek,mt8173-m4u".
> +- reg : m4u register base and size.
> +- interrupts : the interrupt of m4u.
> +- clocks : must contain one entry for each clock-names.
> +- clock-names : must be "bclk", It is the block clock of m4u.
> +- mediatek,larbs : List of phandle to the local arbiters in the current Socs.
> + Refer to bindings/memory-controllers/mediatek,smi-larb.txt. It must sort
> + according to the local arbiter index, like larb0, larb1, larb2...
> +- iommu-cells : must be 1. This is the mtk_m4u_id according to the HW.
> + Specifies the mtk_m4u_id as defined in
> + dt-binding/memory/mt8173-larb-port.h.
> +
> +Example:
> + iommu: iommu@10205000 {
> + compatible = "mediatek,mt8173-m4u";
> + reg = <0 0x10205000 0 0x1000>;
> + interrupts = ;
> + clocks = < CLK_INFRA_M4U>;
> + clock-names = "bclk";
> + mediatek,larbs = < >;
> + #iommu-cells = <1>;
> + };
> +
> +Example for a client device:
> + display {
> + compatible = "mediatek,mt8173-disp";
> + iommus = < M4U_PORT_DISP_OVL0>,
> +  < M4U_PORT_DISP_RDMA0>;
> + ...
> + };
> diff --git a/include/dt-bindings/memory/mt8173-larb-port.h 
> b/include/dt-bindings/memory/mt8173-larb-port.h
> new file mode 100644
> index 000..50ccb93
> --- /dev/null
> +++ b/include/dt-bindings/memory/mt8173-larb-port.h
> @@ -0,0 +1,111 @@
> +/*
> + * Copyright (c) 2014-2015 MediaTek Inc.
> + * Author: Yong Wu 
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +#ifndef __DTS_IOMMU_PORT_MT8173_H
> +#define __DTS_IOMMU_PORT_MT8173_H
> +
> +#define MTK_M4U_ID(larb, port)   (((larb) << 5) | (port))
> +/* Local arbiter ID */
> +#define MTK_M4U_TO_LARB(id)  (((id) >> 5) & 0x7)
> +/* PortID within the local arbiter */
> +#define MTK_M4U_TO_PORT(id)  ((id) & 0x1f)
> +
>

Re: [PATCH v6 1/5] dt-bindings: iommu: Add binding for mediatek IOMMU

Re: [PATCH v6 1/5] dt-bindings: iommu: Add binding for mediatek IOMMU

[PATCH v6 1/5] dt-bindings: iommu: Add binding for mediatek IOMMU

[PATCH v6 1/5] dt-bindings: iommu: Add binding for mediatek IOMMU

Re: [PATCH v6 1/5] dt-bindings: iommu: Add binding for mediatek IOMMU

Re: [PATCH v6 1/5] dt-bindings: iommu: Add binding for mediatek IOMMU

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