Re: [PATCH v6 2/2] Documentation: fpga: dfl: Add description for DFL UIO support

2021-01-17 Thread Xu Yilun
On Sat, Jan 16, 2021 at 07:57:48PM -0800, Moritz Fischer wrote:
> Hi Xu,
> 
> On Wed, Jan 13, 2021 at 09:54:08AM +0800, Xu Yilun wrote:
> > This patch adds description for UIO support for dfl devices on DFL
> > bus.
> > 
> > Signed-off-by: Xu Yilun 
> > ---
> > v2: no doc in v1, add it for v2.
> > v3: some documentation fixes.
> > v4: documentation change since the driver matching is changed.
> > v5: no change.
> > v6: improve the title of the userspace driver support section.
> > some word improvement.
> > ---
> >  Documentation/fpga/dfl.rst | 24 
> >  1 file changed, 24 insertions(+)
> > 
> > diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst
> > index 0404fe6..c33b6d0 100644
> > --- a/Documentation/fpga/dfl.rst
> > +++ b/Documentation/fpga/dfl.rst
> > @@ -7,6 +7,7 @@ Authors:
> >  - Enno Luebbers 
> >  - Xiao Guangrong 
> >  - Wu Hao 
> > +- Xu Yilun 
> >  
> >  The Device Feature List (DFL) FPGA framework (and drivers according to
> >  this framework) hides the very details of low layer hardwares and provides
> > @@ -502,6 +503,29 @@ FME Partial Reconfiguration Sub Feature driver (see 
> > drivers/fpga/dfl-fme-pr.c)
> >  could be a reference.
> >  
> >  
> > +Userspace driver support for DFL devices
> > +
> > +The purpose of an FPGA is to be reprogrammed with newly developed hardware
> > +components. New hardware can instantiate a new private feature in the DFL, 
> > and
> > +then get a DFL device in their system. In some cases users may need a 
> > userspace
> > +driver for the DFL device:
> > +
> > +* Users may need to run some diagnostic test for their hardwares.
> > +* Users may prototype the kernel driver in user space.
> > +* Some hardware is designed for specific purposes and does not fit into 
> > one of
> > +  the standard kernel subsystems.
> > +
> > +This requires direct access to MMIO space and interrupt handling from
> > +userspace. The dfl-uio-pdev module exposes the UIO device interfaces for 
> > this
> > +purpose. It adds the uio_pdrv_genirq platform device with the resources of
> > +the DFL feature, and lets the generic UIO platform device driver provide 
> > UIO
> > +support to userspace.
> > +
> > +FPGA_DFL_UIO_PDEV should be selected to enable the dfl-uio-pdev module 
> > driver.
> > +To support a new DFL feature been directly accessed via UIO, its feature id
> > +should be added to the driver's id_table.
> > +
> > +
> >  Open discussion
> >  ===
> >  FME driver exports one ioctl (DFL_FPGA_FME_PORT_PR) for partial 
> > reconfiguration
> > -- 
> > 2.7.4
> > 
> 
> Looks fine to me, can you resend with changes for the other patch?

Yes, I will. I may wait for a while to check more comments from Greg.

Thanks,
Yilun


Re: [PATCH v6 2/2] Documentation: fpga: dfl: Add description for DFL UIO support

2021-01-16 Thread Moritz Fischer
Hi Xu,

On Wed, Jan 13, 2021 at 09:54:08AM +0800, Xu Yilun wrote:
> This patch adds description for UIO support for dfl devices on DFL
> bus.
> 
> Signed-off-by: Xu Yilun 
> ---
> v2: no doc in v1, add it for v2.
> v3: some documentation fixes.
> v4: documentation change since the driver matching is changed.
> v5: no change.
> v6: improve the title of the userspace driver support section.
> some word improvement.
> ---
>  Documentation/fpga/dfl.rst | 24 
>  1 file changed, 24 insertions(+)
> 
> diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst
> index 0404fe6..c33b6d0 100644
> --- a/Documentation/fpga/dfl.rst
> +++ b/Documentation/fpga/dfl.rst
> @@ -7,6 +7,7 @@ Authors:
>  - Enno Luebbers 
>  - Xiao Guangrong 
>  - Wu Hao 
> +- Xu Yilun 
>  
>  The Device Feature List (DFL) FPGA framework (and drivers according to
>  this framework) hides the very details of low layer hardwares and provides
> @@ -502,6 +503,29 @@ FME Partial Reconfiguration Sub Feature driver (see 
> drivers/fpga/dfl-fme-pr.c)
>  could be a reference.
>  
>  
> +Userspace driver support for DFL devices
> +
> +The purpose of an FPGA is to be reprogrammed with newly developed hardware
> +components. New hardware can instantiate a new private feature in the DFL, 
> and
> +then get a DFL device in their system. In some cases users may need a 
> userspace
> +driver for the DFL device:
> +
> +* Users may need to run some diagnostic test for their hardwares.
> +* Users may prototype the kernel driver in user space.
> +* Some hardware is designed for specific purposes and does not fit into one 
> of
> +  the standard kernel subsystems.
> +
> +This requires direct access to MMIO space and interrupt handling from
> +userspace. The dfl-uio-pdev module exposes the UIO device interfaces for this
> +purpose. It adds the uio_pdrv_genirq platform device with the resources of
> +the DFL feature, and lets the generic UIO platform device driver provide UIO
> +support to userspace.
> +
> +FPGA_DFL_UIO_PDEV should be selected to enable the dfl-uio-pdev module 
> driver.
> +To support a new DFL feature been directly accessed via UIO, its feature id
> +should be added to the driver's id_table.
> +
> +
>  Open discussion
>  ===
>  FME driver exports one ioctl (DFL_FPGA_FME_PORT_PR) for partial 
> reconfiguration
> -- 
> 2.7.4
> 

Looks fine to me, can you resend with changes for the other patch?

- Moritz


[PATCH v6 2/2] Documentation: fpga: dfl: Add description for DFL UIO support

2021-01-12 Thread Xu Yilun
This patch adds description for UIO support for dfl devices on DFL
bus.

Signed-off-by: Xu Yilun 
---
v2: no doc in v1, add it for v2.
v3: some documentation fixes.
v4: documentation change since the driver matching is changed.
v5: no change.
v6: improve the title of the userspace driver support section.
some word improvement.
---
 Documentation/fpga/dfl.rst | 24 
 1 file changed, 24 insertions(+)

diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst
index 0404fe6..c33b6d0 100644
--- a/Documentation/fpga/dfl.rst
+++ b/Documentation/fpga/dfl.rst
@@ -7,6 +7,7 @@ Authors:
 - Enno Luebbers 
 - Xiao Guangrong 
 - Wu Hao 
+- Xu Yilun 
 
 The Device Feature List (DFL) FPGA framework (and drivers according to
 this framework) hides the very details of low layer hardwares and provides
@@ -502,6 +503,29 @@ FME Partial Reconfiguration Sub Feature driver (see 
drivers/fpga/dfl-fme-pr.c)
 could be a reference.
 
 
+Userspace driver support for DFL devices
+
+The purpose of an FPGA is to be reprogrammed with newly developed hardware
+components. New hardware can instantiate a new private feature in the DFL, and
+then get a DFL device in their system. In some cases users may need a userspace
+driver for the DFL device:
+
+* Users may need to run some diagnostic test for their hardwares.
+* Users may prototype the kernel driver in user space.
+* Some hardware is designed for specific purposes and does not fit into one of
+  the standard kernel subsystems.
+
+This requires direct access to MMIO space and interrupt handling from
+userspace. The dfl-uio-pdev module exposes the UIO device interfaces for this
+purpose. It adds the uio_pdrv_genirq platform device with the resources of
+the DFL feature, and lets the generic UIO platform device driver provide UIO
+support to userspace.
+
+FPGA_DFL_UIO_PDEV should be selected to enable the dfl-uio-pdev module driver.
+To support a new DFL feature been directly accessed via UIO, its feature id
+should be added to the driver's id_table.
+
+
 Open discussion
 ===
 FME driver exports one ioctl (DFL_FPGA_FME_PORT_PR) for partial reconfiguration
-- 
2.7.4