STM32 F7/H7 usarts supports RX & TX pin swapping.
Add option to turn it on.
Tested on STM32MP157.

Signed-off-by: Martin Devera <de...@eaxlabs.cz>
Acked-by: Fabrice Gasnier <fabrice.gasn...@foss.st.com>
---
v6: 
  - add version changelog
v4:
  - delete superfluous has_swap=false
v3:
  - add has_swap to stm32_usart_info (because F4 line
    doesn't support swapping)
  - move swap variable init from stm32_usart_of_get_port
    to stm32_usart_init_port because info struct is not
    initialized in stm32_usart_of_get_port yet
  - set USART_CR2_SWAP in stm32_usart_startup too
v2:
  - change st,swap to rx-tx-swap (pointed out by Rob Herring)
  - rebase patches as suggested by Greg Kroah-Hartman
---
 drivers/tty/serial/stm32-usart.c | 11 ++++++++++-
 drivers/tty/serial/stm32-usart.h |  4 ++++
 2 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index b3675cf25a69..d390f7da1441 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -644,6 +644,12 @@ static int stm32_usart_startup(struct uart_port *port)
        if (ret)
                return ret;
 
+       if (stm32_port->swap) {
+               val = readl_relaxed(port->membase + ofs->cr2);
+               val |= USART_CR2_SWAP;
+               writel_relaxed(val, port->membase + ofs->cr2);
+       }
+
        /* RX FIFO Flush */
        if (ofs->rqr != UNDEF_REG)
                stm32_usart_set_bits(port, ofs->rqr, USART_RQR_RXFRQ);
@@ -758,7 +764,7 @@ static void stm32_usart_set_termios(struct uart_port *port,
        cr1 = USART_CR1_TE | USART_CR1_RE;
        if (stm32_port->fifoen)
                cr1 |= USART_CR1_FIFOEN;
-       cr2 = 0;
+       cr2 = stm32_port->swap ? USART_CR2_SWAP : 0;
        cr3 = readl_relaxed(port->membase + ofs->cr3);
        cr3 &= USART_CR3_TXFTIE | USART_CR3_RXFTCFG_MASK | USART_CR3_RXFTIE
                | USART_CR3_TXFTCFG_MASK;
@@ -1006,6 +1012,9 @@ static int stm32_usart_init_port(struct stm32_port 
*stm32port,
                        return stm32port->wakeirq ? : -ENODEV;
        }
 
+       stm32port->swap = stm32port->info->cfg.has_swap &&
+               of_property_read_bool(pdev->dev.of_node, "rx-tx-swap");
+
        stm32port->fifoen = stm32port->info->cfg.has_fifo;
 
        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h
index cb4f327c46db..a85391e71e8e 100644
--- a/drivers/tty/serial/stm32-usart.h
+++ b/drivers/tty/serial/stm32-usart.h
@@ -25,6 +25,7 @@ struct stm32_usart_offsets {
 struct stm32_usart_config {
        u8 uart_enable_bit; /* USART_CR1_UE */
        bool has_7bits_data;
+       bool has_swap;
        bool has_wakeup;
        bool has_fifo;
        int fifosize;
@@ -76,6 +77,7 @@ struct stm32_usart_info stm32f7_info = {
        .cfg = {
                .uart_enable_bit = 0,
                .has_7bits_data = true,
+               .has_swap = true,
                .fifosize = 1,
        }
 };
@@ -97,6 +99,7 @@ struct stm32_usart_info stm32h7_info = {
        .cfg = {
                .uart_enable_bit = 0,
                .has_7bits_data = true,
+               .has_swap = true,
                .has_wakeup = true,
                .has_fifo = true,
                .fifosize = 16,
@@ -271,6 +274,7 @@ struct stm32_port {
        int last_res;
        bool tx_dma_busy;        /* dma tx busy               */
        bool hw_flow_control;
+       bool swap;               /* swap RX & TX pins */
        bool fifoen;
        int wakeirq;
        int rdr_mask;           /* receive data register mask */
-- 
2.11.0

Reply via email to