Am Mittwoch, 17. August 2016, 06:36:24 CEST schrieb Lin Huang:
> add ddrc clock setting, so we can do ddr frequency
> scaling on rk3399 platform in future.
>
> Signed-off-by: Lin Huang
> ---
> Changes in v6:
> - None
>
> Changes in v5:
> - fit for the ddr type
>
> Changes in v4:
> - None
>
> C
add ddrc clock setting, so we can do ddr frequency
scaling on rk3399 platform in future.
Signed-off-by: Lin Huang
---
Changes in v6:
- None
Changes in v5:
- fit for the ddr type
Changes in v4:
- None
Changes in v3:
- None
Changes in v2:
- remove clk_ddrc_dpll_src from critical clock list
Cha
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