Re: [PATCH v7 1/6] x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

On Wed, 28 Sep 2016, Tan Jui Nee wrote: > arch/x86/Kconfig | 4 ++ > arch/x86/include/asm/p2sb.h | 27 +++ > arch/x86/platform/intel/Makefile | 1 + > arch/x86/platform/intel/p2sb.c | 98 > I think this should go into

Re: [PATCH v7 1/6] x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

On Wed, 28 Sep 2016, Tan Jui Nee wrote: > arch/x86/Kconfig | 4 ++ > arch/x86/include/asm/p2sb.h | 27 +++ > arch/x86/platform/intel/Makefile | 1 + > arch/x86/platform/intel/p2sb.c | 98 > I think this should go into

[PATCH v7 1/6] x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

From: Andy Shevchenko There is already one and at least one more user coming which require an access to Primary to Sideband bridge (P2SB) in order to get IO or MMIO bar hidden by BIOS. Create a driver to access P2SB for x86 devices. Signed-off-by: Yong,

[PATCH v7 1/6] x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

From: Andy Shevchenko There is already one and at least one more user coming which require an access to Primary to Sideband bridge (P2SB) in order to get IO or MMIO bar hidden by BIOS. Create a driver to access P2SB for x86 devices. Signed-off-by: Yong, Jonathan Signed-off-by: Andy Shevchenko