On Tue, Apr 16, 2013 at 06:37:05PM +0200, Joerg Roedel wrote:
> On Tue, Apr 16, 2013 at 09:35:56AM -0400, Neil Horman wrote:
> > Actually, hold on that last note, the intel iommu init code doesn't seem to
> > create any direct relationship between the set of iommu's and the pci_dev's
> > that
> >
On Tue, Apr 16, 2013 at 09:35:56AM -0400, Neil Horman wrote:
> Actually, hold on that last note, the intel iommu init code doesn't seem to
> create any direct relationship between the set of iommu's and the pci_dev's
> that
> implement them. In the intel_irq_remapping_supported path I can loop
On Tue, Apr 16, 2013 at 12:24:54PM +0200, Joerg Roedel wrote:
> On Mon, Apr 15, 2013 at 06:41:17PM -0400, Neil Horman wrote:
> > +#ifdef CONFIG_IRQ_REMAP
> > +static void __init intel_remapping_check(int num, int slot, int func)
> > +{
> > + u8 revision;
> > +
> > + revision =
On Tue, Apr 16, 2013 at 12:24:54PM +0200, Joerg Roedel wrote:
> On Mon, Apr 15, 2013 at 06:41:17PM -0400, Neil Horman wrote:
> > +#ifdef CONFIG_IRQ_REMAP
> > +static void __init intel_remapping_check(int num, int slot, int func)
> > +{
> > + u8 revision;
> > +
> > + revision =
On Mon, Apr 15, 2013 at 06:41:17PM -0400, Neil Horman wrote:
> +#ifdef CONFIG_IRQ_REMAP
> +static void __init intel_remapping_check(int num, int slot, int func)
> +{
> + u8 revision;
> +
> + revision = read_pci_config_byte(num, slot, func, PCI_REVISION_ID);
> +
> + /*
> + *
On Tuesday 16 of April 2013, Neil Horman wrote:
> A few years back intel published a spec update:
> http://www.intel.com/content/dam/doc/specification-update/5520-and-5500-chi
> pset-ioh-specification-update.pdf
>
> For the 5520 and 5500 chipsets which contained an errata (specificially
> errata
On Tuesday 16 of April 2013, Neil Horman wrote:
A few years back intel published a spec update:
http://www.intel.com/content/dam/doc/specification-update/5520-and-5500-chi
pset-ioh-specification-update.pdf
For the 5520 and 5500 chipsets which contained an errata (specificially
errata 53),
On Mon, Apr 15, 2013 at 06:41:17PM -0400, Neil Horman wrote:
+#ifdef CONFIG_IRQ_REMAP
+static void __init intel_remapping_check(int num, int slot, int func)
+{
+ u8 revision;
+
+ revision = read_pci_config_byte(num, slot, func, PCI_REVISION_ID);
+
+ /*
+ * Revision 0x13
On Tue, Apr 16, 2013 at 12:24:54PM +0200, Joerg Roedel wrote:
On Mon, Apr 15, 2013 at 06:41:17PM -0400, Neil Horman wrote:
+#ifdef CONFIG_IRQ_REMAP
+static void __init intel_remapping_check(int num, int slot, int func)
+{
+ u8 revision;
+
+ revision = read_pci_config_byte(num,
On Tue, Apr 16, 2013 at 12:24:54PM +0200, Joerg Roedel wrote:
On Mon, Apr 15, 2013 at 06:41:17PM -0400, Neil Horman wrote:
+#ifdef CONFIG_IRQ_REMAP
+static void __init intel_remapping_check(int num, int slot, int func)
+{
+ u8 revision;
+
+ revision = read_pci_config_byte(num,
On Tue, Apr 16, 2013 at 09:35:56AM -0400, Neil Horman wrote:
Actually, hold on that last note, the intel iommu init code doesn't seem to
create any direct relationship between the set of iommu's and the pci_dev's
that
implement them. In the intel_irq_remapping_supported path I can loop over
On Tue, Apr 16, 2013 at 06:37:05PM +0200, Joerg Roedel wrote:
On Tue, Apr 16, 2013 at 09:35:56AM -0400, Neil Horman wrote:
Actually, hold on that last note, the intel iommu init code doesn't seem to
create any direct relationship between the set of iommu's and the pci_dev's
that
On Mon, Apr 15, 2013 at 04:02:56PM -0700, Yinghai Lu wrote:
> On Mon, Apr 15, 2013 at 3:41 PM, Neil Horman wrote:
> > A few years back intel published a spec update:
> > http://www.intel.com/content/dam/doc/specification-update/5520-and-5500-chipset-ioh-specification-update.pdf
> >
>
> > diff
On Mon, Apr 15, 2013 at 3:41 PM, Neil Horman wrote:
> A few years back intel published a spec update:
> http://www.intel.com/content/dam/doc/specification-update/5520-and-5500-chipset-ioh-specification-update.pdf
>
> For the 5520 and 5500 chipsets which contained an errata (specificially errata
>
A few years back intel published a spec update:
http://www.intel.com/content/dam/doc/specification-update/5520-and-5500-chipset-ioh-specification-update.pdf
For the 5520 and 5500 chipsets which contained an errata (specificially errata
53), which noted that these chipsets can't properly do
A few years back intel published a spec update:
http://www.intel.com/content/dam/doc/specification-update/5520-and-5500-chipset-ioh-specification-update.pdf
For the 5520 and 5500 chipsets which contained an errata (specificially errata
53), which noted that these chipsets can't properly do
On Mon, Apr 15, 2013 at 3:41 PM, Neil Horman nhor...@tuxdriver.com wrote:
A few years back intel published a spec update:
http://www.intel.com/content/dam/doc/specification-update/5520-and-5500-chipset-ioh-specification-update.pdf
For the 5520 and 5500 chipsets which contained an errata
On Mon, Apr 15, 2013 at 04:02:56PM -0700, Yinghai Lu wrote:
On Mon, Apr 15, 2013 at 3:41 PM, Neil Horman nhor...@tuxdriver.com wrote:
A few years back intel published a spec update:
http://www.intel.com/content/dam/doc/specification-update/5520-and-5500-chipset-ioh-specification-update.pdf
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