Re: [PATCH v9 01/15] ARM: Add Krait L2 register accessor functions

2018-06-01 Thread Stephen Boyd
Quoting Sricharan R (2018-06-01 06:20:37) > Hi Stephen, > > On 5/31/2018 1:11 PM, Stephen Boyd wrote: > > > > Ok. One general comment is that it would be nice if the bindings for all > > the nodes that are introduced included 'clocks' properties and also > > maybe 'clock-names' properties for the

Re: [PATCH v9 01/15] ARM: Add Krait L2 register accessor functions

2018-06-01 Thread Sricharan R
Hi Stephen, On 5/31/2018 1:11 PM, Stephen Boyd wrote: > Quoting Sricharan R (2018-05-30 21:57:20) >> Hi Stephen, >> >> On 5/30/2018 9:25 PM, Stephen Boyd wrote: >>> Quoting Sricharan R (2018-05-24 22:40:11) Hi Bjorn, On 5/24/2018 11:09 PM, Bjorn Andersson wrote: > On Tue 06 Mar

Re: [PATCH v9 01/15] ARM: Add Krait L2 register accessor functions

2018-05-31 Thread Stephen Boyd
Quoting Sricharan R (2018-05-30 21:57:20) > Hi Stephen, > > On 5/30/2018 9:25 PM, Stephen Boyd wrote: > > Quoting Sricharan R (2018-05-24 22:40:11) > >> Hi Bjorn, > >> > >> On 5/24/2018 11:09 PM, Bjorn Andersson wrote: > >>> On Tue 06 Mar 06:38 PST 2018, Sricharan R wrote: > >>> > From: Steph

Re: [PATCH v9 01/15] ARM: Add Krait L2 register accessor functions

2018-05-30 Thread Sricharan R
Hi Stephen, On 5/30/2018 9:25 PM, Stephen Boyd wrote: > Quoting Sricharan R (2018-05-24 22:40:11) >> Hi Bjorn, >> >> On 5/24/2018 11:09 PM, Bjorn Andersson wrote: >>> On Tue 06 Mar 06:38 PST 2018, Sricharan R wrote: >>> From: Stephen Boyd Krait CPUs have a handful of L2 cache contr

Re: [PATCH v9 01/15] ARM: Add Krait L2 register accessor functions

2018-05-30 Thread Stephen Boyd
Quoting Sricharan R (2018-05-24 22:40:11) > Hi Bjorn, > > On 5/24/2018 11:09 PM, Bjorn Andersson wrote: > > On Tue 06 Mar 06:38 PST 2018, Sricharan R wrote: > > > >> From: Stephen Boyd > >> > >> Krait CPUs have a handful of L2 cache controller registers that > >> live behind a cp15 based indirec

Re: [PATCH v9 01/15] ARM: Add Krait L2 register accessor functions

2018-05-24 Thread Sricharan R
Hi Bjorn, On 5/24/2018 11:09 PM, Bjorn Andersson wrote: > On Tue 06 Mar 06:38 PST 2018, Sricharan R wrote: > >> From: Stephen Boyd >> >> Krait CPUs have a handful of L2 cache controller registers that >> live behind a cp15 based indirection register. First you program >> the indirection register

Re: [PATCH v9 01/15] ARM: Add Krait L2 register accessor functions

2018-05-24 Thread Bjorn Andersson
On Tue 06 Mar 06:38 PST 2018, Sricharan R wrote: > From: Stephen Boyd > > Krait CPUs have a handful of L2 cache controller registers that > live behind a cp15 based indirection register. First you program > the indirection register (l2cpselr) to point the L2 'window' > register (l2cpdr) at what

[PATCH v9 01/15] ARM: Add Krait L2 register accessor functions

2018-03-06 Thread Sricharan R
From: Stephen Boyd Krait CPUs have a handful of L2 cache controller registers that live behind a cp15 based indirection register. First you program the indirection register (l2cpselr) to point the L2 'window' register (l2cpdr) at what you want to read/write. Then you read/write the 'window' regi