On Wed, 28 May 2014, Thomas Gleixner wrote:
> On Wed, 28 May 2014, Jiang Liu wrote:
> > This is used to work around special non-ISA interrupts with GSI below
> > NR_IRQS_LEGACY. The original code for the special case is:
> > /*
> > * Provide an identity mapping of gsi == irq except on truly
> > *
On Wed, 28 May 2014, Jiang Liu wrote:
> On 2014/5/28 3:58, Thomas Gleixner wrote:
> > So you have these cases covered here:
> >
> > 1) The ACPI case of secondary ioapics. You only have the strict 1:1
> >mapping for the first ioapic
> >
> > 2) The gsi < NR_IRQS_LEGACY case where you have two o
On 05/28/2014 12:07 PM, Thomas Gleixner wrote:
>
> Right, so it needs the setup of irq 0 and that only happens when the
> legacy_pic->nr_legacy_irqs > 0.
>
> Do you remember, why we switch to the null_pic later on?
According to my memory all interrupts are serviced by the IOAPIC. The
first 16 by
On Wed, 28 May 2014, Sebastian Andrzej Siewior wrote:
> On 05/27/2014 09:58 PM, Thomas Gleixner wrote:
> > ce4100 is an oddball though. The ioapic is registered way before the
> > interrupt subsystem is initialized and I have a hard time to
> > understand that comment:
> >
> > /* We can't
On 05/27/2014 09:58 PM, Thomas Gleixner wrote:
> ce4100 is an oddball though. The ioapic is registered way before the
> interrupt subsystem is initialized and I have a hard time to
> understand that comment:
>
> /* We can't set this earlier, because we need to calibrate the timer
> */
>
Hi Thomas,
Thanks for your comments. Please refer to inline
comments below.
On 2014/5/28 3:58, Thomas Gleixner wrote:
> Jiang,
>
> On Tue, 27 May 2014, Jiang Liu wrote:
>
>> +static int alloc_irq_from_domain(struct irq_domain *domain, u32 gsi, int
>> pin)
>> {
>> +int irq = -1;
>>
Jiang,
On Tue, 27 May 2014, Jiang Liu wrote:
> +static int alloc_irq_from_domain(struct irq_domain *domain, u32 gsi, int pin)
> {
> + int irq = -1;
> +
> + if (gsi >= arch_dynirq_lower_bound(0)) {
> + irq = irq_create_mapping(domain, pin);
> + } else if (gsi < NR_IRQS_LEG
Currently x86 support identity mapping between GSI(IOAPIC pin) and IRQ
number, so continous IRQs at low end are statically allocated to IOAPICs
at boot time. This design causes trouble to support IOAPIC hotplug.
This patch implements basic mechanism to dynamically allocate IRQ on
demand for IOAPIC
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