Hi Thomas,
With all patches applied, we have following code and comments
for this case:
switch (type) {
case IOAPIC_DOMAIN_LEGACY:
/*
* Dynamically allocate IRQ number for non-ISA IRQs in
the first 16
* GSIs on some weird pla
On Tue, 10 Jun 2014, Jiang Liu wrote:
> Hi Thomas,
> This piece of code is inherited from current IOAPIC driver
> and I think it's a workaround for some weird platforms.
> For normal platforms with both 8259A and IOAPIC controllers,
> legacy ISA IRQs should be connected to both 8259A a
Hi Thomas,
This piece of code is inherited from current IOAPIC driver
and I think it's a workaround for some weird platforms.
For normal platforms with both 8259A and IOAPIC controllers,
legacy ISA IRQs should be connected to both 8259A and IOAPIC pins
(ignore timer and cascade IRQs
On Mon, 9 Jun 2014, Jiang Liu wrote:
> unsigned int arch_dynirq_lower_bound(unsigned int from)
> {
> - return from < nr_irqs_gsi ? nr_irqs_gsi : from;
> + unsigned int min = gsi_top + NR_IRQS_LEGACY;
Why is this gsi_top + NR_IRQ_LEGACY? The legacy interrupts are part of
the gsi space, ar
Static variable nr_irqs_gsi is used to maintain the lowest dynamic
allocatable IRQ number. It may cause trouble when enabling dynamic
IRQ allocation for IOAPIC, so use arch_dynirq_lower_bound() to
avoid directly accessing nr_irqs_gsi and kill nr_irqs_gsi.
Signed-off-by: Jiang Liu
---
arch/x86/ke
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