[Patch v5 00/12] microblaze/MIPS/PowerPC: Xilinx intc

Hi, The MIPS based Xilfpga platform uses the axi interrupt controller daisy chained to the MIPS microAptiv cpu interrupt controller. This patch series moves the axi interrupt controller driver out of arch/microblaze to drivers/irqchip and then cleans it up a bit. And then remove another

[Patch v5 00/12] microblaze/MIPS/PowerPC: Xilinx intc

Hi, The MIPS based Xilfpga platform uses the axi interrupt controller daisy chained to the MIPS microAptiv cpu interrupt controller. This patch series moves the axi interrupt controller driver out of arch/microblaze to drivers/irqchip and then cleans it up a bit. And then remove another