On Tue, Jul 19, 2016 at 02:22:36PM -0400, Vince Weaver wrote:
> On Fri, 17 Jun 2016, Huang Rui wrote:
>
> > On Thu, Jun 16, 2016 at 06:47:00PM +0200, Borislav Petkov wrote:
> > > On Thu, Jun 16, 2016 at 01:38:14PM +0800, Huang Rui wrote:
> > > > I was told this feature would be supported on
On Tue, Jul 19, 2016 at 02:22:36PM -0400, Vince Weaver wrote:
> On Fri, 17 Jun 2016, Huang Rui wrote:
>
> > On Thu, Jun 16, 2016 at 06:47:00PM +0200, Borislav Petkov wrote:
> > > On Thu, Jun 16, 2016 at 01:38:14PM +0800, Huang Rui wrote:
> > > > I was told this feature would be supported on
On Fri, 17 Jun 2016, Huang Rui wrote:
> On Thu, Jun 16, 2016 at 06:47:00PM +0200, Borislav Petkov wrote:
> > On Thu, Jun 16, 2016 at 01:38:14PM +0800, Huang Rui wrote:
> > > I was told this feature would be supported on fam15h 60h, 70h and
> > > later processors before. Just checked the fam16h
On Fri, 17 Jun 2016, Huang Rui wrote:
> On Thu, Jun 16, 2016 at 06:47:00PM +0200, Borislav Petkov wrote:
> > On Thu, Jun 16, 2016 at 01:38:14PM +0800, Huang Rui wrote:
> > > I was told this feature would be supported on fam15h 60h, 70h and
> > > later processors before. Just checked the fam16h
On Fri, 17 Jun 2016, Huang Rui wrote:
> Can you try to read the MSR value two times with the same core
> (rdmsrl_on_cpu)?
I'm reading from userspace using the /dev/cpu/0/msr device so it should
always be reading from cpu0.
I guess I could code up a custom kernel module to debug this if
On Fri, 17 Jun 2016, Huang Rui wrote:
> Can you try to read the MSR value two times with the same core
> (rdmsrl_on_cpu)?
I'm reading from userspace using the /dev/cpu/0/msr device so it should
always be reading from cpu0.
I guess I could code up a custom kernel module to debug this if
On Thu, Jun 16, 2016 at 04:44:20PM -0400, Vince Weaver wrote:
> On Thu, 16 Jun 2016, Huang Rui wrote:
>
> > > 1. In theory this should also work on an amd fam16h model 30h
> > > processor too, correct? The current code limits things to fam15h
> > > even though the fam16mod30h has all
On Thu, Jun 16, 2016 at 04:44:20PM -0400, Vince Weaver wrote:
> On Thu, 16 Jun 2016, Huang Rui wrote:
>
> > > 1. In theory this should also work on an amd fam16h model 30h
> > > processor too, correct? The current code limits things to fam15h
> > > even though the fam16mod30h has all
On Thu, Jun 16, 2016 at 06:47:00PM +0200, Borislav Petkov wrote:
> On Thu, Jun 16, 2016 at 01:38:14PM +0800, Huang Rui wrote:
> > I was told this feature would be supported on fam15h 60h, 70h and
> > later processors before. Just checked the fam16h model 30h BKDG, yes,
> > it should be also
On Thu, Jun 16, 2016 at 06:47:00PM +0200, Borislav Petkov wrote:
> On Thu, Jun 16, 2016 at 01:38:14PM +0800, Huang Rui wrote:
> > I was told this feature would be supported on fam15h 60h, 70h and
> > later processors before. Just checked the fam16h model 30h BKDG, yes,
> > it should be also
On Thu, Jun 16, 2016 at 05:16:04PM -0400, Vince Weaver wrote:
> I'd believe the 6W report as a value for how much the CPU is using.
> The others seem spurious. I guess I should go check the Errata for
> this chip.
Maybe this is the reason why it got enabled on F15 only :-)
--
Regards/Gruss,
On Thu, Jun 16, 2016 at 05:16:04PM -0400, Vince Weaver wrote:
> I'd believe the 6W report as a value for how much the CPU is using.
> The others seem spurious. I guess I should go check the Errata for
> this chip.
Maybe this is the reason why it got enabled on F15 only :-)
--
Regards/Gruss,
On Thu, 16 Jun 2016, Vince Weaver wrote:
One more followup, if I run the benchmark a bunch of times I get this:
4,472,401.06 mWatts power/power-pkg/
50,886,303.28 mWatts power/power-pkg/
On Thu, 16 Jun 2016, Vince Weaver wrote:
One more followup, if I run the benchmark a bunch of times I get this:
4,472,401.06 mWatts power/power-pkg/
50,886,303.28 mWatts power/power-pkg/
On Thu, 16 Jun 2016, Huang Rui wrote:
> On Thu, Jun 16, 2016 at 01:38:13PM +0800, Huang Rui wrote:
>
> After considering carefully, the original method should be OK.
>
> AMD nomenclature for CMT systems:
>
> [node 0] -> [Compute Unit 0] -> [Compute Unit Core 0] -> Linux CPU 0
>
On Thu, 16 Jun 2016, Huang Rui wrote:
> On Thu, Jun 16, 2016 at 01:38:13PM +0800, Huang Rui wrote:
>
> After considering carefully, the original method should be OK.
>
> AMD nomenclature for CMT systems:
>
> [node 0] -> [Compute Unit 0] -> [Compute Unit Core 0] -> Linux CPU 0
>
On Thu, 16 Jun 2016, Huang Rui wrote:
> > 1. In theory this should also work on an amd fam16h model 30h
> > processor too, correct? The current code limits things to fam15h
> > even though the fam16mod30h has all the proper cpuid flags.
> >
>
> I was told this feature would be
On Thu, 16 Jun 2016, Huang Rui wrote:
> > 1. In theory this should also work on an amd fam16h model 30h
> > processor too, correct? The current code limits things to fam15h
> > even though the fam16mod30h has all the proper cpuid flags.
> >
>
> I was told this feature would be
On Thu, Jun 16, 2016 at 01:38:14PM +0800, Huang Rui wrote:
> I was told this feature would be supported on fam15h 60h, 70h and
> later processors before. Just checked the fam16h model 30h BKDG, yes,
> it should be also supported. But I didn't test that platform, if you
> confirm it works in your
On Thu, Jun 16, 2016 at 01:38:14PM +0800, Huang Rui wrote:
> I was told this feature would be supported on fam15h 60h, 70h and
> later processors before. Just checked the fam16h model 30h BKDG, yes,
> it should be also supported. But I didn't test that platform, if you
> confirm it works in your
Hi Vince,
Thanks for asking.
On Wed, Jun 15, 2016 at 09:13:59PM -0400, Vince Weaver wrote:
>
> three questions about this functionality:
>
> 1. In theory this should also work on an amd fam16h model 30h
> processor too, correct? The current code limits things to fam15h
> even though
Hi Vince,
Thanks for asking.
On Wed, Jun 15, 2016 at 09:13:59PM -0400, Vince Weaver wrote:
>
> three questions about this functionality:
>
> 1. In theory this should also work on an amd fam16h model 30h
> processor too, correct? The current code limits things to fam15h
> even though
On Thu, Jun 16, 2016 at 01:38:13PM +0800, Huang Rui wrote:
> On Wed, Jun 15, 2016 at 09:13:59PM -0400, Vince Weaver wrote:
> >
> > 2. Unless I'm misunderstanding things, the code seems to be accumulating
> > Power. (see chunk below) Power is an instantaneous measurement, it
> > makes
On Thu, Jun 16, 2016 at 01:38:13PM +0800, Huang Rui wrote:
> On Wed, Jun 15, 2016 at 09:13:59PM -0400, Vince Weaver wrote:
> >
> > 2. Unless I'm misunderstanding things, the code seems to be accumulating
> > Power. (see chunk below) Power is an instantaneous measurement, it
> > makes
three questions about this functionality:
1. In theory this should also work on an amd fam16h model 30h
processor too, correct? The current code limits things to fam15h
even though the fam16mod30h has all the proper cpuid flags.
I've tested the functionality a bit and it seems to
three questions about this functionality:
1. In theory this should also work on an amd fam16h model 30h
processor too, correct? The current code limits things to fam15h
even though the fam16mod30h has all the proper cpuid flags.
I've tested the functionality a bit and it seems to
Introduce an AMD accumlated power reporting mechanism for the Family
15h, Model 60h processor that can be used to calculate the average
power consumed by a processor during a measurement interval. The
feature support is indicated by CPUID Fn8000_0007_EDX[12].
This feature will be implemented both
Introduce an AMD accumlated power reporting mechanism for the Family
15h, Model 60h processor that can be used to calculate the average
power consumed by a processor during a measurement interval. The
feature support is indicated by CPUID Fn8000_0007_EDX[12].
This feature will be implemented both
28 matches
Mail list logo
