Re: [RFC PATCH 0/6] Support raw event and DT for perf on RISC-V

2020-07-01 Thread Anup Patel
On Wed, Jul 1, 2020 at 7:44 AM Zong Li wrote: > > On Wed, Jul 1, 2020 at 2:57 AM Atish Patra wrote: > > > > On Tue, 2020-06-30 at 17:08 +0530, Anup Patel wrote: > > > On Tue, Jun 30, 2020 at 3:48 PM Anup Patel > > > wrote: > > > > On Tue, Jun 30, 2020 at 1:34 PM Zong Li wrote: > > > > > On

Re: [RFC PATCH 0/6] Support raw event and DT for perf on RISC-V

2020-06-30 Thread Anup Patel
On Wed, Jul 1, 2020 at 6:48 AM Alan Kao wrote: > > On Mon, Jun 29, 2020 at 11:19:09AM +0800, Zong Li wrote: > > This patch set adds raw event support on RISC-V. In addition, we > > introduce the DT mechanism to make our perf more generic and common. > > > > Currently, we set the hardware events

Re: [RFC PATCH 0/6] Support raw event and DT for perf on RISC-V

2020-06-30 Thread Zong Li
On Wed, Jul 1, 2020 at 8:52 AM Alan Kao wrote: > > On Mon, Jun 29, 2020 at 11:19:09AM +0800, Zong Li wrote: > > This patch set adds raw event support on RISC-V. In addition, we > > introduce the DT mechanism to make our perf more generic and common. > > > > Currently, we set the hardware events

Re: [RFC PATCH 0/6] Support raw event and DT for perf on RISC-V

2020-06-30 Thread Alan Kao
Tue, Jun 30, 2020 at 06:02:43PM -0700, Atish Patra wrote: > On Tue, Jun 30, 2020 at 5:52 PM Alan Kao wrote: > > > > On Mon, Jun 29, 2020 at 11:19:09AM +0800, Zong Li wrote: > > > This patch set adds raw event support on RISC-V. In addition, we > > > introduce the DT mechanism to make our perf

Re: [RFC PATCH 0/6] Support raw event and DT for perf on RISC-V

2020-06-30 Thread Zong Li
On Wed, Jul 1, 2020 at 2:57 AM Atish Patra wrote: > > On Tue, 2020-06-30 at 17:08 +0530, Anup Patel wrote: > > On Tue, Jun 30, 2020 at 3:48 PM Anup Patel > > wrote: > > > On Tue, Jun 30, 2020 at 1:34 PM Zong Li wrote: > > > > On Tue, Jun 30, 2020 at 3:40 PM Anup Patel > > > > wrote: > > > > >

Re: [RFC PATCH 0/6] Support raw event and DT for perf on RISC-V

2020-06-30 Thread Zong Li
On Tue, Jun 30, 2020 at 7:38 PM Anup Patel wrote: > > On Tue, Jun 30, 2020 at 3:48 PM Anup Patel wrote: > > > > On Tue, Jun 30, 2020 at 1:34 PM Zong Li wrote: > > > > > > On Tue, Jun 30, 2020 at 3:40 PM Anup Patel wrote: > > > > > > > > On Tue, Jun 30, 2020 at 12:07 PM Zong Li wrote: > > > >

Re: [RFC PATCH 0/6] Support raw event and DT for perf on RISC-V

2020-06-30 Thread Zong Li
On Tue, Jun 30, 2020 at 6:19 PM Anup Patel wrote: > > On Tue, Jun 30, 2020 at 1:34 PM Zong Li wrote: > > > > On Tue, Jun 30, 2020 at 3:40 PM Anup Patel wrote: > > > > > > On Tue, Jun 30, 2020 at 12:07 PM Zong Li wrote: > > > > > > > > On Mon, Jun 29, 2020 at 9:23 PM Anup Patel wrote: > > > >

Re: [RFC PATCH 0/6] Support raw event and DT for perf on RISC-V

2020-06-30 Thread Alan Kao
On Mon, Jun 29, 2020 at 11:19:09AM +0800, Zong Li wrote: > This patch set adds raw event support on RISC-V. In addition, we > introduce the DT mechanism to make our perf more generic and common. > > Currently, we set the hardware events by writing the mhpmeventN CSRs, it > would raise an illegal

Re: [RFC PATCH 0/6] Support raw event and DT for perf on RISC-V

2020-06-30 Thread Atish Patra
On Tue, Jun 30, 2020 at 5:52 PM Alan Kao wrote: > > On Mon, Jun 29, 2020 at 11:19:09AM +0800, Zong Li wrote: > > This patch set adds raw event support on RISC-V. In addition, we > > introduce the DT mechanism to make our perf more generic and common. > > > > Currently, we set the hardware events

Re: [RFC PATCH 0/6] Support raw event and DT for perf on RISC-V

2020-06-30 Thread Atish Patra
On Tue, 2020-06-30 at 17:08 +0530, Anup Patel wrote: > On Tue, Jun 30, 2020 at 3:48 PM Anup Patel > wrote: > > On Tue, Jun 30, 2020 at 1:34 PM Zong Li wrote: > > > On Tue, Jun 30, 2020 at 3:40 PM Anup Patel > > > wrote: > > > > On Tue, Jun 30, 2020 at 12:07 PM Zong Li > > > > wrote: > > > > >

Re: [RFC PATCH 0/6] Support raw event and DT for perf on RISC-V

2020-06-30 Thread Anup Patel
On Tue, Jun 30, 2020 at 3:48 PM Anup Patel wrote: > > On Tue, Jun 30, 2020 at 1:34 PM Zong Li wrote: > > > > On Tue, Jun 30, 2020 at 3:40 PM Anup Patel wrote: > > > > > > On Tue, Jun 30, 2020 at 12:07 PM Zong Li wrote: > > > > > > > > On Mon, Jun 29, 2020 at 9:23 PM Anup Patel wrote: > > > >

Re: [RFC PATCH 0/6] Support raw event and DT for perf on RISC-V

2020-06-30 Thread Anup Patel
On Tue, Jun 30, 2020 at 1:34 PM Zong Li wrote: > > On Tue, Jun 30, 2020 at 3:40 PM Anup Patel wrote: > > > > On Tue, Jun 30, 2020 at 12:07 PM Zong Li wrote: > > > > > > On Mon, Jun 29, 2020 at 9:23 PM Anup Patel wrote: > > > > > > > > On Mon, Jun 29, 2020 at 6:23 PM Zong Li wrote: > > > > > >

Re: [RFC PATCH 0/6] Support raw event and DT for perf on RISC-V

2020-06-30 Thread Zong Li
On Tue, Jun 30, 2020 at 3:40 PM Anup Patel wrote: > > On Tue, Jun 30, 2020 at 12:07 PM Zong Li wrote: > > > > On Mon, Jun 29, 2020 at 9:23 PM Anup Patel wrote: > > > > > > On Mon, Jun 29, 2020 at 6:23 PM Zong Li wrote: > > > > > > > > On Mon, Jun 29, 2020 at 4:28 PM Anup Patel wrote: > > > >

Re: [RFC PATCH 0/6] Support raw event and DT for perf on RISC-V

2020-06-30 Thread Anup Patel
On Tue, Jun 30, 2020 at 12:07 PM Zong Li wrote: > > On Mon, Jun 29, 2020 at 9:23 PM Anup Patel wrote: > > > > On Mon, Jun 29, 2020 at 6:23 PM Zong Li wrote: > > > > > > On Mon, Jun 29, 2020 at 4:28 PM Anup Patel wrote: > > > > > > > > On Mon, Jun 29, 2020 at 11:22 AM Zong Li wrote: > > > > >

Re: [RFC PATCH 0/6] Support raw event and DT for perf on RISC-V

2020-06-30 Thread Zong Li
On Mon, Jun 29, 2020 at 9:23 PM Anup Patel wrote: > > On Mon, Jun 29, 2020 at 6:23 PM Zong Li wrote: > > > > On Mon, Jun 29, 2020 at 4:28 PM Anup Patel wrote: > > > > > > On Mon, Jun 29, 2020 at 11:22 AM Zong Li wrote: > > > > > > > > On Mon, Jun 29, 2020 at 12:53 PM Anup Patel wrote: > > > >

Re: [RFC PATCH 0/6] Support raw event and DT for perf on RISC-V

2020-06-29 Thread Anup Patel
On Mon, Jun 29, 2020 at 8:49 AM Zong Li wrote: > > This patch set adds raw event support on RISC-V. In addition, we > introduce the DT mechanism to make our perf more generic and common. > > Currently, we set the hardware events by writing the mhpmeventN CSRs, it > would raise an illegal

Re: [RFC PATCH 0/6] Support raw event and DT for perf on RISC-V

2020-06-29 Thread Zong Li
On Mon, Jun 29, 2020 at 12:53 PM Anup Patel wrote: > > On Mon, Jun 29, 2020 at 8:49 AM Zong Li wrote: > > > > This patch set adds raw event support on RISC-V. In addition, we > > introduce the DT mechanism to make our perf more generic and common. > > > > Currently, we set the hardware events by

Re: [RFC PATCH 0/6] Support raw event and DT for perf on RISC-V

2020-06-29 Thread Anup Patel
On Mon, Jun 29, 2020 at 11:22 AM Zong Li wrote: > > On Mon, Jun 29, 2020 at 12:53 PM Anup Patel wrote: > > > > On Mon, Jun 29, 2020 at 8:49 AM Zong Li wrote: > > > > > > This patch set adds raw event support on RISC-V. In addition, we > > > introduce the DT mechanism to make our perf more

Re: [RFC PATCH 0/6] Support raw event and DT for perf on RISC-V

2020-06-29 Thread Zong Li
On Mon, Jun 29, 2020 at 4:28 PM Anup Patel wrote: > > On Mon, Jun 29, 2020 at 11:22 AM Zong Li wrote: > > > > On Mon, Jun 29, 2020 at 12:53 PM Anup Patel wrote: > > > > > > On Mon, Jun 29, 2020 at 8:49 AM Zong Li wrote: > > > > > > > > This patch set adds raw event support on RISC-V. In

Re: [RFC PATCH 0/6] Support raw event and DT for perf on RISC-V

2020-06-29 Thread Anup Patel
On Mon, Jun 29, 2020 at 6:23 PM Zong Li wrote: > > On Mon, Jun 29, 2020 at 4:28 PM Anup Patel wrote: > > > > On Mon, Jun 29, 2020 at 11:22 AM Zong Li wrote: > > > > > > On Mon, Jun 29, 2020 at 12:53 PM Anup Patel wrote: > > > > > > > > On Mon, Jun 29, 2020 at 8:49 AM Zong Li wrote: > > > > >

[RFC PATCH 0/6] Support raw event and DT for perf on RISC-V

2020-06-28 Thread Zong Li
This patch set adds raw event support on RISC-V. In addition, we introduce the DT mechanism to make our perf more generic and common. Currently, we set the hardware events by writing the mhpmeventN CSRs, it would raise an illegal instruction exception and trap into m-mode to emulate event