On Tue, May 27, 2014 at 10:48:38AM -0700, Tony Luck wrote:
> > + } else if (c->x86_vendor == X86_VENDOR_INTEL)
> > + return m->status & BIT(7);
>
> Intel compound error codes aren't quite that simple. You need to look
> at the low 16 bits of "status" (the MCACOD) field and
> + } else if (c->x86_vendor == X86_VENDOR_INTEL)
> + return m->status & BIT(7);
Intel compound error codes aren't quite that simple. You need to look
at the low 16 bits of "status" (the MCACOD) field and see which is the
most significant bit set (ignoring bit 12, the
From: Borislav Petkov
Add the CE collector to the polling path which collects the correctable
errors. Collect only DRAM ECC errors for now.
Signed-off-by: Borislav Petkov
---
arch/x86/kernel/cpu/mcheck/mce.c | 62 +++-
1 file changed, 55 insertions(+), 7
From: Borislav Petkov b...@suse.de
Add the CE collector to the polling path which collects the correctable
errors. Collect only DRAM ECC errors for now.
Signed-off-by: Borislav Petkov b...@suse.de
---
arch/x86/kernel/cpu/mcheck/mce.c | 62 +++-
1 file
+ } else if (c-x86_vendor == X86_VENDOR_INTEL)
+ return m-status BIT(7);
Intel compound error codes aren't quite that simple. You need to look
at the low 16 bits of status (the MCACOD) field and see which is the
most significant bit set (ignoring bit 12, the filter bit).
On Tue, May 27, 2014 at 10:48:38AM -0700, Tony Luck wrote:
+ } else if (c-x86_vendor == X86_VENDOR_INTEL)
+ return m-status BIT(7);
Intel compound error codes aren't quite that simple. You need to look
at the low 16 bits of status (the MCACOD) field and see which is
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