The percpu user_pcid_flush_mask is used for CPU entry
(#DB/#NMI/#DF/#MCE -> paranoid_exit() -> RESTORE_CR3).
If a data breakpoint on it, it will cause an unwanted #DB.
There are some other percpu data used in CPU entry, but they are
either in already-protected cpu_tss_rw or are safe to trigger #DB
(espfix related).
Cc: Andy Lutomirski <l...@kernel.org>
Cc: Peter Zijlstra (Intel) <pet...@infradead.org>
Cc: Thomas Gleixner <t...@linutronix.de>
Cc: x...@kernel.org
Signed-off-by: Lai Jiangshan <la...@linux.alibaba.com>
---
arch/x86/kernel/hw_breakpoint.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/x86/kernel/hw_breakpoint.c b/arch/x86/kernel/hw_breakpoint.c
index 7d3966b9aa12..9579bd6fb589 100644
--- a/arch/x86/kernel/hw_breakpoint.c
+++ b/arch/x86/kernel/hw_breakpoint.c
@@ -33,6 +33,7 @@
#include <asm/debugreg.h>
#include <asm/user.h>
#include <asm/desc.h>
+#include <asm/tlbflush.h>
/* Per cpu debug control register value */
DEFINE_PER_CPU(unsigned long, cpu_dr7);
@@ -251,6 +252,8 @@ static inline bool within_cpu_entry(unsigned long addr,
unsigned long end)
return true;
for_each_possible_cpu(cpu) {
+ unsigned short *mask_ptr;
+
/* The original rw GDT is being used after load_direct_gdt() */
if (within_area(addr, end, (unsigned long)get_cpu_gdt_rw(cpu),
GDT_SIZE))
@@ -268,6 +271,17 @@ static inline bool within_cpu_entry(unsigned long addr,
unsigned long end)
(unsigned long)&per_cpu(cpu_tss_rw, cpu),
sizeof(struct tss_struct)))
return true;
+
+ /*
+ * cpu_tlbstate.user_pcid_flush_mask is used for CPU entry
+ * (#DB/#NMI/#DF/#MCE -> paranoid_exit() -> RESTORE_CR3).
+ * If a data breakpoint on it, it will cause an unwanted
+ * #DB.
+ */
+ mask_ptr = &per_cpu(cpu_tlbstate.user_pcid_flush_mask, cpu);
+ if (within_area(addr, end, (unsigned long)mask_ptr,
+ sizeof(*mask_ptr)))
+ return true;
}
return false;
--
2.20.1
