Hi Will,
On 29/03/2021 21.04, Will Deacon wrote:
One CPU still needs to be able to mutate the flags of another CPU to fire an
IPI; AIUI the per-cpu ops are *not* atomic for concurrent access by multiple
CPUs, and in fact there is no API for that, only for "this CPU".
Huh, I really thought we
Hi Hector,
On Fri, Mar 26, 2021 at 05:58:15PM +0900, Hector Martin wrote:
> On 25/03/2021 04.57, Will Deacon wrote:
> > > + event = readl(ic->base + AIC_EVENT);
> > > + type = FIELD_GET(AIC_EVENT_TYPE, event);
> > > + irq = FIELD_GET(AIC_EVENT_NUM, event);
> > > +
> > > +
On 06/03/2021 00.05, Andy Shevchenko wrote:
+#define pr_fmt(fmt) "%s: " fmt, __func__
This is not needed, really, if you have unique / distinguishable
messages in the first place.
Rather people include module names, which may be useful.
Makes sense, I'll switch to KBUILD_MODNAME.
+#define
Hi Will,
No worries, I was busy until a couple days ago anyway.
On 25/03/2021 04.57, Will Deacon wrote:
+#define pr_fmt(fmt) "%s: " fmt, __func__
General nit: but I suspect many of the prints in here probably want to be
using the *_ratelimited variants.
You're right, everything complaining
On 08/03/2021 22.31, Marc Zyngier wrote:
+ if ((read_sysreg_s(SYS_ICH_HCR_EL2) & ICH_HCR_EN) &&
+ read_sysreg_s(SYS_ICH_MISR_EL2) != 0) {
+ pr_err("vGIC IRQ fired, disabling.\n");
Please add a _ratelimited here. Whilst debugging KVM on this machine,
I ended up
Hi Hector,
Sorry it took me so long to get to this. Some comments below.
On Fri, Mar 05, 2021 at 06:38:51AM +0900, Hector Martin wrote:
> This is the root interrupt controller used on Apple ARM SoCs such as the
> M1. This irqchip driver performs multiple functions:
>
> * Handles both IRQs and
On Thu, 04 Mar 2021 21:38:51 +,
Hector Martin wrote:
>
> This is the root interrupt controller used on Apple ARM SoCs such as the
> M1. This irqchip driver performs multiple functions:
>
> * Handles both IRQs and FIQs
>
> * Drives the AIC peripheral itself (which handles IRQs)
>
> *
On Mon, Mar 8, 2021 at 1:50 PM Marc Zyngier wrote:
> On Fri, 05 Mar 2021 15:05:08 +,
> Andy Shevchenko wrote:
...
> > > +#define TIMER_FIRING(x)
> > > \
> > > + (((x) & (ARCH_TIMER_CTRL_ENABLE | ARCH_TIMER_CTRL_IT_MASK |
On Fri, 05 Mar 2021 15:05:08 +,
Andy Shevchenko wrote:
[...]
> > +#define TIMER_FIRING(x)
> > \
> > + (((x) & (ARCH_TIMER_CTRL_ENABLE | ARCH_TIMER_CTRL_IT_MASK |
> >\
> > +ARCH_TIMER_CTRL_IT_STAT)) ==
On Thu, Mar 4, 2021 at 11:41 PM Hector Martin wrote:
>
> This is the root interrupt controller used on Apple ARM SoCs such as the
> M1. This irqchip driver performs multiple functions:
>
> * Handles both IRQs and FIQs
>
> * Drives the AIC peripheral itself (which handles IRQs)
>
> * Dispatches
This is the root interrupt controller used on Apple ARM SoCs such as the
M1. This irqchip driver performs multiple functions:
* Handles both IRQs and FIQs
* Drives the AIC peripheral itself (which handles IRQs)
* Dispatches FIQs to downstream hard-wired clients (currently the ARM
timer).
*
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