Re: [alsa-devel] [RFC PATCH 26/40] soundwire: cadence_master: fix divider setting in clock register

2019-08-05 Thread Pierre-Louis Bossart
@@ -988,9 +989,11 @@ int sdw_cdns_init(struct sdw_cdns *cdns) /* Set clock divider */ divider = (prop->mclk_freq / prop->max_clk_freq) - 1; val = cdns_readl(cdns, CDNS_MCP_CLK_CTRL0); reg read of CLK_CTRL0 can be removed. yes for both comments. Thanks for the review

Re: [alsa-devel] [RFC PATCH 26/40] soundwire: cadence_master: fix divider setting in clock register

2019-07-26 Thread Pierre-Louis Bossart
On 7/26/19 12:19 AM, Bard liao wrote: On 7/26/2019 7:40 AM, Pierre-Louis Bossart wrote: From: Rander Wang The existing code uses an OR operation which would mix the original divider setting with the new one, resulting in an invalid configuration that can make codecs hang. Add the mask

Re: [alsa-devel] [RFC PATCH 26/40] soundwire: cadence_master: fix divider setting in clock register

2019-07-25 Thread rander.wang
在 7/26/2019 1:19 PM, Bard liao 写道: On 7/26/2019 7:40 AM, Pierre-Louis Bossart wrote: From: Rander Wang The existing code uses an OR operation which would mix the original divider setting with the new one, resulting in an invalid configuration that can make codecs hang. Add the mask

Re: [alsa-devel] [RFC PATCH 26/40] soundwire: cadence_master: fix divider setting in clock register

2019-07-25 Thread Bard liao
On 7/26/2019 7:40 AM, Pierre-Louis Bossart wrote: From: Rander Wang The existing code uses an OR operation which would mix the original divider setting with the new one, resulting in an invalid configuration that can make codecs hang. Add the mask definition and use cdns_updatel to update