Re: [linux-sunxi] [PATCH RESEND 1/2] dt: bindings: add allwinner,otg-routed property for phy-sun4i-usb

HI, On 26-10-16 12:14, Hans de Goede wrote: Hi, On 26-10-16 10:52, Icenowy Zheng wrote: 26.10.2016, 16:28, "Hans de Goede" : Hi, On 25-10-16 06:11, Icenowy Zheng wrote: On some newer Allwinner SoCs (H3 or A64), the PHY0 can be either routed to the MUSB controller

Re: [linux-sunxi] [PATCH RESEND 1/2] dt: bindings: add allwinner,otg-routed property for phy-sun4i-usb

HI, On 26-10-16 12:14, Hans de Goede wrote: Hi, On 26-10-16 10:52, Icenowy Zheng wrote: 26.10.2016, 16:28, "Hans de Goede" : Hi, On 25-10-16 06:11, Icenowy Zheng wrote: On some newer Allwinner SoCs (H3 or A64), the PHY0 can be either routed to the MUSB controller (which is an OTG

Re: [linux-sunxi] [PATCH RESEND 1/2] dt: bindings: add allwinner,otg-routed property for phy-sun4i-usb

Hi, On 26-10-16 10:52, Icenowy Zheng wrote: 26.10.2016, 16:28, "Hans de Goede" : Hi, On 25-10-16 06:11, Icenowy Zheng wrote: On some newer Allwinner SoCs (H3 or A64), the PHY0 can be either routed to the MUSB controller (which is an OTG controller) or the OHCI/EHCI

Re: [linux-sunxi] [PATCH RESEND 1/2] dt: bindings: add allwinner,otg-routed property for phy-sun4i-usb

Hi, On 26-10-16 10:52, Icenowy Zheng wrote: 26.10.2016, 16:28, "Hans de Goede" : Hi, On 25-10-16 06:11, Icenowy Zheng wrote: On some newer Allwinner SoCs (H3 or A64), the PHY0 can be either routed to the MUSB controller (which is an OTG controller) or the OHCI/EHCI pair (which is a

Re: [linux-sunxi] [PATCH RESEND 1/2] dt: bindings: add allwinner,otg-routed property for phy-sun4i-usb

Hi, On 25-10-16 06:11, Icenowy Zheng wrote: On some newer Allwinner SoCs (H3 or A64), the PHY0 can be either routed to the MUSB controller (which is an OTG controller) or the OHCI/EHCI pair (which is a Host-only controller, but more stable and easy to implement). This property marks whether on

Re: [linux-sunxi] [PATCH RESEND 1/2] dt: bindings: add allwinner,otg-routed property for phy-sun4i-usb

Hi, On 25-10-16 06:11, Icenowy Zheng wrote: On some newer Allwinner SoCs (H3 or A64), the PHY0 can be either routed to the MUSB controller (which is an OTG controller) or the OHCI/EHCI pair (which is a Host-only controller, but more stable and easy to implement). This property marks whether on