[patch 03/37] sata_nv: delay on switching between NCQ and non-NCQ commands
-stable review patch. If anyone has any objections, please let us know.
--
From: Robert Hancock <[EMAIL PROTECTED]>
sata_nv: delay on switching between NCQ and non-NCQ commands
This patch appears to solve some problems with commands timing out in
cases where an NCQ command is immediately followed by a non-NCQ command
(or possibly vice versa). This is a rather ugly solution, but until we
know more about why this is needed, this is about all we can do.
[backport to 2.6.20 by Chuck Ebbert <[EMAIL PROTECTED]>]
Signed-off-by: Robert Hancock <[EMAIL PROTECTED]>
Cc: Chuck Ebbert <[EMAIL PROTECTED]>
Signed-off-by: Jeff Garzik <[EMAIL PROTECTED]>
Signed-off-by: Greg Kroah-Hartman <[EMAIL PROTECTED]>
---
drivers/ata/sata_nv.c | 10 ++
1 file changed, 10 insertions(+)
--- a/drivers/ata/sata_nv.c
+++ b/drivers/ata/sata_nv.c
@@ -214,6 +214,7 @@ struct nv_adma_port_priv {
struct nv_adma_prd *aprd;
dma_addr_t aprd_dma;
u8 flags;
+ int last_issue_ncq;
};
#define NV_ADMA_CHECK_INTR(GCTL, PORT) ((GCTL) & ( 1 << (19 + (12 * (PORT)
@@ -1151,6 +1152,7 @@ static unsigned int nv_adma_qc_issue(str
{
struct nv_adma_port_priv *pp = qc->ap->private_data;
void __iomem *mmio = nv_adma_ctl_block(qc->ap);
+ int curr_ncq = (qc->tf.protocol == ATA_PROT_NCQ);
VPRINTK("ENTER\n");
@@ -1166,6 +1168,14 @@ static unsigned int nv_adma_qc_issue(str
/* write append register, command tag in lower 8 bits
and (number of cpbs to append -1) in top 8 bits */
wmb();
+
+ if(curr_ncq != pp->last_issue_ncq) {
+ /* Seems to need some delay before switching between NCQ and
non-NCQ
+ commands, else we get command timeouts and such. */
+ udelay(20);
+ pp->last_issue_ncq = curr_ncq;
+ }
+
writew(qc->tag, mmio + NV_ADMA_APPEND);
DPRINTK("Issued tag %u\n",qc->tag);
--
-
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[patch 03/37] sata_nv: delay on switching between NCQ and non-NCQ commands
-stable review patch. If anyone has any objections, please let us know.
--
From: Robert Hancock [EMAIL PROTECTED]
sata_nv: delay on switching between NCQ and non-NCQ commands
This patch appears to solve some problems with commands timing out in
cases where an NCQ command is immediately followed by a non-NCQ command
(or possibly vice versa). This is a rather ugly solution, but until we
know more about why this is needed, this is about all we can do.
[backport to 2.6.20 by Chuck Ebbert [EMAIL PROTECTED]]
Signed-off-by: Robert Hancock [EMAIL PROTECTED]
Cc: Chuck Ebbert [EMAIL PROTECTED]
Signed-off-by: Jeff Garzik [EMAIL PROTECTED]
Signed-off-by: Greg Kroah-Hartman [EMAIL PROTECTED]
---
drivers/ata/sata_nv.c | 10 ++
1 file changed, 10 insertions(+)
--- a/drivers/ata/sata_nv.c
+++ b/drivers/ata/sata_nv.c
@@ -214,6 +214,7 @@ struct nv_adma_port_priv {
struct nv_adma_prd *aprd;
dma_addr_t aprd_dma;
u8 flags;
+ int last_issue_ncq;
};
#define NV_ADMA_CHECK_INTR(GCTL, PORT) ((GCTL) ( 1 (19 + (12 * (PORT)
@@ -1151,6 +1152,7 @@ static unsigned int nv_adma_qc_issue(str
{
struct nv_adma_port_priv *pp = qc-ap-private_data;
void __iomem *mmio = nv_adma_ctl_block(qc-ap);
+ int curr_ncq = (qc-tf.protocol == ATA_PROT_NCQ);
VPRINTK(ENTER\n);
@@ -1166,6 +1168,14 @@ static unsigned int nv_adma_qc_issue(str
/* write append register, command tag in lower 8 bits
and (number of cpbs to append -1) in top 8 bits */
wmb();
+
+ if(curr_ncq != pp-last_issue_ncq) {
+ /* Seems to need some delay before switching between NCQ and
non-NCQ
+ commands, else we get command timeouts and such. */
+ udelay(20);
+ pp-last_issue_ncq = curr_ncq;
+ }
+
writew(qc-tag, mmio + NV_ADMA_APPEND);
DPRINTK(Issued tag %u\n,qc-tag);
--
-
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