On Fri, 15 Feb 2019, Thomas Gleixner wrote:
> On Fri, 15 Feb 2019, Ming Lei wrote:
> > > + * If only one interrupt is available, combine write and read
> > > + * queues. If 'write_queues' is set, ensure it leaves room for at
> > > + * least one read queue.
> > > + */
> > > + if (nrirqs == 1)
On Fri, 15 Feb 2019, Thomas Gleixner wrote:
> On Fri, 15 Feb 2019, Marc Zyngier wrote:
> > > + */
> > > + if (nrirqs == 1)
> > > + nr_read_queues = 0;
> > > + else if (write_queues >= nrirqs)
> > > + nr_read_queues = nrirqs - 1;
> >
> > ... while this seem to ensure that we carve
On Fri, 15 Feb 2019, Marc Zyngier wrote:
> On Thu, 14 Feb 2019 20:47:59 +,
> Thomas Gleixner wrote:
> > drivers/nvme/host/pci.c | 108
> >
> > 1 file changed, 28 insertions(+), 80 deletions(-)
> >
> > --- a/drivers/nvme/host/pci.c
> > +++
On Thu, 14 Feb 2019 20:47:59 +,
Thomas Gleixner wrote:
>
> From: Ming Lei
>
> The NVME PCI driver contains a tedious mechanism for interrupt
> allocation, which is necessary to adjust the number and size of interrupt
> sets to the maximum available number of interrupts which depends on the
On Fri, 15 Feb 2019, Ming Lei wrote:
> > +* If only one interrupt is available, combine write and read
> > +* queues. If 'write_queues' is set, ensure it leaves room for at
> > +* least one read queue.
> > +*/
> > + if (nrirqs == 1)
> > + nr_read_queues = 0;
> > +
On Thu, Feb 14, 2019 at 09:47:59PM +0100, Thomas Gleixner wrote:
> From: Ming Lei
>
> The NVME PCI driver contains a tedious mechanism for interrupt
> allocation, which is necessary to adjust the number and size of interrupt
> sets to the maximum available number of interrupts which depends on
From: Ming Lei
The NVME PCI driver contains a tedious mechanism for interrupt
allocation, which is necessary to adjust the number and size of interrupt
sets to the maximum available number of interrupts which depends on the
underlying PCI capabilities and the available CPU resources.
It works
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