答复: 答复: [tip:x86/cpu] x86/cpu: Create Zhaoxin processors architecture support file
On Tue, 25 Jun 2019, Thomas Gleixner wrote:
> Tony,
>
> On Tue, 25 Jun 2019, Tony W Wang-oc wrote:
> > On Sun, Jun 23, 2019, Joe Perches wrote:
> > > > x86/cpu: Create Zhaoxin processors architecture support file
> > > >
> > > []
> > > > diff --git a/arch/x86/kernel/cpu/zhaoxin.c
> b/arch/x86/kernel/cpu/zhaoxin.c
> > > []
> > > > +static void init_zhaoxin_cap(struct cpuinfo_x86 *c)
> > > > +{
> > > > + u32 lo, hi;
> > > > +
> > > > + /* Test for Extended Feature Flags presence */
> > > > + if (cpuid_eax(0xC000) >= 0xC001) {
> > > > + u32 tmp = cpuid_edx(0xC001);
> > > > +
> > > > + /* Enable ACE unit, if present and disabled */
> > > > + if ((tmp & (ACE_PRESENT | ACE_ENABLED)) == ACE_PRESENT)
> > > > {
> > >
> > > trivia:
> > >
> > > Perhaps this is more intelligible for humans to read
> > > and it deduplicates the comment as:
> > >
> > > if ((tmp & ACE_PRESENT) && !(tmp & ACE_ENABLED))
> > >
> > > The compiler produces the same object code.
> > >
> >
> > Thanks for the trivia, I will change this in the next version patch set.
>
> as you might have noticed from the tip bot commit notification mail, your
> patch set has been merged into the tip tree and is queued for the 5.3 merge
> window. So a new patch set is pointless. If at all then you can send a
> delta patch.
>
> Though I have to say, that I prefer the existing check:
>
> > > > + if ((tmp & (ACE_PRESENT | ACE_ENABLED)) == ACE_PRESENT)
> > > > {
>
> It's pretty clear, but that's really a matter of personal preference. So
> from my side there is nothing to do at all.
Got it, I will not change this code.
Thanks
TonyWWang-oc
Re: 答复: [tip:x86/cpu] x86/cpu: Create Zhaoxin processors architecture support file
Tony,
On Tue, 25 Jun 2019, Tony W Wang-oc wrote:
> On Sun, Jun 23, 2019, Joe Perches wrote:
> > > x86/cpu: Create Zhaoxin processors architecture support file
> > >
> > []
> > > diff --git a/arch/x86/kernel/cpu/zhaoxin.c b/arch/x86/kernel/cpu/zhaoxin.c
> > []
> > > +static void init_zhaoxin_cap(struct cpuinfo_x86 *c)
> > > +{
> > > + u32 lo, hi;
> > > +
> > > + /* Test for Extended Feature Flags presence */
> > > + if (cpuid_eax(0xC000) >= 0xC001) {
> > > + u32 tmp = cpuid_edx(0xC001);
> > > +
> > > + /* Enable ACE unit, if present and disabled */
> > > + if ((tmp & (ACE_PRESENT | ACE_ENABLED)) == ACE_PRESENT) {
> >
> > trivia:
> >
> > Perhaps this is more intelligible for humans to read
> > and it deduplicates the comment as:
> >
> > if ((tmp & ACE_PRESENT) && !(tmp & ACE_ENABLED))
> >
> > The compiler produces the same object code.
> >
>
> Thanks for the trivia, I will change this in the next version patch set.
as you might have noticed from the tip bot commit notification mail, your
patch set has been merged into the tip tree and is queued for the 5.3 merge
window. So a new patch set is pointless. If at all then you can send a
delta patch.
Though I have to say, that I prefer the existing check:
> > > + if ((tmp & (ACE_PRESENT | ACE_ENABLED)) == ACE_PRESENT) {
It's pretty clear, but that's really a matter of personal preference. So
from my side there is nothing to do at all.
Thanks,
tglx
答复: [tip:x86/cpu] x86/cpu: Create Zhaoxin processors architecture support file
On Sun, Jun 23, 2019, Joe Perches wrote:
> > x86/cpu: Create Zhaoxin processors architecture support file
> >
> []
> > diff --git a/arch/x86/kernel/cpu/zhaoxin.c b/arch/x86/kernel/cpu/zhaoxin.c
> []
> > +static void init_zhaoxin_cap(struct cpuinfo_x86 *c)
> > +{
> > + u32 lo, hi;
> > +
> > + /* Test for Extended Feature Flags presence */
> > + if (cpuid_eax(0xC000) >= 0xC001) {
> > + u32 tmp = cpuid_edx(0xC001);
> > +
> > + /* Enable ACE unit, if present and disabled */
> > + if ((tmp & (ACE_PRESENT | ACE_ENABLED)) == ACE_PRESENT) {
>
> trivia:
>
> Perhaps this is more intelligible for humans to read
> and it deduplicates the comment as:
>
> if ((tmp & ACE_PRESENT) && !(tmp & ACE_ENABLED))
>
> The compiler produces the same object code.
>
Thanks for the trivia, I will change this in the next version patch set.
Thanks
TonyWWang-oc
Re: [tip:x86/cpu] x86/cpu: Create Zhaoxin processors architecture support file
On Sat, 2019-06-22 at 03:16 -0700, tip-bot for Tony W Wang-oc wrote:
> Commit-ID: 761fdd5e3327db6c646a09bab5ad48cd42680cd2
> Gitweb:
> https://git.kernel.org/tip/761fdd5e3327db6c646a09bab5ad48cd42680cd2
> Author: Tony W Wang-oc
> AuthorDate: Tue, 18 Jun 2019 08:37:05 +
> Committer: Thomas Gleixner
> CommitDate: Sat, 22 Jun 2019 11:45:57 +0200
>
> x86/cpu: Create Zhaoxin processors architecture support file
>
[]
> diff --git a/arch/x86/kernel/cpu/zhaoxin.c b/arch/x86/kernel/cpu/zhaoxin.c
[]
> +static void init_zhaoxin_cap(struct cpuinfo_x86 *c)
> +{
> + u32 lo, hi;
> +
> + /* Test for Extended Feature Flags presence */
> + if (cpuid_eax(0xC000) >= 0xC001) {
> + u32 tmp = cpuid_edx(0xC001);
> +
> + /* Enable ACE unit, if present and disabled */
> + if ((tmp & (ACE_PRESENT | ACE_ENABLED)) == ACE_PRESENT) {
trivia:
Perhaps this is more intelligible for humans to read
and it deduplicates the comment as:
if ((tmp & ACE_PRESENT) && !(tmp & ACE_ENABLED))
The compiler produces the same object code.
[tip:x86/cpu] x86/cpu: Create Zhaoxin processors architecture support file
Commit-ID: 761fdd5e3327db6c646a09bab5ad48cd42680cd2
Gitweb: https://git.kernel.org/tip/761fdd5e3327db6c646a09bab5ad48cd42680cd2
Author: Tony W Wang-oc
AuthorDate: Tue, 18 Jun 2019 08:37:05 +
Committer: Thomas Gleixner
CommitDate: Sat, 22 Jun 2019 11:45:57 +0200
x86/cpu: Create Zhaoxin processors architecture support file
Add x86 architecture support for new Zhaoxin processors.
Carve out initialization code needed by Zhaoxin processors into
a separate compilation unit.
To identify Zhaoxin CPU, add a new vendor type X86_VENDOR_ZHAOXIN
for system recognition.
Signed-off-by: Tony W Wang-oc
Signed-off-by: Thomas Gleixner
Cc: "h...@zytor.com"
Cc: "gre...@linuxfoundation.org"
Cc: "r...@rjwysocki.net"
Cc: "l...@kernel.org"
Cc: David Wang
Cc: "Cooper Yan(BJ-RD)"
Cc: "Qiyuan Wang(BJ-RD)"
Cc: "Herry Yang(BJ-RD)"
Link: https://lkml.kernel.org/r/01042674b2f741b2aed1f797359bd...@zhaoxin.com
---
MAINTAINERS | 6 ++
arch/x86/Kconfig.cpu | 13 +++
arch/x86/include/asm/processor.h | 3 +-
arch/x86/kernel/cpu/Makefile | 1 +
arch/x86/kernel/cpu/zhaoxin.c| 167 +++
5 files changed, 189 insertions(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 57f496cff999..dfdefc6cb3a2 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -17477,6 +17477,12 @@ Q:
https://patchwork.linuxtv.org/project/linux-media/list/
S: Maintained
F: drivers/media/dvb-frontends/zd1301_demod*
+ZHAOXIN PROCESSOR SUPPORT
+M: Tony W Wang-oc
+L: linux-kernel@vger.kernel.org
+S: Maintained
+F: arch/x86/kernel/cpu/zhaoxin.c
+
ZPOOL COMPRESSED PAGE STORAGE API
M: Dan Streetman
L: linux...@kvack.org
diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu
index 6adce15268bd..8e29c991ba3e 100644
--- a/arch/x86/Kconfig.cpu
+++ b/arch/x86/Kconfig.cpu
@@ -480,3 +480,16 @@ config CPU_SUP_UMC_32
CPU might render the kernel unbootable.
If unsure, say N.
+
+config CPU_SUP_ZHAOXIN
+ default y
+ bool "Support Zhaoxin processors" if PROCESSOR_SELECT
+ help
+ This enables detection, tunings and quirks for Zhaoxin processors
+
+ You need this enabled if you want your kernel to run on a
+ Zhaoxin CPU. Disabling this option on other types of CPUs
+ makes the kernel a tiny bit smaller. Disabling it on a Zhaoxin
+ CPU might render the kernel unbootable.
+
+ If unsure, say N.
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index c34a35c78618..e57d2ca2ed87 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -144,7 +144,8 @@ enum cpuid_regs_idx {
#define X86_VENDOR_TRANSMETA 7
#define X86_VENDOR_NSC 8
#define X86_VENDOR_HYGON 9
-#define X86_VENDOR_NUM 10
+#define X86_VENDOR_ZHAOXIN 10
+#define X86_VENDOR_NUM 11
#define X86_VENDOR_UNKNOWN 0xff
diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index 5102bf7c8192..a7d9a4cb3ab6 100644
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -38,6 +38,7 @@ obj-$(CONFIG_CPU_SUP_CYRIX_32)+= cyrix.o
obj-$(CONFIG_CPU_SUP_CENTAUR) += centaur.o
obj-$(CONFIG_CPU_SUP_TRANSMETA_32) += transmeta.o
obj-$(CONFIG_CPU_SUP_UMC_32) += umc.o
+obj-$(CONFIG_CPU_SUP_ZHAOXIN) += zhaoxin.o
obj-$(CONFIG_X86_MCE) += mce/
obj-$(CONFIG_MTRR) += mtrr/
diff --git a/arch/x86/kernel/cpu/zhaoxin.c b/arch/x86/kernel/cpu/zhaoxin.c
new file mode 100644
index ..8e6f2f4b4afe
--- /dev/null
+++ b/arch/x86/kernel/cpu/zhaoxin.c
@@ -0,0 +1,167 @@
+// SPDX-License-Identifier: GPL-2.0
+#include
+#include
+
+#include
+
+#include "cpu.h"
+
+#define MSR_ZHAOXIN_FCR57 0x1257
+
+#define ACE_PRESENT(1 << 6)
+#define ACE_ENABLED(1 << 7)
+#define ACE_FCR(1 << 7)/* MSR_ZHAOXIN_FCR */
+
+#define RNG_PRESENT(1 << 2)
+#define RNG_ENABLED(1 << 3)
+#define RNG_ENABLE (1 << 8)/* MSR_ZHAOXIN_RNG */
+
+#define X86_VMX_FEATURE_PROC_CTLS_TPR_SHADOW 0x0020
+#define X86_VMX_FEATURE_PROC_CTLS_VNMI 0x0040
+#define X86_VMX_FEATURE_PROC_CTLS_2ND_CTLS 0x8000
+#define X86_VMX_FEATURE_PROC_CTLS2_VIRT_APIC 0x0001
+#define X86_VMX_FEATURE_PROC_CTLS2_EPT 0x0002
+#define X86_VMX_FEATURE_PROC_CTLS2_VPID0x0020
+
+static void init_zhaoxin_cap(struct cpuinfo_x86 *c)
+{
+ u32 lo, hi;
+
+ /* Test for Extended Feature Flags presence */
+ if (cpuid_eax(0xC000) >= 0xC001) {
+ u32 tmp = cpuid_edx(0xC001);
+
+ /* Enable ACE unit, if present and disabled */
+ if ((tmp & (ACE_PRESENT | ACE_ENABLED)) == ACE_PRESENT) {
+ rdmsr(MSR_ZHAOXIN_FCR57, lo, hi);
+ /* Enable ACE unit */
+
