On Tue, Sep 03, 2013 at 04:22:29PM -0700, Mike Turquette wrote:
> Quoting Lars-Peter Clausen (2013-08-30 06:24:45)
> > === Clock chip driver ====== SPI master driver ===
> > clk_prepare_lock()
> > spi_sync()
> >wait_for_completion(X)
> Is there a synchronous equivalent to
On Tue, Sep 03, 2013 at 04:22:29PM -0700, Mike Turquette wrote:
Quoting Lars-Peter Clausen (2013-08-30 06:24:45)
=== Clock chip driver ====== SPI master driver ===
clk_prepare_lock()
spi_sync()
wait_for_completion(X)
Is there a synchronous equivalent to spi_sync()?
On 09/02/2013 01:18 PM, Peter De Schrijver wrote:
> On Fri, Aug 30, 2013 at 03:24:45PM +0200, Lars-Peter Clausen wrote:
>> Hi,
>>
>> I'm currently facing a deadlock in the common clock framework that
>> unfortunately is not addressed by the reentrancy patches. I have a external
>> clock chip that
On Fri, Aug 30, 2013 at 03:24:45PM +0200, Lars-Peter Clausen wrote:
> Hi,
>
> I'm currently facing a deadlock in the common clock framework that
> unfortunately is not addressed by the reentrancy patches. I have a external
> clock chip that is controlled via SPI. So for example to configure the
On Fri, Aug 30, 2013 at 03:24:45PM +0200, Lars-Peter Clausen wrote:
Hi,
I'm currently facing a deadlock in the common clock framework that
unfortunately is not addressed by the reentrancy patches. I have a external
clock chip that is controlled via SPI. So for example to configure the rate
On 09/02/2013 01:18 PM, Peter De Schrijver wrote:
On Fri, Aug 30, 2013 at 03:24:45PM +0200, Lars-Peter Clausen wrote:
Hi,
I'm currently facing a deadlock in the common clock framework that
unfortunately is not addressed by the reentrancy patches. I have a external
clock chip that is
Hi,
I'm currently facing a deadlock in the common clock framework that
unfortunately is not addressed by the reentrancy patches. I have a external
clock chip that is controlled via SPI. So for example to configure the rate
of the clock chip you need to send a SPI message. Naturally the clock
Hi,
I'm currently facing a deadlock in the common clock framework that
unfortunately is not addressed by the reentrancy patches. I have a external
clock chip that is controlled via SPI. So for example to configure the rate
of the clock chip you need to send a SPI message. Naturally the clock
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