Re: Driver Design Question

2013-10-23 Thread Johannes Thumshirn
On Tue, Oct 22, 2013 at 08:10:00PM -0700, Guenter Roeck wrote: > On 10/22/2013 12:02 AM, Johannes Thumshirn wrote: > >Hi List, > > > >I have a design question concerning a device driver. The device in question > >is > >somewhere in between drivers/mfd/timberdale and drivers/ssb. It is mapped >

Re: Driver Design Question

2013-10-23 Thread Johannes Thumshirn
On Tue, Oct 22, 2013 at 08:10:00PM -0700, Guenter Roeck wrote: On 10/22/2013 12:02 AM, Johannes Thumshirn wrote: Hi List, I have a design question concerning a device driver. The device in question is somewhere in between drivers/mfd/timberdale and drivers/ssb. It is mapped connected via

Re: Driver Design Question

2013-10-22 Thread Guenter Roeck
On 10/22/2013 12:02 AM, Johannes Thumshirn wrote: Hi List, I have a design question concerning a device driver. The device in question is somewhere in between drivers/mfd/timberdale and drivers/ssb. It is mapped connected via PCI and on PCI Bar 0 there is a table describing which "sub-devices"

Driver Design Question

2013-10-22 Thread Johannes Thumshirn
Hi List, I have a design question concerning a device driver. The device in question is somewhere in between drivers/mfd/timberdale and drivers/ssb. It is mapped connected via PCI and on PCI Bar 0 there is a table describing which "sub-devices" are contained in the FPGA as well as where their

Driver Design Question

2013-10-22 Thread Johannes Thumshirn
Hi List, I have a design question concerning a device driver. The device in question is somewhere in between drivers/mfd/timberdale and drivers/ssb. It is mapped connected via PCI and on PCI Bar 0 there is a table describing which sub-devices are contained in the FPGA as well as where their

Re: Driver Design Question

2013-10-22 Thread Guenter Roeck
On 10/22/2013 12:02 AM, Johannes Thumshirn wrote: Hi List, I have a design question concerning a device driver. The device in question is somewhere in between drivers/mfd/timberdale and drivers/ssb. It is mapped connected via PCI and on PCI Bar 0 there is a table describing which sub-devices