On Fri, Mar 13, 2015 at 1:45 PM, Rafał Miłecki wrote:
> On 11 March 2015 at 09:41, Viet Nga Dao wrote:
>> On Tue, Mar 10, 2015 at 4:09 PM, Viet Nga Dao wrote:
>>> Ok. I will modify the code the way you suggest.
>>
>> I just realize that the opcode for RDID is handled by hardware in my
>> case, t
On 11 March 2015 at 09:41, Viet Nga Dao wrote:
> On Tue, Mar 10, 2015 at 4:09 PM, Viet Nga Dao wrote:
>> Ok. I will modify the code the way you suggest.
>
> I just realize that the opcode for RDID is handled by hardware in my
> case, therefore i dont really need to worry about 0xab opcode.
Nice
Hi Rafal,
On Tue, Mar 10, 2015 at 4:09 PM, Viet Nga Dao wrote:
> +
> +/* Altera EPCQ/EPCS Flashes */
> +{ "epcq16" , EPCQ_INFO(2, 0x15, 0x1, 32, 0x100) },
> +{ "epcq32" , EPCQ_INFO(2, 0x16, 0x1, 64, 0x100) },
> +{ "epcq64" , EPCQ_INFO(2, 0x17, 0x
+
+/* Altera EPCQ/EPCS Flashes */
+{ "epcq16" , EPCQ_INFO(2, 0x15, 0x1, 32, 0x100) },
+{ "epcq32" , EPCQ_INFO(2, 0x16, 0x1, 64, 0x100) },
+{ "epcq64" , EPCQ_INFO(2, 0x17, 0x1, 128, 0x100) },
+{ "epcq128" , EPCQ_INFO(2, 0x18, 0x10
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