Re: Fwd: x86_64 and AMD with C1E

2007-10-01 Thread Chuck Ebbert
On 10/01/2007 11:21 AM, Andi Kleen wrote: > > Also I'm not sure but I suspect non Intel HPETs have less than > three timers. Certainly they generally miss the 64bitness. > nVidia C51/MCP51 chipset, AMD Turion X2: hpet0: 3 32-bit timers, 2500 Hz - To unsubscribe from this list: send the lin

Re: Fwd: x86_64 and AMD with C1E

2007-10-01 Thread Thomas Gleixner
On Mon, 1 Oct 2007, Andi Kleen wrote: > > So if the > > number of hpet channels is greater/equal to the number of possible > > CPUs it's perfectly fine and does not need IPI at all. > > That is only a stop gap then. I don't see this being > generally true in the future. e.g. Intel announced SMT wi

Re: Fwd: x86_64 and AMD with C1E

2007-10-01 Thread Andi Kleen
> So if the > number of hpet channels is greater/equal to the number of possible > CPUs it's perfectly fine and does not need IPI at all. That is only a stop gap then. I don't see this being generally true in the future. e.g. Intel announced SMT will be soon back so even a standard dual core wou

Re: Fwd: x86_64 and AMD with C1E

2007-10-01 Thread Thomas Gleixner
On Mon, 1 Oct 2007, Andi Kleen wrote: > > There is work in progress on a patch, which allows to utilize the hpet > > timers as per cpu timers. This should solve the problem. Be patient. > > Given that e.g. ICH8 only has 3 HPET timers that seems doubtful > except for the special case of single-sock

Re: Fwd: x86_64 and AMD with C1E

2007-10-01 Thread Mikhail Kshevetskiy
2007/10/1, Thomas Gleixner <[EMAIL PROTECTED]>: > On Mon, 1 Oct 2007, Mikhail Kshevetskiy wrote: > > No, it boot and work normally. The only thing i bother, is the > > additional 260 timer interrupts per seconds. > > Here is short result: > > > > c1e enabled: > > -- power consumption about 23 wat

Re: Fwd: x86_64 and AMD with C1E

2007-10-01 Thread Andi Kleen
> There is work in progress on a patch, which allows to utilize the hpet > timers as per cpu timers. This should solve the problem. Be patient. Given that e.g. ICH8 only has 3 HPET timers that seems doubtful except for the special case of single-socket non hyper threaded dual core. You'll probably

Re: Fwd: x86_64 and AMD with C1E

2007-10-01 Thread Thomas Gleixner
On Mon, 1 Oct 2007, Mikhail Kshevetskiy wrote: > No, it boot and work normally. The only thing i bother, is the > additional 260 timer interrupts per seconds. > Here is short result: > > c1e enabled: > -- power consumption about 23 watts > -- there is only C1 power state enabled > -- there a

Fwd: x86_64 and AMD with C1E

2007-10-01 Thread Mikhail Kshevetskiy
01 Oct 2007 11:33:48 +0200, Andi Kleen <[EMAIL PROTECTED]>: > Mikhail Kshevetskiy <[EMAIL PROTECTED]> writes: > > > > The same situation can be observed for linux-2.6.22. > > You're saying 2.6.22/x86-64 without any patches doesn't boot out of the box > with C1E enabled? If yes what are the exact s