Re: I/O memory barriers vs SMP memory barriers

2007-03-28 Thread Lennert Buytenhek
On Mon, Mar 26, 2007 at 01:07:11PM -0700, Paul E. McKenney wrote: > > > > Does everybody agree on these semantics, though? At least David > > > > seems to think that mb/rmb/wmb aren't required to order normal > > > > memory accesses against each other.. > > > > > > Not on UP. On SMP, ordering

Re: I/O memory barriers vs SMP memory barriers

2007-03-28 Thread Paul E. McKenney
On Mon, Mar 26, 2007 at 10:46:39AM +0200, Lennert Buytenhek wrote: > On Sun, Mar 25, 2007 at 08:24:18PM -0700, Paul E. McKenney wrote: > > > > > > > [ background: On ARM, SMP synchronisation does need barriers but > > > > > > device > > > > > > synchronisation does not. The question is that

Re: I/O memory barriers vs SMP memory barriers

2007-03-28 Thread Paul E. McKenney
On Mon, Mar 26, 2007 at 10:46:39AM +0200, Lennert Buytenhek wrote: On Sun, Mar 25, 2007 at 08:24:18PM -0700, Paul E. McKenney wrote: [ background: On ARM, SMP synchronisation does need barriers but device synchronisation does not. The question is that given this,

Re: I/O memory barriers vs SMP memory barriers

2007-03-28 Thread Lennert Buytenhek
On Mon, Mar 26, 2007 at 01:07:11PM -0700, Paul E. McKenney wrote: Does everybody agree on these semantics, though? At least David seems to think that mb/rmb/wmb aren't required to order normal memory accesses against each other.. Not on UP. On SMP, ordering is (almost

Re: I/O memory barriers vs SMP memory barriers

2007-03-26 Thread David Howells
Benjamin Herrenschmidt <[EMAIL PROTECTED]> wrote: > Hrm... I'm not sure I like the io_* name, I think it's even more > confusing, people will never know when to use what ... I'd've thought it more obvious, but given there are several types of I/O, some of which might require different barriering

Re: I/O memory barriers vs SMP memory barriers

2007-03-26 Thread David Howells
Lennert Buytenhek <[EMAIL PROTECTED]> wrote: > Does everybody agree on these semantics, though? At least David seems > to think that mb/rmb/wmb aren't required to order normal memory accesses > against each other.. Ummm... I've just realised that your statement here is ambiguous. When you say

Re: I/O memory barriers vs SMP memory barriers

2007-03-26 Thread Lennert Buytenhek
On Sun, Mar 25, 2007 at 08:24:18PM -0700, Paul E. McKenney wrote: > > > > > [ background: On ARM, SMP synchronisation does need barriers but > > > > > device > > > > > synchronisation does not. The question is that given this, whether > > > > > mb() and friends can be NOPs on ARM or not

Re: I/O memory barriers vs SMP memory barriers

2007-03-26 Thread Lennert Buytenhek
On Sun, Mar 25, 2007 at 08:24:18PM -0700, Paul E. McKenney wrote: [ background: On ARM, SMP synchronisation does need barriers but device synchronisation does not. The question is that given this, whether mb() and friends can be NOPs on ARM or not (i.e. whether mb() is

Re: I/O memory barriers vs SMP memory barriers

2007-03-26 Thread David Howells
Lennert Buytenhek [EMAIL PROTECTED] wrote: Does everybody agree on these semantics, though? At least David seems to think that mb/rmb/wmb aren't required to order normal memory accesses against each other.. Ummm... I've just realised that your statement here is ambiguous. When you say

Re: I/O memory barriers vs SMP memory barriers

2007-03-26 Thread David Howells
Benjamin Herrenschmidt [EMAIL PROTECTED] wrote: Hrm... I'm not sure I like the io_* name, I think it's even more confusing, people will never know when to use what ... I'd've thought it more obvious, but given there are several types of I/O, some of which might require different barriering to

Re: I/O memory barriers vs SMP memory barriers

2007-03-25 Thread Paul E. McKenney
On Sun, Mar 25, 2007 at 11:38:43PM +0200, Lennert Buytenhek wrote: > On Sun, Mar 25, 2007 at 02:15:42PM -0700, Paul E. McKenney wrote: > > > > > [ background: On ARM, SMP synchronisation does need barriers but device > > > > synchronisation does not. The question is that given this, whether >

Re: I/O memory barriers vs SMP memory barriers

2007-03-25 Thread Paul E. McKenney
On Fri, Mar 23, 2007 at 01:43:53PM +, David Howells wrote: > > [Resend - this time with a comma in the addresses, not a dot] > > Lennert Buytenhek <[EMAIL PROTECTED]> wrote: > > > [ background: On ARM, SMP synchronisation does need barriers but device > > synchronisation does not. The

Re: I/O memory barriers vs SMP memory barriers

2007-03-25 Thread Lennert Buytenhek
On Sun, Mar 25, 2007 at 02:15:42PM -0700, Paul E. McKenney wrote: > > > [ background: On ARM, SMP synchronisation does need barriers but device > > > synchronisation does not. The question is that given this, whether > > > mb() and friends can be NOPs on ARM or not (i.e. whether mb() is > >

Re: I/O memory barriers vs SMP memory barriers

2007-03-25 Thread Lennert Buytenhek
On Sun, Mar 25, 2007 at 02:15:42PM -0700, Paul E. McKenney wrote: [ background: On ARM, SMP synchronisation does need barriers but device synchronisation does not. The question is that given this, whether mb() and friends can be NOPs on ARM or not (i.e. whether mb() is supposed

Re: I/O memory barriers vs SMP memory barriers

2007-03-25 Thread Paul E. McKenney
On Fri, Mar 23, 2007 at 01:43:53PM +, David Howells wrote: [Resend - this time with a comma in the addresses, not a dot] Lennert Buytenhek [EMAIL PROTECTED] wrote: [ background: On ARM, SMP synchronisation does need barriers but device synchronisation does not. The question is

Re: I/O memory barriers vs SMP memory barriers

2007-03-25 Thread Paul E. McKenney
On Sun, Mar 25, 2007 at 11:38:43PM +0200, Lennert Buytenhek wrote: On Sun, Mar 25, 2007 at 02:15:42PM -0700, Paul E. McKenney wrote: [ background: On ARM, SMP synchronisation does need barriers but device synchronisation does not. The question is that given this, whether mb()

Re: I/O memory barriers vs SMP memory barriers

2007-03-24 Thread Benjamin Herrenschmidt
On Fri, 2007-03-23 at 13:43 +, David Howells wrote: > [Resend - this time with a comma in the addresses, not a dot] > > Lennert Buytenhek <[EMAIL PROTECTED]> wrote: > > > [ background: On ARM, SMP synchronisation does need barriers but device > > synchronisation does not. The question is

Re: I/O memory barriers vs SMP memory barriers

2007-03-24 Thread Benjamin Herrenschmidt
On Fri, 2007-03-23 at 13:43 +, David Howells wrote: [Resend - this time with a comma in the addresses, not a dot] Lennert Buytenhek [EMAIL PROTECTED] wrote: [ background: On ARM, SMP synchronisation does need barriers but device synchronisation does not. The question is that given

Re: I/O memory barriers vs SMP memory barriers

2007-03-23 Thread Lennert Buytenhek
On Fri, Mar 23, 2007 at 01:43:53PM +, David Howells wrote: > > [ background: On ARM, SMP synchronisation does need barriers but device > > synchronisation does not. The question is that given this, whether > > mb() and friends can be NOPs on ARM or not (i.e. whether mb() is > >

I/O memory barriers vs SMP memory barriers

2007-03-23 Thread David Howells
[Resend - this time with a comma in the addresses, not a dot] Lennert Buytenhek <[EMAIL PROTECTED]> wrote: > [ background: On ARM, SMP synchronisation does need barriers but device > synchronisation does not. The question is that given this, whether > mb() and friends can be NOPs on ARM or

I/O memory barriers vs SMP memory barriers

2007-03-23 Thread David Howells
[Resend - this time with a comma in the addresses, not a dot] Lennert Buytenhek [EMAIL PROTECTED] wrote: [ background: On ARM, SMP synchronisation does need barriers but device synchronisation does not. The question is that given this, whether mb() and friends can be NOPs on ARM or not

Re: I/O memory barriers vs SMP memory barriers

2007-03-23 Thread Lennert Buytenhek
On Fri, Mar 23, 2007 at 01:43:53PM +, David Howells wrote: [ background: On ARM, SMP synchronisation does need barriers but device synchronisation does not. The question is that given this, whether mb() and friends can be NOPs on ARM or not (i.e. whether mb() is supposed to