Re: [PATCH] KVM: lapic: sync highest ISR to hardware apic on EOI

2014-05-28 Thread Paolo Bonzini
Il 28/05/2014 18:57, Marcelo Tosatti ha scritto: On Fri, May 23, 2014 at 04:51:53PM +0200, Paolo Bonzini wrote: When Hyper-V enlightenments are in effect, Windows prefers to issue an Hyper-V MSR write to issue an EOI rather than an x2apic MSR write. The Hyper-V MSR write is not handled by the pr

Re: [PATCH] KVM: lapic: sync highest ISR to hardware apic on EOI

2014-05-28 Thread Marcelo Tosatti
On Fri, May 23, 2014 at 04:51:53PM +0200, Paolo Bonzini wrote: > When Hyper-V enlightenments are in effect, Windows prefers to issue an > Hyper-V MSR write to issue an EOI rather than an x2apic MSR write. > The Hyper-V MSR write is not handled by the processor, and besides > being slower, this also

RE: [PATCH] KVM: lapic: sync highest ISR to hardware apic on EOI

2014-05-26 Thread Zhang, Yang Z
Paolo Bonzini wrote on 2014-05-26: > Il 26/05/2014 05:44, Zhang, Yang Z ha scritto: >> Paolo Bonzini wrote on 2014-05-23: >>> When Hyper-V enlightenments are in effect, Windows prefers to issue >>> an Hyper-V MSR write to issue an EOI rather than an x2apic MSR write. >>> The Hyper-V MSR write is no

Re: [PATCH] KVM: lapic: sync highest ISR to hardware apic on EOI

2014-05-26 Thread Michael S. Tsirkin
On Mon, May 26, 2014 at 04:56:54PM +0200, Paolo Bonzini wrote: > Il 26/05/2014 16:28, Michael S. Tsirkin ha scritto: > >> static inline void apic_clear_isr(int vec, struct kvm_lapic *apic) > >> { > >>- if (__apic_test_and_clear_vector(vec, apic->regs + APIC_ISR)) > >>+ struct kvm_vcpu *vcpu; >

Re: [PATCH] KVM: lapic: sync highest ISR to hardware apic on EOI

2014-05-26 Thread Paolo Bonzini
Il 26/05/2014 16:28, Michael S. Tsirkin ha scritto: static inline void apic_clear_isr(int vec, struct kvm_lapic *apic) { - if (__apic_test_and_clear_vector(vec, apic->regs + APIC_ISR)) + struct kvm_vcpu *vcpu; + if (!__apic_test_and_clear_vector(vec, apic->regs + APIC_ISR)) +

Re: [PATCH] KVM: lapic: sync highest ISR to hardware apic on EOI

2014-05-26 Thread Michael S. Tsirkin
On Fri, May 23, 2014 at 04:51:53PM +0200, Paolo Bonzini wrote: > When Hyper-V enlightenments are in effect, Windows prefers to issue an > Hyper-V MSR write to issue an EOI rather than an x2apic MSR write. > The Hyper-V MSR write is not handled by the processor, and besides > being slower, this also

Re: [PATCH] KVM: lapic: sync highest ISR to hardware apic on EOI

2014-05-26 Thread Paolo Bonzini
Il 26/05/2014 05:44, Zhang, Yang Z ha scritto: Paolo Bonzini wrote on 2014-05-23: When Hyper-V enlightenments are in effect, Windows prefers to issue an Hyper-V MSR write to issue an EOI rather than an x2apic MSR write. The Hyper-V MSR write is not handled by the processor, and besides being slo

RE: [PATCH] KVM: lapic: sync highest ISR to hardware apic on EOI

2014-05-25 Thread Zhang, Yang Z
Paolo Bonzini wrote on 2014-05-23: > When Hyper-V enlightenments are in effect, Windows prefers to issue an > Hyper-V MSR write to issue an EOI rather than an x2apic MSR write. > The Hyper-V MSR write is not handled by the processor, and besides > being slower, this also causes bugs with APIC virtu