Hi Andrew,
> -Original Message-
> From: Andrew Jeffery
> Sent: Wednesday, September 30, 2020 2:12 PM
> To: Ryan Chen ; ChiaWei Wang
> ; Joel Stanley
> Subject: Re: [PATCH 0/4] Remove LPC register partitioning
>
>
>
> On Mon, 28 Sep 2020, at 17:13, R
On Mon, 28 Sep 2020, at 17:13, Ryan Chen wrote:
> Hello Joel & Andrew,
> Those patches are more organize for ASPEED SOC LPC register layout.
> Does those patches have any feedback?
I support getting the problem fixed. However, the series also needs to fix the
LPC devicetree
el Stanley
> Cc: Rob Herring ; Corey Minyard ;
> Linus Walleij ; Haiyue Wang
> ; Cyril Bur ; Robert
> Lippert ; Linux ARM
> ; linux-aspeed
> ; Linux Kernel Mailing List
> ; OpenBMC Maillist
> ; Ryan Chen
> Subject: RE: [PATCH 0/4] Remove LPC register partitioning
>
Hello,
Thanks for your prompt feedback.
> -Original Message-
> From: Andrew Jeffery
> Sent: Friday, September 11, 2020 12:46 PM
> To: Joel Stanley ; ChiaWei Wang
>
> Subject: Re: [PATCH 0/4] Remove LPC register partitioning
>
>
> On Fri, 11 Sep 2020, a
On Fri, 11 Sep 2020, at 13:33, Joel Stanley wrote:
> Hello,
>
> On Fri, 11 Sep 2020 at 03:46, Chia-Wei, Wang
> wrote:
> >
> > The LPC controller has no concept of the BMC and the Host partitions.
> > The incorrect partitioning can impose unnecessary range restrictions
> > on register access
Hello,
On Fri, 11 Sep 2020 at 03:46, Chia-Wei, Wang
wrote:
>
> The LPC controller has no concept of the BMC and the Host partitions.
> The incorrect partitioning can impose unnecessary range restrictions
> on register access through the syscon regmap interface.
>
> For instance, HICRB contains
6 matches
Mail list logo