On Friday 30 October 2015 16:34:26 Stuart Yoder wrote:
> My suggestion is to perhaps make that more explicit in the proposed
> device tree node, by making the reg size "4" and naming it
> as per the register name
>
>rstcr: rstcr@1E6 {
>compatible = "syscon";
>
er...@vger.kernel.org; Sharma Bhupesh-B45370; Li Yang-Leo-R58472; Yoder
> Stuart-B08248
> Subject: Re: [PATCH v2] arm64: dts: Added syscon-reboot node for FSL's
> LS2085A SoC
>
> On Wednesday 28 October 2015 16:09:44 J. German Rivera wrote:
> > + rst_ccsr: rstccsr@1E6
er...@vger.kernel.org; Sharma Bhupesh-B45370; Li Yang-Leo-R58472; Yoder
> Stuart-B08248
> Subject: Re: [PATCH v2] arm64: dts: Added syscon-reboot node for FSL's
> LS2085A SoC
>
> On Wednesday 28 October 2015 16:09:44 J. German Rivera wrote:
> > + rst_ccsr: rstccsr@1E6
On Friday 30 October 2015 16:34:26 Stuart Yoder wrote:
> My suggestion is to perhaps make that more explicit in the proposed
> device tree node, by making the reg size "4" and naming it
> as per the register name
>
>rstcr: rstcr@1E6 {
>compatible = "syscon";
>
On Wednesday 28 October 2015 16:09:44 J. German Rivera wrote:
> + rst_ccsr: rstccsr@1E6 {
> + compatible = "syscon";
> + reg = <0x0 0x1E6 0x0 0x1>;
> + };
> +
>
What does 'rstccsr' stand for? Is this by chance a reset controller?
If so, we
On Wednesday 28 October 2015 16:09:44 J. German Rivera wrote:
> + rst_ccsr: rstccsr@1E6 {
> + compatible = "syscon";
> + reg = <0x0 0x1E6 0x0 0x1>;
> + };
> +
>
What does 'rstccsr' stand for? Is this by chance a reset controller?
If so, we
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