Please do not top-post.
On Sun, Jan 26, 2014 at 05:13:43AM +, Jungseung Lee wrote:
> Not to flush some more bytes. In the scenario, they can *omit* to flush last
> 32 bytes.
>
> L1_CACHE_BYTES = 64 (ARM v7, CA9)
>
> asm("mcrr p15, 0, %1, %0, c14\n"
> " mcr p15, 0, %2, c7, c10,
Please do not top-post.
On Sun, Jan 26, 2014 at 05:13:43AM +, Jungseung Lee wrote:
Not to flush some more bytes. In the scenario, they can *omit* to flush last
32 bytes.
L1_CACHE_BYTES = 64 (ARM v7, CA9)
asm(mcrr p15, 0, %1, %0, c14\n
mcr p15, 0, %2, c7, c10, 4
1_CACHE_BYTES), "r" (zero)
: "cc");
-Original Message-
From: Catalin Marinas [mailto:catalin.mari...@arm.com]
Sent: Saturday, January 25, 2014 12:43 AM
Cc: linux-arm-ker...@lists.infradead.org; li...@arm.linux.org.uk;
linux-kernel@vger.kernel.org
Subject: Re: [Q]
Message-
From: Catalin Marinas [mailto:catalin.mari...@arm.com]
Sent: Saturday, January 25, 2014 12:43 AM
Cc: linux-arm-ker...@lists.infradead.org; li...@arm.linux.org.uk;
linux-kernel@vger.kernel.org
Subject: Re: [Q] L1_CACHE_BYTES on flush_pfn_alias function.
On Fri, Jan 17, 2014 at 09:54
On Fri, Jan 17, 2014 at 09:54:42AM +, �� wrote:
> Follow the mailing-list
> http://comments.gmane.org/gmane.linux.ports.arm.omap/31686
>
> >>Setting the L1 cache line size larger than it actually is should be safe.
>
> the written code expected as L1_CACHE_BYTES should be real cache line
On Fri, Jan 17, 2014 at 09:54:42AM +, �� wrote:
Follow the mailing-list
http://comments.gmane.org/gmane.linux.ports.arm.omap/31686
Setting the L1 cache line size larger than it actually is should be safe.
the written code expected as L1_CACHE_BYTES should be real cache line size
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