Re: chipidea: udc: kernel panic in isr_setup_status_phase

2016-09-05 Thread Clemens Gruber
On Mon, Sep 05, 2016 at 11:10:22AM +0800, Peter Chen wrote: > How about below, it will set halt for device, and host will get stall > from the device. > > diff --git a/drivers/usb/chipidea/udc.c b/drivers/usb/chipidea/udc.c > index 0f692fc..3c46ccb 100644 > --- a/drivers/usb/chipidea/udc.c > +++

Re: chipidea: udc: kernel panic in isr_setup_status_phase

2016-09-05 Thread Clemens Gruber
On Mon, Sep 05, 2016 at 11:10:22AM +0800, Peter Chen wrote: > How about below, it will set halt for device, and host will get stall > from the device. > > diff --git a/drivers/usb/chipidea/udc.c b/drivers/usb/chipidea/udc.c > index 0f692fc..3c46ccb 100644 > --- a/drivers/usb/chipidea/udc.c > +++

Re: chipidea: udc: kernel panic in isr_setup_status_phase

2016-09-04 Thread Peter Chen
On Fri, Sep 02, 2016 at 06:42:43PM +0200, Clemens Gruber wrote: > On Fri, Sep 02, 2016 at 09:55:52AM +0800, Peter Chen wrote: > > Do you have other 5V to USB_H1_VBUS? USB PHY needs 5V input voltage > > as the source for USB LDO (3.0v), either from OTG or Host 1. I suspect > > the lower vbus

Re: chipidea: udc: kernel panic in isr_setup_status_phase

2016-09-04 Thread Peter Chen
On Fri, Sep 02, 2016 at 06:42:43PM +0200, Clemens Gruber wrote: > On Fri, Sep 02, 2016 at 09:55:52AM +0800, Peter Chen wrote: > > Do you have other 5V to USB_H1_VBUS? USB PHY needs 5V input voltage > > as the source for USB LDO (3.0v), either from OTG or Host 1. I suspect > > the lower vbus

Re: chipidea: udc: kernel panic in isr_setup_status_phase

2016-09-02 Thread Clemens Gruber
On Fri, Sep 02, 2016 at 09:55:52AM +0800, Peter Chen wrote: > Do you have other 5V to USB_H1_VBUS? USB PHY needs 5V input voltage > as the source for USB LDO (3.0v), either from OTG or Host 1. I suspect > the lower vbus voltage causes the USB LDO voltage less than 3.0v, then > cause the unstable

Re: chipidea: udc: kernel panic in isr_setup_status_phase

2016-09-02 Thread Clemens Gruber
On Fri, Sep 02, 2016 at 09:55:52AM +0800, Peter Chen wrote: > Do you have other 5V to USB_H1_VBUS? USB PHY needs 5V input voltage > as the source for USB LDO (3.0v), either from OTG or Host 1. I suspect > the lower vbus voltage causes the USB LDO voltage less than 3.0v, then > cause the unstable

Re: chipidea: udc: kernel panic in isr_setup_status_phase

2016-09-01 Thread Peter Chen
On Tue, Aug 30, 2016 at 07:20:45PM +0200, Clemens Gruber wrote: > On Mon, Aug 29, 2016 at 06:24:03PM +0800, Peter Chen wrote: > > Would you please measure the voltage of vbus within 1s at below two > > conditions: > > > > - Just connect cable > > - Just disconnect cable > > We found out that

Re: chipidea: udc: kernel panic in isr_setup_status_phase

2016-09-01 Thread Peter Chen
On Tue, Aug 30, 2016 at 07:20:45PM +0200, Clemens Gruber wrote: > On Mon, Aug 29, 2016 at 06:24:03PM +0800, Peter Chen wrote: > > Would you please measure the voltage of vbus within 1s at below two > > conditions: > > > > - Just connect cable > > - Just disconnect cable > > We found out that

Re: chipidea: udc: kernel panic in isr_setup_status_phase

2016-08-30 Thread Clemens Gruber
On Mon, Aug 29, 2016 at 06:24:03PM +0800, Peter Chen wrote: > Would you please measure the voltage of vbus within 1s at below two > conditions: > > - Just connect cable > - Just disconnect cable We found out that there was a problem with our hardware design! But first, here is the VBUS

Re: chipidea: udc: kernel panic in isr_setup_status_phase

2016-08-30 Thread Clemens Gruber
On Mon, Aug 29, 2016 at 06:24:03PM +0800, Peter Chen wrote: > Would you please measure the voltage of vbus within 1s at below two > conditions: > > - Just connect cable > - Just disconnect cable We found out that there was a problem with our hardware design! But first, here is the VBUS

Re: chipidea: udc: kernel panic in isr_setup_status_phase

2016-08-28 Thread Peter Chen
On Sun, Aug 28, 2016 at 08:15:02PM +0200, Clemens Gruber wrote: > On Sat, Aug 27, 2016 at 01:21:52AM +0800, Peter Chen wrote: > > The gadget triggers UI interrupt due to host sends packet. > > > > I really can't understand that, why host does not send bus reset > > before sending packet (eg,

Re: chipidea: udc: kernel panic in isr_setup_status_phase

2016-08-28 Thread Peter Chen
On Sun, Aug 28, 2016 at 08:15:02PM +0200, Clemens Gruber wrote: > On Sat, Aug 27, 2016 at 01:21:52AM +0800, Peter Chen wrote: > > The gadget triggers UI interrupt due to host sends packet. > > > > I really can't understand that, why host does not send bus reset > > before sending packet (eg,

Re: chipidea: udc: kernel panic in isr_setup_status_phase

2016-08-28 Thread Clemens Gruber
On Sat, Aug 27, 2016 at 01:21:52AM +0800, Peter Chen wrote: > The gadget triggers UI interrupt due to host sends packet. > > I really can't understand that, why host does not send bus reset > before sending packet (eg, GET_DESCRIPTOR)? It violates USB spec. > > Are you sure the first interrupt

Re: chipidea: udc: kernel panic in isr_setup_status_phase

2016-08-28 Thread Clemens Gruber
On Sat, Aug 27, 2016 at 01:21:52AM +0800, Peter Chen wrote: > The gadget triggers UI interrupt due to host sends packet. > > I really can't understand that, why host does not send bus reset > before sending packet (eg, GET_DESCRIPTOR)? It violates USB spec. > > Are you sure the first interrupt

Re: chipidea: udc: kernel panic in isr_setup_status_phase

2016-08-26 Thread Peter Chen
On Fri, Aug 26, 2016 at 01:47:40AM +0200, Clemens Gruber wrote: > On Wed, Aug 24, 2016 at 04:11:02PM +0800, Peter Chen wrote: > > UEI is an error interrupt, and software have not handled it, so it will > > not affect ci->status. > > > > > Should we only call isr_tr_complete_handler if UI && !UEI

Re: chipidea: udc: kernel panic in isr_setup_status_phase

2016-08-26 Thread Peter Chen
On Fri, Aug 26, 2016 at 01:47:40AM +0200, Clemens Gruber wrote: > On Wed, Aug 24, 2016 at 04:11:02PM +0800, Peter Chen wrote: > > UEI is an error interrupt, and software have not handled it, so it will > > not affect ci->status. > > > > > Should we only call isr_tr_complete_handler if UI && !UEI

Re: chipidea: udc: kernel panic in isr_setup_status_phase

2016-08-26 Thread Peter Chen
On Fri, Aug 26, 2016 at 01:47:40AM +0200, Clemens Gruber wrote: > On Wed, Aug 24, 2016 at 04:11:02PM +0800, Peter Chen wrote: > > UEI is an error interrupt, and software have not handled it, so it will > > not affect ci->status. > > > > > Should we only call isr_tr_complete_handler if UI && !UEI

Re: chipidea: udc: kernel panic in isr_setup_status_phase

2016-08-26 Thread Peter Chen
On Fri, Aug 26, 2016 at 01:47:40AM +0200, Clemens Gruber wrote: > On Wed, Aug 24, 2016 at 04:11:02PM +0800, Peter Chen wrote: > > UEI is an error interrupt, and software have not handled it, so it will > > not affect ci->status. > > > > > Should we only call isr_tr_complete_handler if UI && !UEI

Re: chipidea: udc: kernel panic in isr_setup_status_phase

2016-08-25 Thread Clemens Gruber
On Wed, Aug 24, 2016 at 04:11:02PM +0800, Peter Chen wrote: > UEI is an error interrupt, and software have not handled it, so it will > not affect ci->status. > > > Should we only call isr_tr_complete_handler if UI && !UEI ? > > > > Or would adding a check for ci->status == NULL in

Re: chipidea: udc: kernel panic in isr_setup_status_phase

2016-08-25 Thread Clemens Gruber
On Wed, Aug 24, 2016 at 04:11:02PM +0800, Peter Chen wrote: > UEI is an error interrupt, and software have not handled it, so it will > not affect ci->status. > > > Should we only call isr_tr_complete_handler if UI && !UEI ? > > > > Or would adding a check for ci->status == NULL in

Re: chipidea: udc: kernel panic in isr_setup_status_phase

2016-08-24 Thread Peter Chen
On Tue, Aug 23, 2016 at 02:36:30AM +0200, Clemens Gruber wrote: > Hi, > > I am using an i.MX6Q embedded board, acting as a (ethernet) gadget with > RNDIS function, connected over an USB OTG cable to a PC. > Most of the time it works fine, but in some mysterious circumstances, > a kernel panic

Re: chipidea: udc: kernel panic in isr_setup_status_phase

2016-08-24 Thread Peter Chen
On Tue, Aug 23, 2016 at 02:36:30AM +0200, Clemens Gruber wrote: > Hi, > > I am using an i.MX6Q embedded board, acting as a (ethernet) gadget with > RNDIS function, connected over an USB OTG cable to a PC. > Most of the time it works fine, but in some mysterious circumstances, > a kernel panic

chipidea: udc: kernel panic in isr_setup_status_phase

2016-08-22 Thread Clemens Gruber
Hi, I am using an i.MX6Q embedded board, acting as a (ethernet) gadget with RNDIS function, connected over an USB OTG cable to a PC. Most of the time it works fine, but in some mysterious circumstances, a kernel panic occurs, just after attaching the OTG cable, connecting it to the other machine:

chipidea: udc: kernel panic in isr_setup_status_phase

2016-08-22 Thread Clemens Gruber
Hi, I am using an i.MX6Q embedded board, acting as a (ethernet) gadget with RNDIS function, connected over an USB OTG cable to a PC. Most of the time it works fine, but in some mysterious circumstances, a kernel panic occurs, just after attaching the OTG cable, connecting it to the other machine: