Andi Kleen wrote:
"Maciej W. Rozycki" <[EMAIL PROTECTED]> writes:
Hi Peter,
Does anybody know why we reserve this range of IO ports for 'fpu'?
AFAIK from all the IO maps I can find on the internet for various x86
chipsets only 0x00f0 is actaully ever used.
There are two ports used: 0xf0 is
Andi Kleen wrote:
Maciej W. Rozycki [EMAIL PROTECTED] writes:
Hi Peter,
Does anybody know why we reserve this range of IO ports for 'fpu'?
AFAIK from all the IO maps I can find on the internet for various x86
chipsets only 0x00f0 is actaully ever used.
There are two ports used: 0xf0 is the
On Fri, 21 Sep 2007, Andi Kleen wrote:
> > For the curious the details of all the hassle are reasonably well
> > described in the Intel's AP-578 application note.
>
> Thanks. Ok it has to stay for for i386 then; although it would be in theory
> possible to only reserve when the CPU is a real
On Fri, 21 Sep 2007, Andi Kleen wrote:
For the curious the details of all the hassle are reasonably well
described in the Intel's AP-578 application note.
Thanks. Ok it has to stay for for i386 then; although it would be in theory
possible to only reserve when the CPU is a real 386. For
> For the curious the details of all the hassle are reasonably well
> described in the Intel's AP-578 application note.
Thanks. Ok it has to stay for for i386 then; although it would be in theory
possible to only reserve when the CPU is a real 386. For x86-64 it's
gone now.
-Andi
-
To
On Fri, 21 Sep 2007, Andi Kleen wrote:
> > There are two ports used: 0xf0 is the busy latch reset and 0xf1 is the
> > coprocessor reset. They are legacy ports resulting from the interesting
> > way the FPU has been wired by IBM in their PC design.
>
> Was it really needed on 386s? I didn't
"Maciej W. Rozycki" <[EMAIL PROTECTED]> writes:
> Hi Peter,
>
> > Does anybody know why we reserve this range of IO ports for 'fpu'?
> > AFAIK from all the IO maps I can find on the internet for various x86
> > chipsets only 0x00f0 is actaully ever used.
>
> There are two ports used: 0xf0 is
Hi Peter,
> Does anybody know why we reserve this range of IO ports for 'fpu'?
> AFAIK from all the IO maps I can find on the internet for various x86
> chipsets only 0x00f0 is actaully ever used.
There are two ports used: 0xf0 is the busy latch reset and 0xf1 is the
coprocessor reset. They
Hi,
Does anybody know why we reserve this range of IO ports for 'fpu'?
AFAIK from all the IO maps I can find on the internet for various x86
chipsets only 0x00f0 is actaully ever used.
./arch/i386/kernel/setup.c
282 }, {
283 .name = "fpu",
284 .start = 0x00f0,
285 .end
Hi,
Does anybody know why we reserve this range of IO ports for 'fpu'?
AFAIK from all the IO maps I can find on the internet for various x86
chipsets only 0x00f0 is actaully ever used.
./arch/i386/kernel/setup.c
282 }, {
283 .name = fpu,
284 .start = 0x00f0,
285 .end
Hi Peter,
Does anybody know why we reserve this range of IO ports for 'fpu'?
AFAIK from all the IO maps I can find on the internet for various x86
chipsets only 0x00f0 is actaully ever used.
There are two ports used: 0xf0 is the busy latch reset and 0xf1 is the
coprocessor reset. They are
Maciej W. Rozycki [EMAIL PROTECTED] writes:
Hi Peter,
Does anybody know why we reserve this range of IO ports for 'fpu'?
AFAIK from all the IO maps I can find on the internet for various x86
chipsets only 0x00f0 is actaully ever used.
There are two ports used: 0xf0 is the busy latch
On Fri, 21 Sep 2007, Andi Kleen wrote:
There are two ports used: 0xf0 is the busy latch reset and 0xf1 is the
coprocessor reset. They are legacy ports resulting from the interesting
way the FPU has been wired by IBM in their PC design.
Was it really needed on 386s? I didn't think
For the curious the details of all the hassle are reasonably well
described in the Intel's AP-578 application note.
Thanks. Ok it has to stay for for i386 then; although it would be in theory
possible to only reserve when the CPU is a real 386. For x86-64 it's
gone now.
-Andi
-
To
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