Re: phy/micrel: KSZ8031RNL RMII clock reconfiguration bug

2014-11-17 Thread Johan Hovold
On Mon, Nov 17, 2014 at 02:56:45PM +, Bruno Thomsen wrote: > > Did you specify a led-mode as well, or was the Operation Mode Strap > > Override (OMSO) write the first access after the soft reset? > > No led-mode was specified so OMSO was the first write. Did you try setting a led-mode before

RE: phy/micrel: KSZ8031RNL RMII clock reconfiguration bug

2014-11-17 Thread Bruno Thomsen
> Did you specify a led-mode as well, or was the Operation Mode Strap Override > (OMSO) write the first access after the soft reset? No led-mode was specified so OMSO was the first write. > Did you try any other workarounds besides setting the clock mode before doing > the OMSO write? I spend

RE: phy/micrel: KSZ8031RNL RMII clock reconfiguration bug

2014-11-17 Thread Bruno Thomsen
Did you specify a led-mode as well, or was the Operation Mode Strap Override (OMSO) write the first access after the soft reset? No led-mode was specified so OMSO was the first write. Did you try any other workarounds besides setting the clock mode before doing the OMSO write? I spend

Re: phy/micrel: KSZ8031RNL RMII clock reconfiguration bug

2014-11-17 Thread Johan Hovold
On Mon, Nov 17, 2014 at 02:56:45PM +, Bruno Thomsen wrote: Did you specify a led-mode as well, or was the Operation Mode Strap Override (OMSO) write the first access after the soft reset? No led-mode was specified so OMSO was the first write. Did you try setting a led-mode before

Re: phy/micrel: KSZ8031RNL RMII clock reconfiguration bug

2014-11-15 Thread Johan Hovold
On Wed, Nov 12, 2014 at 12:17:57PM +, Bruno Thomsen wrote: > Hi Johan, > > > As you may have seen by now, I've been working on refactoring the > > micrel phy driver to be able to use common initialisation code. > > > > Specifically, I've added generic support for disabling the broadcast > >

Re: phy/micrel: KSZ8031RNL RMII clock reconfiguration bug

2014-11-15 Thread Johan Hovold
On Wed, Nov 12, 2014 at 12:17:57PM +, Bruno Thomsen wrote: Hi Johan, As you may have seen by now, I've been working on refactoring the micrel phy driver to be able to use common initialisation code. Specifically, I've added generic support for disabling the broadcast address,

RE: phy/micrel: KSZ8031RNL RMII clock reconfiguration bug

2014-11-12 Thread Bruno Thomsen
Hi Johan, > As you may have seen by now, I've been working on refactoring the micrel phy > driver to be able to use common initialisation code. > > Specifically, I've added generic support for disabling the broadcast address, > which is what the MII_KSZPHY_OMSO write above does. > > Generally

RE: phy/micrel: KSZ8031RNL RMII clock reconfiguration bug

2014-11-12 Thread Bruno Thomsen
Hi Johan, As you may have seen by now, I've been working on refactoring the micrel phy driver to be able to use common initialisation code. Specifically, I've added generic support for disabling the broadcast address, which is what the MII_KSZPHY_OMSO write above does. Generally you want

Re: phy/micrel: KSZ8031RNL RMII clock reconfiguration bug

2014-11-11 Thread Johan Hovold
Hi Bruno, On Thu, Oct 09, 2014 at 04:48:14PM +0200, Bruno Thomsen wrote: > Bug: Unable to send and receive Ethernet packets with Micrel PHY. > > Affected devices: > KSZ8031RNL (commercial temp) > KSZ8031RNLI (industrial temp) > > Description: > PHY device is correctly detected during probe. >

Re: phy/micrel: KSZ8031RNL RMII clock reconfiguration bug

2014-11-11 Thread Johan Hovold
Hi Bruno, On Thu, Oct 09, 2014 at 04:48:14PM +0200, Bruno Thomsen wrote: Bug: Unable to send and receive Ethernet packets with Micrel PHY. Affected devices: KSZ8031RNL (commercial temp) KSZ8031RNLI (industrial temp) Description: PHY device is correctly detected during probe. PHY