Re: x86: CR4 update when IRQs are enabled

I think Nadav is right here. IMO the right fix is to rename the functions cr4_set_bits_irqs_off() etc, add a warning (if lockdep is on) and fix the callers. On Wed, Nov 15, 2017 at 4:34 PM, Nadav Amit wrote: > h...@zytor.com wrote: > >> On November 15, 2017 3:31:50 PM PST,

Re: x86: CR4 update when IRQs are enabled

I think Nadav is right here. IMO the right fix is to rename the functions cr4_set_bits_irqs_off() etc, add a warning (if lockdep is on) and fix the callers. On Wed, Nov 15, 2017 at 4:34 PM, Nadav Amit wrote: > h...@zytor.com wrote: > >> On November 15, 2017 3:31:50 PM PST, Nadav Amit wrote:

Re: x86: CR4 update when IRQs are enabled

h...@zytor.com wrote: > On November 15, 2017 3:31:50 PM PST, Nadav Amit wrote: >> Ping? >> >> Nadav Amit wrote: >> >>> CC’ing more people, and adding a patch to clarify... >>> >>> Nadav Amit wrote: >>> I am puzzled by

Re: x86: CR4 update when IRQs are enabled

h...@zytor.com wrote: > On November 15, 2017 3:31:50 PM PST, Nadav Amit wrote: >> Ping? >> >> Nadav Amit wrote: >> >>> CC’ing more people, and adding a patch to clarify... >>> >>> Nadav Amit wrote: >>> I am puzzled by the comment in tlb_state.cr4 , which says: /*

Re: x86: CR4 update when IRQs are enabled

On November 15, 2017 3:31:50 PM PST, Nadav Amit wrote: >Ping? > >Nadav Amit wrote: > >> CC’ing more people, and adding a patch to clarify... >> >> Nadav Amit wrote: >> >>> I am puzzled by the comment in tlb_state.cr4 , which

Re: x86: CR4 update when IRQs are enabled

On November 15, 2017 3:31:50 PM PST, Nadav Amit wrote: >Ping? > >Nadav Amit wrote: > >> CC’ing more people, and adding a patch to clarify... >> >> Nadav Amit wrote: >> >>> I am puzzled by the comment in tlb_state.cr4 , which says: >>> >>> /* >>>* Access to this CR4 shadow and

Re: x86: CR4 update when IRQs are enabled

Ping? Nadav Amit wrote: > CC’ing more people, and adding a patch to clarify... > > Nadav Amit wrote: > >> I am puzzled by the comment in tlb_state.cr4 , which says: >> >> /* >>* Access to this CR4 shadow and to H/W CR4 is protected

Re: x86: CR4 update when IRQs are enabled

Ping? Nadav Amit wrote: > CC’ing more people, and adding a patch to clarify... > > Nadav Amit wrote: > >> I am puzzled by the comment in tlb_state.cr4 , which says: >> >> /* >>* Access to this CR4 shadow and to H/W CR4 is protected by >>* disabling interrupts when

Re: x86: CR4 update when IRQs are enabled

CC’ing more people, and adding a patch to clarify... Nadav Amit wrote: > I am puzzled by the comment in tlb_state.cr4 , which says: > >/* > * Access to this CR4 shadow and to H/W CR4 is protected by > * disabling interrupts when modifying either

Re: x86: CR4 update when IRQs are enabled

CC’ing more people, and adding a patch to clarify... Nadav Amit wrote: > I am puzzled by the comment in tlb_state.cr4 , which says: > >/* > * Access to this CR4 shadow and to H/W CR4 is protected by > * disabling interrupts when modifying either one. > */ > >

x86: CR4 update when IRQs are enabled

I am puzzled by the comment in tlb_state.cr4 , which says: /* * Access to this CR4 shadow and to H/W CR4 is protected by * disabling interrupts when modifying either one. */ This does not seem to be true and adding a warning to CR4 writes when !irqs_disabled()

x86: CR4 update when IRQs are enabled

I am puzzled by the comment in tlb_state.cr4 , which says: /* * Access to this CR4 shadow and to H/W CR4 is protected by * disabling interrupts when modifying either one. */ This does not seem to be true and adding a warning to CR4 writes when !irqs_disabled()