(resending because Daniel was dropped from the reply list - I don't know
why)
On Wed, Jun 11, 2014 at 06:46:40AM +0100, Sitsofe Wheeler wrote:
On Tue, Jun 10, 2014 at 08:26:55AM +0200, Daniel Vetter wrote:
On Sun, Jun 08, 2014 at 10:30:15PM +0100, Sitsofe Wheeler wrote:
With a tree that is
Hello,
On Wed, 11 Jun 2014, Jet Chen wrote:
Hi Wensong,
0day kernel testing robot got the below dmesg.
+---++
| boot_successes| 26 |
| boot_failures
We should return NULL if regmap_init() fails instead of continuing.
Signed-off-by: Dan Carpenter dan.carpen...@oracle.com
diff --git a/drivers/misc/vexpress-syscfg.c b/drivers/misc/vexpress-syscfg.c
index 73068e5..2c0ddb2 100644
--- a/drivers/misc/vexpress-syscfg.c
+++
On 06/10/2014 10:04 PM, Yinghai Lu wrote:
When using kexec with 64bit kernel, bzImage and ramdisk could be
loaded above 4G. We need this to get correct ramdisk adress.
Make get_ramdisk_image() global and use it for early microcode
updating. Also make it to take boot_params pointer for
Hi Linus,
The following changes since commit c9eaa447e77efe77b7fa4c953bd62de8297fd6c5:
Linux 3.15-rc1 (2014-04-13 14:18:35 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm.git
tags/pwm/for-3.16-rc1
for you to fetch
Hi, Peter
Thanks for the reply :)
On 06/10/2014 08:12 PM, Peter Zijlstra wrote:
[snip]
Wake-affine for sure pull tasks together for workload like dbench, what make
it difference when put dbench into a group one level deeper is the
load-balance, which happened less.
We load-balance less
On Mon, Jun 09, 2014 at 12:26:16PM +0200, Igor Mammedov wrote:
On Sun, 8 Jun 2014 10:02:23 +0100
Sitsofe Wheeler sits...@gmail.com wrote:
The latest kernel (c593e8978722f7f4a12932733cfeed6c0c74fbaa) refuses to
boot on my EeePC - after grub is finished the screen just remains black
and
The following changes since commit ec6931b281797b69e6cf109f9cc94d5a2bf994e0:
word-at-a-time: avoid undefined behaviour in zero_bytemask macro (2014-04-27
15:20:05 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux.git
When the xHCI PCI host is suspended, if do_wakeup is false in xhci_pci_suspend,
xhci_bus_suspend needs to clear all root port wake on bits. Otherwise some Intel
platform may get a spurious wakeup, even if PCI PME# is disabled.
http://marc.info/?l=linux-usbm=138194006009255w=2
Signed-off-by: Lu
Hi,
On Sat, May 17, 2014 at 8:33 PM, Ilia Mirkin imir...@alum.mit.edu wrote:
Amazing. I get the same thing in chrome on my setup (G96). [...]
This is on top of a 3.15-rc5+ kernel.
Normally these things are very hard to debug because they're
~impossible to reproduce. However this website
Driver for the TI TMP103.
The TI TMP103 is similar to the TMP102. It differs from the TMP102
by having only 8 bit registers.
Signed-off-by: Heiko Schocher h...@denx.de
Cc: Jean Delvare kh...@linux-fr.org
Cc: Guenter Roeck li...@roeck-us.net
Cc: linux-kernel@vger.kernel.org
---
From: Dmitry Popov ixaph...@qrator.net
Date: Fri, 6 Jun 2014 23:19:21 +0400
ipv4_{update_pmtu,redirect} were called with tunnel's ifindex (t-dev is a
tunnel netdevice). It caused wrong route lookup and failure of pmtu update or
redirect. We should use the same ifindex that we use in
From: Linus Lüssing linus.luess...@web.de
Date: Sat, 7 Jun 2014 18:26:25 +0200
The first patch is simply a cosmetic patch. So far I (and maybe others
too?) have been regularly confusing these two structs, therefore I'd
suggest renaming them and therefore making the follow-up patches easier
Hi Linus,
The following changes since commit c9eaa447e77efe77b7fa4c953bd62de8297fd6c5:
Linux 3.15-rc1 (2014-04-13 14:18:35 -0700)
are available in the git repository at:
git://git.infradead.org/linux-mtd.git tags/for-linus-20140610
for you to fetch changes up to
Rafael Tinoco rafael.tin...@canonical.com writes:
Paul E. McKenney, Eric Biederman, David Miller (and/or anyone else
interested):
It was brought to my attention that netns creation/execution might
have suffered scalability/performance regression after v3.8.
I would like you, or anyone
From: Manuel Schölling manuel.schoell...@gmx.de
Date: Sat, 7 Jun 2014 23:57:25 +0200
dns_query() credulously assumes that keys are null-terminated and
returns a copy of a memory block that is off by one.
Signed-off-by: Manuel Schölling manuel.schoell...@gmx.de
Applied, thanks.
--
To
On Tue, Jun 10, 2014 at 10:46:20AM -0700, Kees Cook wrote:
This makes sure format strings can't accidentally leak into kernel
interface names.
Signed-off-by: Kees Cook keesc...@chromium.org
---
drivers/s390/block/dcssblk.c |2 +-
drivers/s390/char/vmlogrdr.c |2 +-
From: Rickard Strandqvist rickard_strandqv...@spectrumdigital.se
Date: Sat, 7 Jun 2014 12:22:08 +0200
A check on a memory allocation is checked incorrectly.
This was partly found using a static code analysis program called cppcheck.
Signed-off-by: Rickard Strandqvist
From: Rickard Strandqvist rickard_strandqv...@spectrumdigital.se
Date: Sat, 7 Jun 2014 13:26:37 +0200
Logical conjunction always evaluates to false: minor 2 minor 1
I guess what you wanted is rather: minor 2 || minor 1
This was partly found using a static code analysis program called
On Tue, Jun 10, 2014 at 02:20:03PM -0700, Philippe Troin wrote:
Trond, Christoph,
Since my last email, I've been testing 3.14.6.
Stock 3.14.6 is still broken, and Christoph's patch does help, but does
not entirely cure the problem.
Can you send me the output of
getfattr -n
On Tue, Jun 10, 2014 at 08:35:30PM +0400, Cyrill Gorcunov wrote:
On Thu, May 22, 2014 at 06:58:19AM +0900, Thomas Gleixner wrote:
So what wakes a potential waiter in read/poll?
And who is updating timerfd_create(2) ?
Thomas, could you please take a look if the approach below is
From: Dmitry Popov ixaph...@qrator.net
Date: Sun, 8 Jun 2014 02:06:25 +0400
ip tunnel add remote 10.2.2.1 local 10.2.2.2 mode vti ikey 1 okey 2
translates to p-iflags = VTI_ISVTI|GRE_KEY and p-i_key = 1, but GRE_KEY !=
TUNNEL_KEY, so ip_tunnel_ioctl would set i_key to 0 (same story with o_key)
Currently, a NMI handler for NMI watchdog may falsely handle any NMI
signaled for different purpose if CondChgd bit in
MSR_CORE_PERF_GLOBAL_STATUS MSR is set.
This commit deals with the issue simply by ignoring CondChgd bit.
Here is explanation in detail.
On x86 NMI watchdog uses performance
Hi Masami,
On Wed, 11 Jun 2014 10:28:01 +0900, Masami Hiramatsu wrote:
(2014/06/10 22:53), Namhyung Kim wrote:
Hi Masami,
2014-06-10 (화), 10:50 +, Masami Hiramatsu:
Introduce FTRACE_OPS_FL_IPMODIFY to avoid conflict among
ftrace users who may modify regs-ip to change the execution
Hi Jamie,
some few ideas in case there will be a v3, most of them are really just
nitpicks.
On Tue, 10 Jun 2014 23:24:53 +0100
Jamie Lentin j...@lentin.co.uk wrote:
Signed-off-by: Jamie Lentin j...@lentin.co.uk
---
drivers/hid/hid-lenovo-tpkbd.c | 33 -
1
Hello Wolfram,
On 10/06/2014 21:45, Wolfram Sang wrote:
Hi,
compiling this driver gives me:
drivers/i2c/busses/i2c-sun6i-p2wi.c: In function 'p2wi_probe':
drivers/i2c/busses/i2c-sun6i-p2wi.c:272:2: error: implicit declaration of
function 'devm_reset_control_get'
From: Dmitry Popov ixaph...@qrator.net
Date: Sun, 8 Jun 2014 03:03:08 +0400
Some tunnels (though only vti as for now) can use i_key just for internal
use:
for example vti uses it for fwmark'ing incoming packets. So raw i_key value
shouldn't be treated as a distinguisher for them.
Acked-by: Dan Carpenter dan.carpen...@oracle.com
This check introduces 1849 new checkpatch.pl warnings. I looked through
the first 70 warnings and there were no false positives.
Besides the bloat issue, I don't like these warnings because they make
the error handling harder to read. They are
When I tried to review the linux kernel on Windows in my laptop
and incidentally found that it failed to open the aux.c.
And Microsoft tells me:
(http://msdn.microsoft.com/en-us/library/aa365247.aspx)
Do not use the following reserved names for the name of a file:
CON, PRN, AUX, NUL, snip...,
On Wed, Jun 11, 2014 at 11:27:43AM +0400, Andrew Vagin wrote:
+ case TFD_IOC_SET_TICKS: {
+ u64 ticks;
+
+ if (!capable(CAP_SYS_RESOURCE))
+ return -EPERM;
I think it is too strong. It will not work in userns.
Why do we need to check
On śro, 2014-06-11 at 01:57 +0200, Tomasz Figa wrote:
On 11.06.2014 01:44, Chanwoo Choi wrote:
On 06/11/2014 08:35 AM, Tomasz Figa wrote:
Hi Chanwoo,
On 11.06.2014 01:27, Chanwoo Choi wrote:
This patch set AUTOWAKEUP_EN bit to ARM_CORE_CONFIGURATION register
because Exynos3250 removes
Hello Arnd,
On 10/06/2014 16:47, Arnd Bergmann wrote:
On Tuesday 10 June 2014 16:36:04 Maxime Ripard wrote:
On Tue, Jun 10, 2014 at 03:54:56PM +0200, Arnd Bergmann wrote:
On Tuesday 10 June 2014 15:47:16 Boris BREZILLON wrote:
+config I2C_SUN6I_P2WI
+ tristate Allwinner sun6i internal
From: Chew, Chiau Ee chiau.ee.c...@intel.com
It was observed that after module removal followed by insertion,
the SW mode chipselect is not properly set. Thus causing transfer
failure due to incorrect CS toggling.
Signed-off-by: Chew, Chiau Ee chiau.ee.c...@intel.com
Acked-by: Mika Westerberg
On Tue 10-06-14 12:57:56, Johannes Weiner wrote:
On Mon, Jun 09, 2014 at 03:52:51PM -0700, Greg Thelen wrote:
On Fri, Jun 06 2014, Michal Hocko mho...@suse.cz wrote:
Some users (e.g. Google) would like to have stronger semantic than low
limit offers currently. The fallback mode is
If there is no memcg eligible for reclaim because all groups under the
reclaimed hierarchy are within their guarantee then the global direct
reclaim would end up in the endless loop because zones in the zonelists
are not considered unreclaimable (as per all_unreclaimable) and so the
OOM killer
Some users (e.g. Google) would like to have stronger semantic than low
limit offers currently. The fallback mode is not desirable and they
prefer hitting OOM killer rather than ignoring low limit for protected
groups.
There are other possible usecases which can benefit from hard
guarantees. There
Dell kernel driver dell-smo8800 provides same freefall interface as hp_accel so
program hpfall.c works also on Dell laptops. So rename it to freefall.c.
Dell driver does not provide hp::hddprotect led so make sure that freefall.c
works also if hp::hddprotect does not exist in sysfs.
Additionally
When a filter file is open for writing and O_TRUNC is set, there's no
need to copy and free the filter entries.
Signed-off-by: Namhyung Kim namhy...@kernel.org
---
kernel/trace/ftrace.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/kernel/trace/ftrace.c
On Tue, Jun 10, 2014 at 07:18:34PM +0400, Vladimir Davydov wrote:
On Tue, Jun 10, 2014 at 09:26:19AM -0500, Christoph Lameter wrote:
On Tue, 10 Jun 2014, Vladimir Davydov wrote:
Frankly, I incline to shrinking dead SLAB caches periodically from
cache_reap too, because it looks neater
As struct ftrace_page is managed in a single linked list, it should
free from the start page.
Signed-off-by: Namhyung Kim namhy...@kernel.org
---
kernel/trace/ftrace.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/kernel/trace/ftrace.c b/kernel/trace/ftrace.c
index
On Wednesday 11 June 2014 09:52:52 Boris BREZILLON wrote:
You mean in my commit message ?
I thought it was already explaining the subtle differences between P2WI
and the SMBus protocols.
What would you like me to add to this explanation ?
Something about the I2C to P2WI initialization part
On Wed, Jun 11, 2014 at 11:12:13AM +0900, Minchan Kim wrote:
On Mon, Jun 09, 2014 at 11:26:17AM +0200, Vlastimil Babka wrote:
Unlike the migration scanner, the free scanner remembers the beginning of
the
last scanned pageblock in cc-free_pfn. It might be therefore rescanning
pages
On Fri, 2014-06-06 at 05:20 -0700, tip-bot for Waiman Long wrote:
Make x86 use the fair rwlock_t.
Implement the custom queue_write_unlock() for best performance.
This landed in linux-next yesterday (ie, next-20140610).
Signed-off-by: Waiman Long waiman.l...@hp.com
[peterz: near complete
We are returning success here because PTR_ERR(NULL) is zero. We should
be returning -ENODEV.
Fixes: 3de68d331c24 ('pinctrl: berlin: add the core pinctrl driver for Marvell
Berlin SoCs')
Signed-off-by: Dan Carpenter dan.carpen...@oracle.com
diff --git a/drivers/pinctrl/berlin/berlin.c
On Wed, Jun 11, 2014 at 02:13:42PM +0800, Michael wang wrote:
Hi, Peter
Thanks for the reply :)
On 06/10/2014 08:12 PM, Peter Zijlstra wrote:
[snip]
Wake-affine for sure pull tasks together for workload like dbench, what
make
it difference when put dbench into a group one level
On Tue, Jun 10 2014, Joonsoo Kim iamjoonsoo@lge.com wrote:
Without including device.h, build failure occurs.
In dma-contiguous.h, we try to access to dev-cma_area, so we need
device.h. In the past, we included it luckily by swap.h in
drivers/base/dma-contiguous.c. Swap.h includes node.h
Hi Vineet,
Commit ef680cdc2437 (ARC: Disable caches in early boot if so
configured) landed in linux-next yesterday (ie, next-20140610). It
includes two optional tests for CONFIG_ARC_MMU_V4. There's no Kconfig
symbol ARC_MMU_V4 in linux-next.
I assume you've got that symbol queued somewhere. Is
On 11 June 2014 02:33, Jonghwa Lee jonghwa3@samsung.com wrote:
When device uses generic pm domain, its own runtime suspend callback will be
executed only when all devices in the same domain are suspended. However, some
device needs sychronized runtime suspend and not to be deffered.
For
On 06/11/2014 01:59 PM, Julian Anastasov wrote:
Hello,
On Wed, 11 Jun 2014, Jet Chen wrote:
Hi Wensong,
0day kernel testing robot got the below dmesg.
+---++
| boot_successes| 26 |
On 06/11/2014 10:15 AM, Dan Carpenter wrote:
We are returning success here because PTR_ERR(NULL) is zero. We should
be returning -ENODEV.
Fixes: 3de68d331c24 ('pinctrl: berlin: add the core pinctrl driver for Marvell
Berlin SoCs')
Signed-off-by: Dan Carpenter dan.carpen...@oracle.com
Dan,
On Tue, 10 Jun 2014 23:24:54 +0100
Jamie Lentin j...@lentin.co.uk wrote:
Signed-off-by: Jamie Lentin j...@lentin.co.uk
Some minor comments here too.
---
drivers/hid/hid-core.c | 2 +
drivers/hid/hid-ids.h | 2 +
drivers/hid/hid-lenovo-tpkbd.c | 203
Hi all,
On Mon, May 26, 2014 at 04:51:41PM +0200, Antoine Ténart wrote:
This series adds the support for Berlin SoC AHCI controller. The
controller allows to use the SATA host interface and, for example, the
eSATA port on the BG2Q.
The series adds a PHY driver to control the two SATA ports
Hello,
This series adds support for the P2WI block used by some Allwinner boards
to interface with the AXP221 PMIC.
The P2WI controller looks like an SMBus controller which only supports byte
data transfers. But, it differs from standard SMBus protocol on several
aspects:
- it supports only one
P2WI (Push/Pull 2 Wire Interface) is an SMBus like bus used to communicate
with some PMICs (like the AXP221).
Document P2WI DT bindings which are pretty much the same as the one defined
for the marvell's mv64xxx controller.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
The P2WI controller looks like an SMBus controller which only supports byte
data transfers. But, it differs from standard SMBus protocol on several
aspects:
- it supports only one slave device, and thus drop the address field
- it adds a parity bit every 8bits of data
- only one read access is
On Wednesday 11 June 2014 01:56 PM, Paul Bolle wrote:
Hi Vineet,
Commit ef680cdc2437 (ARC: Disable caches in early boot if so
configured) landed in linux-next yesterday (ie, next-20140610). It
includes two optional tests for CONFIG_ARC_MMU_V4. There's no Kconfig
symbol ARC_MMU_V4 in
On Wed, Jun 4, 2014 at 1:24 PM, Gu Zheng guz.f...@cn.fujitsu.com wrote:
Hi Guys,
What's the status of this issue? Has it been fixed?
Yes, it is fixed by percpu_ref, and is merged to 3.15 already.
Thanks,
--
Ming Lei
--
To unsubscribe from this list: send the line unsubscribe linux-kernel in
On Wednesday 11 June 2014 10:39:40 Boris BREZILLON wrote:
The P2WI controller looks like an SMBus controller which only supports byte
data transfers. But, it differs from standard SMBus protocol on several
aspects:
- it supports only one slave device, and thus drop the address field
- it adds
On Tue, 10 Jun 2014, Brian Norris wrote:
There is a UTF-8 non-breaking space character (0xc2 0xa0) after the Y
in Say Y here. This is probably not intentional. Replace it with a
standard ASCII space (0x20).
If you can't see a difference here, I don't blame you :)
Signed-off-by: Brian
On Wed, Jun 11, 2014 at 04:30:28PM +0900, HATAYAMA Daisuke wrote:
Currently, a NMI handler for NMI watchdog may falsely handle any NMI
signaled for different purpose if CondChgd bit in
MSR_CORE_PERF_GLOBAL_STATUS MSR is set.
This commit deals with the issue simply by ignoring CondChgd bit.
+MODULE_LICENSE(GPL);
GPL v2
signature.asc
Description: Digital signature
On Mon, 09 Jun, at 03:00:17PM, Alex Thorlton wrote:
I think the problem is that I really need to be doing this at a point
where I can directly use physical addressing (the function pointer that
we have stored in efi.uv_systab contains the physical address of our
function) - at least that's
On Sun, Jun 8, 2014 at 4:45 PM, Axel Lin axel@ingics.com wrote:
Now this is a DT-only driver because non-devicetree probe path is removed,
so merge ab8500_regulator_of_probe() into ab8500_regulator_probe().
Signed-off-by: Axel Lin axel@ingics.com
Reviewed-by: Linus Walleij
On Sun, Jun 8, 2014 at 4:47 PM, Axel Lin axel@ingics.com wrote:
CONFIG_REGULATOR_AB8500_DEBUG is always not defined.
ab8500_regulator_debug_init() is not called at all now,
ab8500_regulator_debug_exit() simply return 0, thus remove them.
Signed-off-by: Axel Lin axel@ingics.com
Use actual register space size from Reference Manual.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/am33xx.dtsi | 2 +-
arch/arm/boot/dts/am4372.dtsi | 2 +-
arch/arm/boot/dts/omap2420.dtsi | 2 +-
arch/arm/boot/dts/omap2430.dtsi | 2 +-
arch/arm/boot/dts/omap3.dtsi| 2
Add a platform data structure for GPMC. It contains all the necessary
platform information that needs to be passed from platform init code
to GPMC driver.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/mach-omap2/gpmc.h | 4 +---
include/linux/platform_data/gpmc-omap.h |
Onenand device operates in Asynchronous mode by default. So
configure GPMC settings/timings based on Async mode before the onenand
device is created.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/mach-omap2/gpmc-onenand.c | 66 ++
1 file changed, 32
The write protect (WP) pin is only used for NAND devices. So move
the code into the NAND driver.
Get rid of gpmc_configure() as it is no longer used.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/mach-omap2/gpmc-nand.c | 4
arch/arm/mach-omap2/gpmc.c
Use devres managed resources for Memory, GPIO and Interrupt
resources.
0 is a valid gpio, so use gpio_is_valid() to check for
valid gpio number.
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/mtd/onenand/omap2.c | 92 -
1 file changed, 33
This is needed for NAND and OneNAND to work.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/configs/omap2plus_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/configs/omap2plus_defconfig
b/arch/arm/configs/omap2plus_defconfig
index a4e8d01..98dad6c 100644
---
Some devices (e.g. tusb6010) need 2 chip selects to work with
2 separate IOMEM resources. Allow such use case. The user just
needs to call gpmc_generic_init() for as many chip selects
with the same platform_device pointer. The GPMC driver will
take care of fixing up the memory resources.
Move the code that puts the onenand in synchronous mode
into the appropriate place i.e. drivers/mtd/onenand/omap2.c.
Make use of omap_gpmc_get_clk_period() and omap_gpmc_retime()
to calculate the necessary timings and configure the GPMC
parent's timings.
Signed-off-by: Roger Quadros
On Wed, Jun 11, 2014 at 10:14:11AM +0200, Paul Bolle wrote:
On Fri, 2014-06-06 at 05:20 -0700, tip-bot for Waiman Long wrote:
+#if !defined(CONFIG_X86_OOSTORE) !defined(CONFIG_X86_PPRO_FENCE)
X86_OOSTORE was removed in v3.14, see commit 09df7c4c8097 (x86: Remove
CONFIG_X86_OOSTORE). So the
Don't access any GPMC registers here. Use gpmc_generic_init()
to pass GPMC Chip Select settings, platform device and platform data
to the GPMC driver.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/mach-omap2/board-flash.c | 28 +++-
1 file changed, 11
On Tue 2014-06-10 19:32:51, Jiri Kosina wrote:
On Tue, 10 Jun 2014, Linus Torvalds wrote:
Lets be crazy and Cc Linus on that.
Quite frankly, I hate seeing something like this:
kernel/printk/printk.c | 1218
+--
for something that
Most of the GPMC functions are now not used by other drivers.
Make them private.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/mach-omap2/gpmc.c | 84 ++
arch/arm/mach-omap2/gpmc.h | 63 --
2 files changed, 56
Don't access any GPMC registers here. Use gpmc_generic_init()
to pass GPMC Chip Select settings, platform device and platform data
to the GPMC driver.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/mach-omap2/gpmc-onenand.c | 53 --
1 file changed, 11
Hi Jon,
I have a Intel Haswell platform in hand, and our team want to use NTB in
this platform.
I checked the current intel NTB driver in Linux kernel, I found the Haswell NTB
pci device id
is not contained in ntb_pci_tbl[]. I want to know whether current kernel ntb
driver can support
the
This function should only be called by board init code for
legacy boot.
Re-arrange init order so that gpmc device is created after
the gpmc platform data is initialized by board files.
i.e. move omap_gpmc_init() to subsys_initcall.
Load gpmc platform driver later in the boot process.
i.e. move
On Wed, Jun 11, 2014 at 10:59:21AM +0200, Peter Zijlstra wrote:
On Wed, Jun 11, 2014 at 10:14:11AM +0200, Paul Bolle wrote:
On Fri, 2014-06-06 at 05:20 -0700, tip-bot for Waiman Long wrote:
+#if !defined(CONFIG_X86_OOSTORE) !defined(CONFIG_X86_PPRO_FENCE)
X86_OOSTORE was removed in
The retime() function is not provided by board files so get rid of
it from omap_smc91x_platform_data().
Instead change it to smc91c96_get_device_timing() to get the device
timings.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/mach-omap2/board-3430sdp.c | 8 --
Provide NAND specific resources and platform data.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/mach-omap2/gpmc.c | 45 +
1 file changed, 45 insertions(+)
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index
Move OneNAND specific device tree parsing to NAND driver.
The OneNAND device node must have its own compatible id.
Add a new property 'ti,onenand-sync-rw' to indicate
synchronous read + write support. Default mode would be
only synchronous reads.
Signed-off-by: Roger Quadros rog...@ti.com
---
This function populates platform data for the specified Chip Select.
It should be called by board init code.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/mach-omap2/gpmc.c | 79 ++
arch/arm/mach-omap2/gpmc.h | 6
2 files changed, 85
Add compatible id, fix chip select partition size and
I/O space size. OneNAND devices just need 128KB for I/O
and the minimum possible chips select partition can be
16MB.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/omap2420-n8x0-common.dtsi | 5 +++--
Add gpmc_probe_legacy() that will be called for non DT boots. This function
will use platform data to setup each chip select and populate the child
platform device for each of the chip selects.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/mach-omap2/gpmc.c | 129
Don't access any GPMC registers here. Use gpmc_generic_init()
to pass GPMC Chip Select settings, platform device and platform data
to the GPMC driver.
CC: Felipe Balbi ba...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/mach-omap2/usb-tusb6010.c | 78
Don't access any GPMC registers here. Use gpmc_generic_init()
to pass GPMC Chip Select settings, platform device and platform data
to the GPMC driver.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/mach-omap2/gpmc-smc91x.c | 50 +++
1 file changed, 19
Don't access any GPMC registers here. Use gpmc_generic_init()
to pass GPMC Chip Select settings, platform device and platform data
to the GPMC driver.
Some boards use multiple smsc911x devices, so we dynamically
allocate pdev and pdata.
Signed-off-by: Roger Quadros rog...@ti.com
---
Some devices (e.g. TUSB6010, omap-onenand) need to reconfigure the GPMC
timings in order to operate with different peripheral clock frequencies.
Introduce omap_gpmc_retime() to allow them to do that. The driver
needs to pass the chips select number, GPMC settings and Device timings to
In order to change the GPMC settings/timings on the fly,
we must use omap_gpmc_retime(). The other gpmc_*() functions
will soon be made private and moved out of arch/mach-omap2/
CC: Felipe Balbi ba...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/mach-omap2/usb-tusb6010.c | 94
None of the OMAP platforms are suppying the regulator_can_sleep
parameter via platform data. Regulator management is generic
enough to be done in onenand_base driver if required.
Mark the regulator_can_sleep platform data parameter as deprecated.
Signed-off-by: Roger Quadros rog...@ti.com
---
On Wed, Jun 11, 2014 at 11:51:25AM +0400, Cyrill Gorcunov wrote:
On Wed, Jun 11, 2014 at 11:27:43AM +0400, Andrew Vagin wrote:
...
+#ifdef CONFIG_CHECKPOINT_RESTORE
+static long timerfd_ioctl(struct file *file, unsigned int cmd, unsigned long
arg)
+{
+ struct timerfd_ctx *ctx =
Add compatible id, interrupts and update reg property description.
As the NAND controller needs access to GPMC register space, we need
to pass a second memory resource to the NAND controller node.
Due to the wierd way the reg property has been implemented (i.e.
CS number required in 1st number of
GPMC_CLK is the external clock output pin that is used for syncronous
accesses.
Device drivers need to know the fastest possible GPMC_CLK period in order
to calculate the most optimal device timings. Add the function
omap_gpmc_get_clk_period() to allow drivers to get the nearset possible
(equal
The beagle board contains a 16-bit NAND device connected to
chip select 0 of the GPMC controller.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/omap3-beagle.dts | 53 ++
1 file changed, 53 insertions(+)
diff --git
Make sure bank-width property provided via DT is sane.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/mach-omap2/gpmc.c | 17 +
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index c713616..70cb6b0
Move NAND specific device tree parsing to NAND driver.
The NAND controller node must have a compatible id, register space
resource and interrupt resource.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/mach-omap2/gpmc-nand.c | 5 +-
arch/arm/mach-omap2/gpmc.c
On 11/06/2014 10:55, Wolfram Sang wrote:
+MODULE_LICENSE(GPL);
GPL v2
Oops, I missed this one.
Sorry for the inconvenience.
--
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
--
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Add compatible id, GPMC register resource and interrupt
resource to NAND controller nodes.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/am335x-evm.dts | 8 ++--
arch/arm/boot/dts/am335x-igep0033.dtsi | 8 ++--
arch/arm/boot/dts/am43x-epos-evm.dts | 8
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