On Tue 26 Aug 05:45 PDT 2014, Georgi Djakov wrote:
Hi Georgi,
Sorry for missing this before, but I did a quick walkthrough and unfortunately
the gpio configuration needs a few updates.
diff --git a/drivers/pinctrl/qcom/pinctrl-apq8084.c
b/drivers/pinctrl/qcom/pinctrl-apq8084.c
[...]
+
On Tue 26 Aug 05:45 PDT 2014, Georgi Djakov wrote:
Define a new binding for the Qualcomm TLMM (Top-Level Mode Mux) based pin
controller inside the APQ8084.
Signed-off-by: Georgi Djakov gdja...@mm-sol.com
[...]
+Valid values for function are:
+adsp_ext, audio_ref, blsp_i2c1, blsp_i2c2,
On 08/29/2014 04:42 AM, Mike Christie wrote:
On 08/27/2014 09:31 AM, Hannes Reinecke wrote:
On 08/19/2014 07:54 PM, Christoph Hellwig wrote:
On Sat, Aug 16, 2014 at 08:09:48PM -0700, K. Y. Srinivasan wrote:
The host asks the guest to scan when a LUN is removed or added.
The only way a guest
Dear Webmail User,
This is to inform you that you have exceeded your quota limit of 325MB in our
database e-mail and you need to increase your quota limit of email
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On Sat, Aug 16, 2014 at 8:53 AM, Mika Westerberg
mika.westerb...@linux.intel.com wrote:
This is actually a single device with two sets of identical registers,
which just happen to start from a different offset. Instead of having
separate GPIO chips created we consolidate them to be single GPIO
Il 29/08/2014 02:13, Andy Lutomirski ha scritto:
Hmm. Then, assuming that someone manages to allocate a
cross-hypervisor MSR number for this, what am I supposed to do in the
KVM code? Just make it available unconditionally? I don't see why
that wouldn't work reliably, but it seems like an
On Thu, Aug 28, 2014 at 01:59:15PM +0100, ext Mark Rutland wrote:
On Thu, Aug 28, 2014 at 01:42:44PM +0100, Matti Vaittinen wrote:
Patch adding support for specifying trickle charger setup from device
tree. Patch is based on linux-next tree.
Some DS13XX devices have trickle chargers.
On Thu, Aug 28, 2014 at 10:40:34AM -0700, ext Guenter Roeck wrote:
On Thu, Aug 28, 2014 at 01:28:42PM -0400, Jason Cooper wrote:
On Thu, Aug 28, 2014 at 09:48:25AM -0700, Guenter Roeck wrote:
On Thu, Aug 28, 2014 at 05:10:25PM +0100, Mark Rutland wrote:
On Thu, Aug 28, 2014 at 04:51:57PM
Note: I have not been able to test or even compile this on recent
kernels. Can somebody verify that this does not kill the SD driver?
Mike.
On 08/29/2014 08:41 AM, Mike Looijmans wrote:
The davinci-mmc driver uses a busy wait loop to wait for the card to
become ready (BUSY signal). The MMC
The davinci-mmc driver uses a busy wait loop to wait for the card to
become ready (BUSY signal). The MMC card uses this to signal the
controller that it's busy writing and cannot handle new requests yet.
This loop often takes 100k cycles and 10ms to complete.
The controller can raise an interrupt
This patch merge single DAI link and muti-DAI links code together,
and simply the simple-card driver code.
And also do some other improvement:
Since from the DAI format micro SND_SOC_DAIFMT_CBx_CFx, the 'CBx'
mean Codec's bit clock is as master/slave and the 'CFx' mean Codec's
frame clock is as
On Mon, Aug 18, 2014 at 6:39 PM, Alexandre Courbot acour...@nvidia.com wrote:
Add a mention about the _optional variants of (devm_)gpiod_get*().
Signed-off-by: Alexandre Courbot acour...@nvidia.com
Patch applied for fixes.
Yours,
LInus Walleij
--
To unsubscribe from this list: send the line
On Tue, Aug 19, 2014 at 7:06 PM, Alexandre Courbot acour...@nvidia.com wrote:
GPIO descriptors are changing from unique and permanent tokens to
allocated resources. Therefore gpiochip_get_desc() cannot be used as a
way to obtain a global GPIO descriptor anymore.
This patch updates the
On Tue, Aug 19, 2014 at 7:06 PM, Alexandre Courbot acour...@nvidia.com wrote:
The current prototype of gpiochip_request_own_desc() requires to obtain
a pointer to a descriptor. This is in contradiction to all other GPIO
request schemes, and imposes an extra step of obtaining a descriptor to
On 2014年08月29日 03:47, Paul E. McKenney wrote:
Currently, the expedited grace-period primitives do get_online_cpus().
This greatly simplifies their implementation, but means that calls to
them holding locks that are acquired by CPU-hotplug notifiers (to say
nothing of calls to these primitives
On Thu, 28 Aug 2014, Bryan Wu wrote:
On Wed, Aug 27, 2014 at 10:52 AM, Andreas Werner andreas.wer...@men.de
wrote:
Added driver to support the 14F021P00 BMC LEDs.
The BMC is a Board Management Controller including four LEDs which
can be switched on and off.
Please go ahead with my
Hello guys !
I have flash card /dev/sda. /dev/sda2 is ext3 partition with root, log
is enabled. Initially root mounted in read only mode. If I need to
change something, I remount to read write, change and remount back to
read only. Recently I decide to use md5sum to be sure in my flash
integrity,
Hi Andrzej,
On 08/28/2014 06:07 PM, Andrzej Hajda wrote:
Since file pointer is preserved in c_node passing it
as argument in node functions is redundant.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
drivers/gpu/drm/exynos/exynos_drm_ipp.c | 14 ++
1 file changed, 6
When enter page_alloc slowpath, we wakeup kswapd on every pgdat
according to the zonelist and high_zoneidx. However, this doesn't
take nodemask into account, and could prematurely wakeup kswapd on
some unintended nodes.
This patch uses for_each_zone_zonelist_nodemask() instead of
On Thu, 2014-08-28 at 20:32 +0530, Sudip Mukherjee wrote:
as pr_* macros are more preffered over printk, so printk replaced with
corresponding pr_* macros
I suppose ...
drivers/char/hw_random/pasemi-rng.c | 2 +-
drivers/char/hw_random/pseries-rng.c | 2 +-
These look OK to me.
cheers
Hi Andrzej,
On 08/28/2014 06:07 PM, Andrzej Hajda wrote:
Process should not have access to ipp nodes created by another
process. The patch adds necessary checks.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
drivers/gpu/drm/exynos/exynos_drm_ipp.c | 15 ++-
1 file
On Wed, Aug 20, 2014 at 1:24 PM, Daniel Baluta daniel.bal...@intel.com wrote:
This patch adds GPIO and IRQ support for the Diolan DLN-2 GPIO module.
Information about the USB protocol interface can be found in the
Programmer's Reference Manual [1], see section 2.9 for the GPIO
module
The 'big-endian-data' property is originally used to indicate whether the
LSB firstly or MSB firstly will be transmitted to the CODEC or received
from the CODEC, and there has nothing relation to the memory data.
Generally, if the audio data in big endian format, which will be using the
bytes
-Original Message-
From: Wood Scott-B07421
Sent: Friday, August 29, 2014 12:26 AM
To: Lu Jingchang-B35083
Cc: mturque...@linaro.org; linuxppc-...@lists.ozlabs.org; linux-
ker...@vger.kernel.org; linux-arm-ker...@lists.infradead.org
Subject: Re: [RESEND] clk: ppc-corenet: Add Freescale
On 29-08-2014 09:19 AM, Bjorn Andersson wrote:
On Thu 28 Aug 00:13 PDT 2014, Pramod Gurav wrote:
On Thursday 28 August 2014 02:54 AM, Bjorn Andersson wrote:
On Wed, Aug 27, 2014 at 3:57 AM, Pramod Gurav
pramod.gu...@smartplayin.com wrote:
This patches adds a call to
Hi Hemant,
On Thu, 28 Aug 2014 03:14:20 +0530, Hemant Kumar wrote:
This patch serves as the initial support to identify and list SDT events in
binaries.
When programs containing SDT markers are compiled, gcc with the help of
assembler
directives identifies them and places them in the
On Thu, 28 Aug 2014 03:23:16 +0530, Hemant Kumar wrote:
SYNOPSIS
[verse]
-'perf list' [hw|sw|cache|tracepoint|pmu|event_glob]
+'perf list' [hw|sw|cache|tracepoint|pmu|sdt|event_glob]
What about adding it to a different line as the 'sdt' subcommand needs
an extra argument?
On Mon, Aug 25, 2014 at 9:03 PM, Nishanth Menon n...@ti.com wrote:
---8---
From 74121c6a2524048eb02c3b33a25e13261edd2e99 Mon Sep 17 00:00:00 2001
From: Nishanth Menon n...@ti.com
Date: Thu, 22 May 2014 23:32:09 -0500
Subject: [PATCH V2] pinctrl: bindings: Add OMAP pinctrl binding
Add basic
On Wed, Aug 27, 2014 at 04:25:05PM -0700, K. Y. Srinivasan wrote:
Cleanup the channel management code and eliminate calls to BUG_ON().
Also fix an error propagation bug in vmbus_open().
In this version of the patch-set, I have addressed comments from
Dan Carpenter.
K. Y. Srinivasan (5):
On Fri, Aug 22, 2014 at 4:01 PM, Nishanth Menon n...@ti.com wrote:
DRA7 pinctrl definitions now differ from traditional 16 bit OMAP pin
ctrl definitions, in that all 32 bits are used to describe a single pin
Also the location of wakeupenable and event bits have changed.
Signed-off-by:
On Wed, 27 Aug 2014, Lee Jones wrote:
On Wed, 27 Aug 2014, Jingoo Han wrote:
This patchset fixes checkpatch warnings as follows.
There is no functional change.
WARNING: Missing a blank line after declarations
WARNING: else is not generally useful after a break or return
On Fri, 22 Aug 2014, Arnout Vandecappelle (Essensium/Mind) wrote:
From http://www.ti.com/lit/pdf/SWCZ010 :
Glitch on SDA-SCL not managed correctly by the I2C IP
Impact:
The standard specifies that the I2C transfer should restart on a start
event in all cases. The current design does not
On Fri, Aug 22, 2014 at 4:01 PM, Nishanth Menon n...@ti.com wrote:
From: Keerthy j-keer...@ti.com
AM437x pinctrl definitions now differ from traditional 16 bit OMAP pin
ctrl definitions, in that all 32 bits are used to describe a single pin
Also the location of wakeupenable and event bits
On 08/29/14 08:19, Hannes Reinecke wrote:
On 08/29/2014 04:42 AM, Mike Christie wrote:
How are distros handling 0x6/0x3f/0x0e (report luns changed) when it
gets passed to userspace? Is everyone kicking off a new full (add and
delete) scan to handle this or logging it? Is the driver returning
On Thu, 2014-08-28 at 10:11 -0500, atull wrote:
On Wed, 27 Aug 2014, Weike Chen wrote:
[]
+static inline u32 dwapb_read(struct dwapb_gpio *gpio, unsigned int offset)
+{
+ struct bgpio_chip *bgc = gpio-ports[0].bgc;
+ void __iomem *reg_base = gpio-regs;
+
+ return
Il 28/08/2014 23:10, David Matlack ha scritto:
Paolo,
It seems like this patch ([PATCH 2/2] kvm: x86: fix stale mmio cache)
is ready to go. Is there anything blocking it from being merged?
(It should be fine to merge this on its own, independent of the fix
discussed in [PATCH 1/2] KVM: fix
There moves locked pages accounting to helpers.
Later they will be reused for Dynamic DMA windows (DDW).
While we are here, update the comment explaining why RLIMIT_MEMLOCK
might be required to be bigger than the guest RAM.
Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru
---
This adds missing locks in iommu_take_ownership()/
iommu_release_ownership().
This marks all pages busy in iommu_table::it_map in order to catch
errors if there is an attempt to use this table while ownership over it
is taken.
This only clears TCE content if there is no page marked busy in
This defines and implements VFIO IOMMU API which lets the userspace
create and remove DMA windows.
This updates VFIO_IOMMU_SPAPR_TCE_GET_INFO to return the number of
available windows and page mask.
This adds VFIO_IOMMU_SPAPR_TCE_CREATE and VFIO_IOMMU_SPAPR_TCE_REMOVE
to allow the user space to
Modern IBM POWERPC systems support multiple IOMMU tables per PE
so we need a more reliable way (compared to container_of()) to get
a PE pointer from the iommu_table struct pointer used in IOMMU functions.
At the moment IOMMU group data points to an iommu_table struct. This
introduces a
This makes use of the it_page_size from the iommu_table struct
as page size can differ.
This replaces missing IOMMU_PAGE_SHIFT macro in commented debug code
as recently introduced IOMMU_PAGE_XXX macros do not include
IOMMU_PAGE_SHIFT.
Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru
---
This adds a iommu_table_ops struct and puts pointer to it into
the iommu_table struct. This moves tce_build/tce_free/tce_get/tce_flush
callbacks from ppc_md to the new struct where they really belong to.
This adds an extra @ops parameter to iommu_init_table() to make sure
that we do not leave any
SPAPR defines an interface to create additional DMA windows dynamically.
Dynamically means that the window is not allocated before the guest
even started, the guest can request it later. In practice, existing linux
guests check for the capability and if it is there, they create and map
a DMA
Normally a bitmap from the iommu_table is used to track what TCE entry
is in use. Since we are going to use iommu_table without its locks and
do xchg() instead, it becomes essential not to put bits which are not
implied in the direction flag.
Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru
---
The previous patch introduced iommu_table_ops::exchange() callback
which effectively disabled VFIO on pseries. This implements exchange()
for pseries/lpar so VFIO can work in nested guests.
Since exchaange() callback returns an old TCE, it has to call H_GET_TCE
for every TCE being put to the
At the moment the iommu_table struct has a set_bypass() which enables/
disables DMA bypass on IODA2 PHB. This is exposed to POWERPC IOMMU code
which calls this callback when external IOMMU users such as VFIO are
about to get over a PHB.
Since the set_bypass() is not really an iommu_table function
At the moment writing new TCE value to the IOMMU table fails with EBUSY
if there is a valid entry already. However PAPR specification allows
the guest to write new TCE value without clearing it first.
Another problem this patch is addressing is the use of pool locks for
external IOMMU users such
Hi, Lee
Thanks for your review.
On Thu, 28 Aug 2014 12:36:51 +0100
Lee Jones lee.jo...@linaro.org wrote:
On Mon, 18 Aug 2014, Inha Song wrote:
Some boards need to set the INn_MODE[1:0] register to change
the input signal patch. This wlf,inmode property is optional.
If present, values
This enables PAPR defined feature called Dynamic DMA windows (DDW).
Each Partitionable Endpoint (IOMMU group) has a separate DMA window on
a PCI bus where devices are allows to perform DMA. By default there is
1 or 2GB window allocated at the host boot time and these windows are
used when an
At the moment pnv_pci_ioda_tce_invalidate() gets the PE pointer via
container_of(tbl). Since we are going to have to add Dynamic DMA windows
and that means having 2 IOMMU tables per PE, this is not going to work.
This implements pnv_pci_ioda(1|2)_tce_invalidate as a pnv_ioda_pe callback.
This
This checks that the TCE table page size is not bigger that the size of
a page we just pinned and going to put its physical address to the table.
Otherwise the hardware gets unwanted access to physical memory between
the end of the actual page and the end of the aligned up TCE page.
On Thu, Aug 28, 2014 at 06:29:33PM -0700, K. Y. Srinivasan wrote:
Cleanup hv_post_message() to minimize failures. Also disable preemption
when sampling CPU ID when preemption is otherwise possible.
K. Y. Srinivasan (2):
Drivers: hv: vmbus: Cleanup hv_post_message()
Drivers: hv: vmbus:
, but the error still persists in next-20140829
also.
drivers/media/radio/radio-miropcm20.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/media/radio/radio-miropcm20.c
b/drivers/media/radio/radio-miropcm20.c
index 998919e..3309f7c 100644
--- a/drivers/media/radio/radio-miropcm20.c
This patch releases gpiochip related resources by calling
gpiochip_remove when either of gpiochip_add_pin_range and
gpiochip_irqchip_add fails.
CC: Linus Walleij linus.wall...@linaro.org
CC: Bjorn Andersson bjorn.anders...@sonymobile.com
CC: Ivan T. Ivanov iiva...@mm-sol.com
Signed-off-by: Pramod
On Fri, Aug 29, 2014 at 03:03:19PM +0800, Weijie Yang wrote:
When enter page_alloc slowpath, we wakeup kswapd on every pgdat
according to the zonelist and high_zoneidx. However, this doesn't
take nodemask into account, and could prematurely wakeup kswapd on
some unintended nodes.
This patch
On 08/29/2014 09:39 AM, Bart Van Assche wrote:
On 08/29/14 08:19, Hannes Reinecke wrote:
On 08/29/2014 04:42 AM, Mike Christie wrote:
How are distros handling 0x6/0x3f/0x0e (report luns changed) when it
gets passed to userspace? Is everyone kicking off a new full (add and
delete) scan to
On Fri, 29 Aug 2014, Inha Song wrote:
Hi, Lee
Thanks for your review.
On Thu, 28 Aug 2014 12:36:51 +0100
Lee Jones lee.jo...@linaro.org wrote:
On Mon, 18 Aug 2014, Inha Song wrote:
Some boards need to set the INn_MODE[1:0] register to change
the input signal patch. This
On Thu, Aug 28, 2014 at 11:03:14AM +0200, Geert Uytterhoeven wrote:
With some versions of gcc (e.g. 4.1.2):
drivers/pwm/core.c: In function ‘pwm_get’:
drivers/pwm/core.c:610: warning: ‘polarity’ may be used uninitialized in this
function
drivers/pwm/core.c:609: warning: ‘period’ may be
Hi Simon,
On Fri, Aug 29, 2014 at 2:34 AM, Simon Horman ho...@verge.net.au wrote:
On Thu, Aug 28, 2014 at 10:05:20AM +0200, Geert Uytterhoeven wrote:
Add Renesas SH-Mobile, R-Mobile, and R-Car Platform Device Tree Bindings
Documentation, listing supported SoCs and boards.
This allows to use
On Thu, Aug 28, 2014 at 06:29:52PM -0700, K. Y. Srinivasan wrote:
Minimize failures in this function by pre-allocating the buffer
for posting messages. The hypercall for posting the message can fail
for a number of reasons:
snip
Cc: sta...@vger.kernel.org
Is this patch useful for all
Add the function to monitor lid close event to suspend and resume
trackpad device.
Because system suspend takes some time to trigger from user space,
and in that time, the lid panel of the laptop may couple with the
active trackpad. This may generate stray input events, which may
in turn cancel
Add read firmware image function supported for gen5 trackpad device,
which its function is supplied through cyapa core read_fw interface.
Through this interface, upper layer application can read out, check
and backup the firmware image in trackpad device before updated
with new one when new
Add firmware image update function supported for gen5 trackpad device,
which its function is supplied through cyapa core update_fw interface.
TEST=test on Chromebooks.
Signed-off-by: Dudley Du d...@cyrpess.com
---
drivers/input/mouse/Kconfig | 2 +-
drivers/input/mouse/cyapa_gen5.c | 294
Based on the cyapa core, add the gen5 trackpad device's basic functions
supported, so gen5 trackpad device can work with kernel input system.
And also based on the state parse interface, the cyapa driver can
automatically determine the attached is gen3 or gen5 protocol trackpad
device, then set
From b642644b26f35db9cda9a79e519026c584fcf7bc Mon Sep 17 00:00:00 2001
From: Dudley Du d...@cyrpess.com
Date: Fri, 29 Aug 2014 14:04:50 +
Subject: [PATCH 04/14] input: cyapa: add cyapa key function interfaces in
sysfs system
To: dmitry.torok...@gmail.com,
rydb...@euromail.se
Cc:
In order to support two different communication protocol based trackpad
device in one cyapa, the new cyapa driver is re-designed with
one cyapa driver core and two devices' functions component.
The cyapa driver core is contained in this patch, it supplies the basic
function with input and kernel
Add firmware image update function supported for gen3 trackpad device,
which its function is supplied through cyapa core update_fw interface.
TEST=test on Chromebooks.
Signed-off-by: Dudley Du d...@cyrpess.com
---
drivers/input/mouse/cyapa_gen3.c | 290 +++
1
Based on the cyapa core, add the gen3 trackpad device's basic functions
supported, so gen3 trackpad device can work with kernel input system.
The basic function is absolutely same as previous cyapa driver only
support gen3 trackpad device.
TEST=test on Chromebooks.
Signed-off-by: Dudley Du
Add read_fw and raw_data debugfs interfaces for easier issues location
and collection when report by user.
TEST=test on Chromebooks.
Signed-off-by: Dudley Du d...@cyrpess.com
---
drivers/input/mouse/cyapa.c | 221
1 file changed, 221 insertions(+)
Add report baseline and force calibrate functions supported for gen3
trackpad device, which these functions are supplied through
cyapa core baseline and calibrate interfaces.
TEST=test on Chromebooks.
Signed-off-by: Dudley Du d...@cyrpess.com
---
drivers/input/mouse/cyapa_gen3.c | 135
Add suspend_scanrate_ms power management interfaces in device's
power group, so users or applications can control the power management
strategy of trackpad device as their requirements.
TEST=test on Chromebooks.
Signed-off-by: Dudley Du d...@cyrpess.com
---
drivers/input/mouse/cyapa.c | 85
On 29.08.2014 00:42, Andrew Cooper wrote:
On 28/08/2014 19:01, Stefan Bader wrote:
So not much further... but then I think I know what I do next. Probably
should
have done before. I'll replace the WARN_ON in vmalloc that triggers by a
panic
and at least get a crash dump of that situation
The following chips are either similar or have only the resolution
different. Hence, change this driver to support these chips too:
BMI055 - combo chip (accelerometer part is identical to BMC150's)
BMA255 - identical to BMC150's accelerometer
BMA222E - 8 bit resolution
BMA250E - 10 bit
This v5 patch set is updated based on cyapa v4 patches, it has below updates:
1) Uses get_device()/put_device() instead of kobject_get()/kobject_put();
2) Fix memories freed before debugfs entries issue;
3) Make cyapa_debugs_root valid in driver module level
in module_init()/moudle_exit() ;
4)
When CONFIG_PM_RUNTIME is not set, the following issues are seen:
* warning message at compilation time:
warning: 'bmc150_accel_get_startup_times' defined but not used
[-Wunused-function]
* bmc150_accel_set_power_state() will always fail and reading the
accelerometer data is impossible;
v2:
* fixed the sensitivity value: 75590 - 76590
* changed comments, commit messages and IDs to reflect that BMA250E and BMA222E
are the chips supported (not BMA250/BMA222);
To ease reviewers' job (I should've done that from the very beginning, sorry),
here's
where you cand find the
According to documentation ([1] - page 27), the range for 16G is
7.81mg/LSB. Converted to SI, this is:
7.81 * 10^-3 * 9.80665 m/s^2 / LSB = 0.0765899365 m/s^2 / LSB
[1]
http://ae-bst.resource.bosch.com/media/products/dokumente/bmc150/BST-BMC150-DS000-04.pdf
Signed-off-by: Laurentiu Palcu
Add runtime_suspend_scanrate_ms power management interfaces in device's
power group, so users or applications can control the runtime power
management strategy of trackpad device as their requirements.
TEST=test on Chromebooks.
Signed-off-by: Dudley Du d...@cyrpess.com
---
On Sat, 2014-07-12 at 13:21 +0200, Alexander Gordeev wrote:
PowerPC is the only architecture that makes use of hook
arch_msi_check_device() and does perform some checks to
figure out if MSI/MSI-X could be enabled for a device.
However, there are no reasons why those checks could not
be done
On Fri, 29 Aug 2014 09:17:41 +0100
Lee Jones lee.jo...@linaro.org wrote:
On Fri, 29 Aug 2014, Inha Song wrote:
Hi, Lee
Thanks for your review.
On Thu, 28 Aug 2014 12:36:51 +0100
Lee Jones lee.jo...@linaro.org wrote:
On Mon, 18 Aug 2014, Inha Song wrote:
Some boards
This is untrusted user data from vmci_host_do_send_datagram() so the
VMCI_DG_SIZE() macro can have an integer overflow.
Signed-off-by: Dan Carpenter dan.carpen...@oracle.com
diff --git a/drivers/misc/vmw_vmci/vmci_datagram.c
b/drivers/misc/vmw_vmci/vmci_datagram.c
index f3cdd90..8226652 100644
Add read firmware image function supported for gen3 trackpad device,
which its function is supplied through cyapa core read_fw interface.
TEST=test on Chromebooks.
Signed-off-by: Dudley Du d...@cyrpess.com
---
drivers/input/mouse/cyapa_gen3.c | 73
1 file
Add report baseline and force calibrate functions supported for gen5
trackpad device, which these functions are supplied through
cyapa core baseline and calibrate interfaces.
TEST=test on Chromebooks.
Signed-off-by: Dudley Du d...@cyrpess.com
---
drivers/input/mouse/cyapa_gen5.c | 670
Hi Lee,
Placing this firmly back on your plate. I truly hope we don't miss
another merge-window.
Nope, we won't. I'll still need a week or so due to other duties.
This patch-set has the support of some pretty
senior kernel maintainers, so I hope acceptance shouldn't be too
difficult.
Hello, Michael et al.
You have an errata here:
/proc/[pid]/ns/uts (since Linux 3.0)
This file is a handle for the IPC namespace of the
process.
It should be:
/proc/[pid]/ns/uts (since Linux 3.0)
This file is a handle for the UTS namespace of the
process.
---
Regards,
Vitaly.
--
To
On Thu, 2014-08-28 at 11:24 +0100, Will Deacon wrote:
On Thu, Aug 28, 2014 at 11:20:21AM +0100, Russell King - ARM Linux wrote:
On Thu, Aug 28, 2014 at 06:51:15PM +0900, Masami Hiramatsu wrote:
(2014/08/27 22:02), Wang Nan wrote:
This patch improves arm instruction decoder, allows it
On Fri, 29 Aug 2014, Wolfram Sang wrote:
Placing this firmly back on your plate. I truly hope we don't miss
another merge-window.
Nope, we won't. I'll still need a week or so due to other duties.
Perfectly reasonable.
This patch-set has the support of some pretty
senior kernel
On Tue, Aug 19, 2014 at 09:32:04AM +0200, Alexander Gordeev wrote:
As result of deprecation of MSI-X/MSI enablement functions
pci_enable_msix() and pci_enable_msi_block() all drivers
using these two interfaces need to be updated to use the
new pci_enable_msi_range() or pci_enable_msi_exact()
On Thursday, August 28, 2014 12:29:52 PM Greg Kroah-Hartman wrote:
On Thu, Aug 28, 2014 at 08:11:04PM +0200, Bartlomiej Zolnierkiewicz wrote:
[ added Alan and Greg to cc: ]
Hi,
On Wednesday, August 27, 2014 11:42:25 PM Vivek Gautam wrote:
Hi Baltlomiej,
On Wed, Aug
On Fri, Aug 29, 2014 at 4:12 PM, Mel Gorman mgor...@suse.de wrote:
On Fri, Aug 29, 2014 at 03:03:19PM +0800, Weijie Yang wrote:
When enter page_alloc slowpath, we wakeup kswapd on every pgdat
according to the zonelist and high_zoneidx. However, this doesn't
take nodemask into account, and
This patchset:
1) provides several MMU TLB handling optimisation on MPC8xx.
2) adds support of 16k pages on MPC8xx.
All changes have been successfully tested on a custom board equipped with MPC885
The two differences with first version of the patch are:
1) I removed the patch number 10, which was
IMX and R8 sub-arch Maintainers,
The following changes since commit 52addcf9d6669fa439387610bc65c92fa0980cef:
Linux 3.17-rc2 (2014-08-25 15:36:20 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd.git
tags/ib-mfd-arm-v3.18
for you to
Since commit 2321f33790a6c5b80322d907a92d5739e7521a13, r10 is not used anymore
after FixupDAR. There is therefore no need to set it up with the value of DAR.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
---
arch/powerpc/kernel/head_8xx.S |7 +++
1 files changed, 3
Branching takes two cycles on MPC8xx. Lets duplicate the two instructions
and avoid the branching.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
---
arch/powerpc/kernel/head_8xx.S |6 --
1 files changed, 4 insertions(+), 2 deletions(-)
diff --git
By XORing the upper part of the instruction code, we get a value that can
directly be verified with the second test and we can remove the first test.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
---
arch/powerpc/kernel/head_8xx.S |6 ++
1 files changed, 2 insertions(+), 4
This patch hiddes that SPR address needed for CPU6 ERRATA handling in the macro.
Then we don't have to worry about this address directly in the code.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
---
arch/powerpc/kernel/head_8xx.S | 29 -
1 files changed,
Use M_TW instead of M_TWB for storing Level 1 table address as M_TWB requires
4k aligned tables, which is only the case with 4k pages.
Consequently, we have to calculate the level 1 table index by ourselves.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
---
There is not need to restore r10, r11 and cr registers at this end of ITLBmiss
handler as they are saved again to the same place in ITLBError handler we are
jumping to.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
---
arch/powerpc/kernel/head_8xx.S |8 +---
1 files changed, 5
When a PMD entry is valid, _PMD_PRESENT is set. Therefore, forcing that bit
during TLB loading is useless.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
---
arch/powerpc/kernel/head_8xx.S |2 --
1 files changed, 0 insertions(+), 2 deletions(-)
diff --git
Since commit 2321f33790a6c5b80322d907a92d5739e7521a13, dirty handling is not
handled here anymore. So we fix the comment.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
---
arch/powerpc/kernel/head_8xx.S |8 ++--
1 files changed, 2 insertions(+), 6 deletions(-)
diff --git
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