On 28-05-15 23:48, Michael Turquette wrote:
Hi Mike,
Quoting Mike Looijmans (2014-12-03 23:26:15)
This driver supports the TI CDCE925 programmable clock synthesizer.
The chip contains two PLLs with spread-spectrum clocking support and
five output dividers. The driver only supports the
* Andi Kleen a...@linux.intel.com wrote:
So instead of this flat structure, there should at minimum be broad
categorization
of the various parts of the hardware they relate to: whether they relate to
the
branch predictor, memory caches, TLB caches, memory ops, offcore, decoders,
Takashi, all,
On several of my machines there is no longer any sound output when
running the latest linux-next (20150528). Activity can be seen in a
mixer such as pavucontrol suggesting that there should be sound, but
both the speakers and head phones are silent.
I have bisected the kernel and
On 03/15/2015 08:59 AM, Josh Triplett wrote:
This patch series introduces a new clone flag, CLONE_FD, which lets the caller
receive child process exit notification via a file descriptor rather than
SIGCHLD. CLONE_FD makes it possible for libraries to safely launch and manage
child processes
At Fri, 29 May 2015 09:37:44 +0200,
Takashi Iwai wrote:
At Fri, 29 May 2015 00:27:14 -0700,
Jeremiah Mahler wrote:
Takashi, all,
On several of my machines there is no longer any sound output when
running the latest linux-next (20150528). Activity can be seen in a
mixer such as
Commit-ID: 7ba554b5ac69e5f3edac9ce3233beb5acd480878
Gitweb: http://git.kernel.org/tip/7ba554b5ac69e5f3edac9ce3233beb5acd480878
Author: Jan Beulich jbeul...@suse.com
AuthorDate: Thu, 28 May 2015 09:16:45 +0100
Committer: Ingo Molnar mi...@kernel.org
CommitDate: Fri, 29 May 2015 09:46:40
Hi,
I just made a freak change to let reporters to try.
https://bugzilla.kernel.org/attachment.cgi?id=178271action=diff
I'll report back after seeing their test results.
Thanks and best regards
-Lv
From: Zheng, Lv
Sent: Wednesday, May 27, 2015 1:57 PM
Hi,
Let me Cc intel power
Add Ultraviolet(UV) support:
UVA: 315 ~ 400 nm
UVB: 280 ~ 315 nm
UVC: 100 ~ 280 nm
Signed-off-by: Kevin Tsai kt...@capellamicro.com
---
drivers/iio/industrialio-core.c | 3 +++
include/uapi/linux/iio/types.h | 3 +++
tools/iio/iio_event_monitor.c | 6 ++
3 files changed, 12 insertions(+)
* Naveen N. Rao naveen.n@linux.vnet.ibm.com wrote:
/proc/pid/schedstat is currently only available if CONFIG_SCHEDSTATS is
enabled. But, all the fields that this exposes are available and valid
if CONFIG_TASK_DELAY_ACCT is enabled as well.
Signed-off-by: Naveen N. Rao
On 05/29/2015 09:47 AM, Len Brown wrote:
However, a clear pattern jumped out of the trace for how long
the BSP waits for the AP to set itself in cpu_callin_mask.
This is the time in start secondary where cpu_init() is running,
up through smp_callin() is called.
On the 1st package, each remote
Commit 5261ef2ea836 (ARM: 8366/1: move Dual-Timer SP804 driver to
drivers/clocksource) moved SP804 to drivers/clocksource resulting in
it being selectable on platforms/architectures without the config
GENERIC_SCHED_CLOCK enabled. Due to that, it results in the following
build failure(e.g. x86_64
- Add pinmux for UART_0 RTS/CTS pins.
- Since hardware can handle RTS/CTS flow control automatically,
remove manual control of RTS/CTS from set/get mctrl.
- Add RS-485 support for Vybird platform.
Bhuvanchandra DV (3):
ARM: dts: colibri-vf: Add pinmux for UART_0 aka UART_A RTS/CTS pins
Enable Vybrid's build-in support for RS-485 auto RTS for
controlling line direction of RS-485 transceiver driver.
Signed-off-by: Bhuvanchandra DV bhuvanchandra...@toradex.com
---
drivers/tty/serial/fsl_lpuart.c | 60 +
1 file changed, 60 insertions(+)
Signed-off-by: Bhuvanchandra DV bhuvanchandra...@toradex.com
---
arch/arm/boot/dts/vf-colibri.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/vf-colibri.dtsi
b/arch/arm/boot/dts/vf-colibri.dtsi
index 68ca125..ad6c5ca 100644
--- a/arch/arm/boot/dts/vf-colibri.dtsi
+++
The LPUART does not provide manual control of RTS/CTS signals,
those can only be controlled by the hardware directly. Therefore
manual control of those signals through mctrl can not be provided.
The current implementation enables/disables the automatic control,
which is not what mctrl should do,
Hi Felipe,
After merging the usb-gadget tree, today's linux-next build (x86_64
allmodconfig) failed like this:
In file included from include/linux/module.h:17:0,
from drivers/usb/gadget/legacy/nokia.c:19:
drivers/usb/gadget/legacy/nokia.c: In function '__check_num_buffers':
The iommu_table struct keeps a list of IOMMU groups it is used for.
At the moment there is just a single group attached but further
patches will add TCE table sharing. When sharing is enabled, TCE cache
in each PE needs to be invalidated so does the patch.
This does not change
The existing implementation accounts the whole DMA window in
the locked_vm counter. This is going to be worse with multiple
containers and huge DMA windows. Also, real-time accounting would requite
additional tracking of accounted pages due to the page size difference -
IOMMU uses 4K pages and
This is to make extended ownership and multiple groups support patches
simpler for review.
This should cause no behavioural change.
Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru
[aw: for the vfio related changes]
Acked-by: Alex Williamson alex.william...@redhat.com
Reviewed-by: David Gibson
Modern IBM POWERPC systems support multiple (currently two) TCE tables
per IOMMU group (a.k.a. PE). This adds a iommu_table_group container
for TCE tables. Right now just one table is supported.
This defines iommu_table_group struct which stores pointers to
iommu_group and iommu_table(s). This
On Thu, May 28, 2015 at 08:41:46PM +0200, Matthias Brugger wrote:
Some devices like SoCs from Mediatek need to use the clock muxes
through a regmap interface.
This patch adds regmap support for simple the simple multiplexer
clock code.
Signed-off-by: Matthias Brugger matthias@gmail.com
On Mon, May 25, 2015 at 6:51 AM, Christoph Hellwig h...@lst.de wrote:
On Sun, May 24, 2015 at 12:37:32AM -0700, Ming Lin wrote:
Except for that these changes looks good, and the previous version
passed my tests fine, so with some benchmarks you'ĺl have my ACK.
I'll test it on a 2 sockets
Hi Matthias,
On 28 May 2015 at 20:41, Matthias Brugger matthias@gmail.com wrote:
Some devices like SoCs from Mediatek need to use the clock muxes
through a regmap interface.
This patch adds regmap support for simple the simple multiplexer
clock code.
Nice to see regmap support. This
On Fri, May 29, 2015 at 3:16 AM, Eric Anholt e...@anholt.net wrote:
Stephen Warren swar...@wwwdotorg.org writes:
On 05/13/2015 02:10 PM, Eric Anholt wrote:
With the VC reader blocked and the ARM writing, MAIL0_STA reads empty
permanently while MAIL1_STA goes from empty (0x4000) to
The following changes since commit 3e0283a53f7d2f2dae7bc4aa7f3104cb5988018f:
Merge tag 'pm+acpi-4.1-rc3' of
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm (2015-05-07
15:58:00 -0700)
are available in the git repository at:
On Thu, 2015-05-28 at 13:51 +0800, Li Bin wrote:
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
select HAVE_DYNAMIC_FTRACE
+ select HAVE_DYNAMIC_FTRACE_WITH_REGS if HAVE_DYNAMIC_FTRACE
What's the point of if HAVE_DYNAMIC_FTRACE here? That test should
always evaluate to true,
Linus,
please pull sound fixes for v4.1-rc6 from:
git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound.git
tags/sound-4.1-rc6
The topmost commit is b40eda6408e94ee286cb5720cd3f409f70e01778
sound fixes for 4.1-rc6
No big
* Andy Lutomirski l...@amacapital.net wrote:
On May 28, 2015 1:16 AM, Jan Beulich jbeul...@suse.com wrote:
While commit efa7045103 (x86/asm/entry: Make user_mode() work
correctly if regs came from VM86 mode) claims that user_mode() is now
identical to user_mode_vm(), this wasn't
* Stephen Rothwell s...@canb.auug.org.au wrote:
Hi all,
After merging the kvm tree, today's linux-next build (x86_64
allmodconfig) failed like this:
arch/x86/kvm/cpuid.c: In function 'kvm_update_cpuid':
arch/x86/kvm/cpuid.c:98:2: error: implicit declaration of function
'use_eager_fpu'
On 2015/5/29 15:14, Paul Bolle wrote:
On Thu, 2015-05-28 at 13:51 +0800, Li Bin wrote:
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
select HAVE_DYNAMIC_FTRACE
+select HAVE_DYNAMIC_FTRACE_WITH_REGS if HAVE_DYNAMIC_FTRACE
What's the point of if HAVE_DYNAMIC_FTRACE here? That
On Fri, May 29, 2015 at 02:38:44PM +0900, Hiraku Toyooka wrote:
Kexec_load syscall in ARM checks that machine-specific code
has the smp_ops.cpu_kill() before loading kernel image.
This patch adds the cpu_kill(), as a result, kexec reboot and
kernel crash dump become available in mach-socfpga.
This replaces direct accesses to TCE table with a helper which
returns an TCE entry address. This does not make difference now but will
when multi-level TCE tables get introduces.
No change in behavior is expected.
Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru
Reviewed-by: David Gibson
This is a part of moving TCE table allocation into an iommu_ops
callback to support multiple IOMMU groups per one VFIO container.
This moves the code which allocates the actual TCE tables to helpers:
pnv_pci_ioda2_table_alloc_pages() and pnv_pci_ioda2_table_free_pages().
These do not
This is a part of moving DMA window programming to an iommu_ops
callback. pnv_pci_ioda2_set_window() takes an iommu_table_group as
a first parameter (not pnv_ioda_pe) as it is going to be used as
a callback for VFIO DDW code.
This adds pnv_pci_ioda2_tvt_invalidate() to invalidate TVT as it is
a
This adds tce_iommu_take_ownership() and tce_iommu_release_ownership
which call in a loop iommu_take_ownership()/iommu_release_ownership()
for every table on the group. As there is just one now, no change in
behaviour is expected.
At the moment the iommu_table struct has a set_bypass() which
This extends iommu_table_group_ops by a set of callbacks to support
dynamic DMA windows management.
create_table() creates a TCE table with specific parameters.
it receives iommu_table_group to know nodeid in order to allocate
TCE table memory closer to the PHB. The exact format of allocated
Before the IOMMU user (VFIO) would take control over the IOMMU table
belonging to a specific IOMMU group. This approach did not allow sharing
tables between IOMMU groups attached to the same container.
This introduces a new IOMMU ownership flavour when the user can not
just control the existing
The existing code has 3 calls to iommu_register_group() and
all 3 branches actually cover all possible cases.
This replaces 3 calls with one and moves the registration earlier;
the latter will make more sense when we add TCE table sharing.
Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru
The pnv_pci_ioda_tce_invalidate() helper invalidates TCE cache. It is
supposed to be called on IODA1/2 and not called on p5ioc2. It receives
start and end host addresses of TCE table.
IODA2 actually needs PCI addresses to invalidate the cache. Those
can be calculated from host addresses but since
This adds a way for the IOMMU user to know how much a new table will
use so it can be accounted in the locked_vm limit before allocation
happens.
This stores the allocated table size in pnv_pci_ioda2_get_table_size()
so the locked_vm counter can be updated correctly when a table is
being
There moves locked pages accounting to helpers.
Later they will be reused for Dynamic DMA windows (DDW).
This reworks debug messages to show the current value and the limit.
This stores the locked pages number in the container so when unlocking
the iommu table pointer won't be needed. This does
At the moment DMA map/unmap requests are handled irrespective to
the container's state. This allows the user space to pin memory which
it might not be allowed to pin.
This adds checks to MAP/UNMAP that the container is enabled, otherwise
-EPERM is returned.
Signed-off-by: Alexey Kardashevskiy
Modern IBM POWERPC systems support multiple (currently two) TCE tables
per IOMMU group (a.k.a. PE). This adds a iommu_table_group container
for TCE tables. Right now just one table is supported.
For IODA, instead of embedding iommu_table, the new iommu_table_group
keeps pointers to those. The
So far an iommu_table lifetime was the same as PE. Dynamic DMA windows
will change this and iommu_free_table() will not always require
the group to be released.
This moves iommu_group_put() out of iommu_free_table().
This adds a iommu_pseries_free_table() helper which does
iommu_group_put() and
On Wed, May 27, 2015 at 09:19:03AM -0600, Toshi Kani wrote:
This patch refactors the !pat_enabled code paths and integrates
Please refrain from using such empty phrases like This patch does this
and that in your commit messages - it is implicitly obvious that it is
this patch when one reads it.
On Wed, May 27, 2015 at 09:19:02AM -0600, Toshi Kani wrote:
pat_init() uses two flags, 'boot_cpu' and 'boot_pat_state', for
tracking the boot CPU's initialization status. 'boot_pat_state'
is also overloaded to carry the boot PAT value.
This patch cleans this up by replacing them with a new
Dear Andrew Andrianov,
On Sat, 11 Apr 2015 23:29:19 +0300, Andrew Andrianov wrote:
Signed-off-by: Andrew Andrianov and...@ncrmnt.org
---
drivers/pinctrl/mvebu/pinctrl-armada-370.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
There are two types for pinctrl maps: pinmux and pinconfig.
This debug message shows the number of maps with both types.
The string pinmux map is not precise. Let's say pinctrl map
instead.
While we are here, fix the %d/%u mismatch too.
Signed-off-by: Masahiro Yamada
On Fri, May 29, 2015 at 2:15 AM, Stephen Warren swar...@wwwdotorg.org wrote:
On 05/13/2015 02:10 PM, Eric Anholt wrote:
With the VC reader blocked and the ARM writing, MAIL0_STA reads empty
permanently while MAIL1_STA goes from empty (0x4000) to non-empty
(0x0001-0x0007) to full
Hi,
On Thu, 2015-05-28 at 17:23 +0300, Roger Quadros wrote:
+Peter Li,
Ivan,
On 28/05/15 11:45, Ivan T. Ivanov wrote:
Hi Chanwoo,
On Wed, 2015-05-27 at 21:15 +0900, Chanwoo Choi wrote:
Previously, I discussed how to inform the changed state of both ID
and VBUS pin for USB
Hi,
On Thu, 2015-05-28 at 17:23 +0300, Roger Quadros wrote:
+Peter Li,
Ivan,
On 28/05/15 11:45, Ivan T. Ivanov wrote:
Hi Chanwoo,
On Wed, 2015-05-27 at 21:15 +0900, Chanwoo Choi wrote:
Previously, I discussed how to inform the changed state of both ID
and VBUS pin for USB
On Wed, 2015-05-27 at 15:04 -0400, r...@redhat.com wrote:
A previous attempt to resolve a major conflict between load balancing and
NUMA balancing, changeset 095bebf61a46 (sched/numa: Do not move past the
balance point if unbalanced), introduced its own problems.
Revert that changeset, and
A recent change to move cfi helper functions out of line
is causing build errors when cfi-util is a loadable module
and jedecprobe is built-in:
drivers/built-in.o: In function `jedec_reset':
(.text+0x140694): undefined reference to `cfi_send_gen_cmd'
drivers/built-in.o: In function
This moves iommu_table creation to the beginning to make following changes
easier to review. This starts using table parameters from the iommu_table
struct.
This should cause no behavioural change.
Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru
Reviewed-by: David Gibson
The existing code programmed TVT#0 with some address and then
immediately released that memory.
This makes use of pnv_pci_ioda2_unset_window() and
pnv_pci_ioda2_set_bypass() which do correct resource release and
TVT update.
Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru
---
TCE tables might get too big in case of 4K IOMMU pages and DDW enabled
on huge guests (hundreds of GB of RAM) so the kernel might be unable to
allocate contiguous chunk of physical memory to store the TCE table.
To address this, POWER8 CPU (actually, IODA2) supports multi-level
TCE tables, up to
At the moment writing new TCE value to the IOMMU table fails with EBUSY
if there is a valid entry already. However PAPR specification allows
the guest to write new TCE value without clearing it first.
Another problem this patch is addressing is the use of pool locks for
external IOMMU users such
Normally a bitmap from the iommu_table is used to track what TCE entry
is in use. Since we are going to use iommu_table without its locks and
do xchg() instead, it becomes essential not to put bits which are not
implied in the direction flag as the old TCE value (more precisely -
the permission
On Wed, May 27, 2015 at 07:04:43PM +0200, Nicholas Mc Guire wrote:
schedule_timeout takes a timeout in jiffies but the code currently is
passing in a constant SDIAS_SLEEP_TICKS which sounds like it should be
in jiffies but it is actually not and thus makes this timeout HZ
dependent, to fix
Hi all,
After merging the kvm tree, today's linux-next build (x86_64
allmodconfig) failed like this:
arch/x86/kvm/cpuid.c: In function 'kvm_update_cpuid':
arch/x86/kvm/cpuid.c:98:2: error: implicit declaration of function
'use_eager_fpu' [-Werror=implicit-function-declaration]
At Fri, 29 May 2015 00:27:14 -0700,
Jeremiah Mahler wrote:
Takashi, all,
On several of my machines there is no longer any sound output when
running the latest linux-next (20150528). Activity can be seen in a
mixer such as pavucontrol suggesting that there should be sound, but
both the
I don't know if anything can be done for the 1700us wait
for the remote processor to mark itself initialized.
That is the 1st thing it does when it enters cpu_init().
So that 1.7 msecs delay is the firmware in essence?
Yes -- hardware+microcode+firmware initialization.
I measured this on
On 05/28/2015 06:37 PM, Ivan T. Ivanov wrote:
Hi,
On Thu, 2015-05-28 at 18:17 +0900, Chanwoo Choi wrote:
2015년 5월 28일 목요일, Ivan T. Ivanoviiva...@mm-sol.com님이 작성한 메시지:
Hi Chanwoo,
On Thu, 2015-05-28 at 00:06 +0900, Chanwoo Choi wrote:
On Wed, May 27, 2015 at 11:38 PM, Roger Quadros
On 05/29/2015 10:04 AM, Kevin Tsai wrote:
Add Ultraviolet(UV) support:
UVA: 315 ~ 400 nm
UVB: 280 ~ 315 nm
UVC: 100 ~ 280 nm
We need documentation for these new modifiers in
Documentation/ABI/testing/sys-bus-iio. Otherwise looks ok.
- Lars
--
To unsubscribe from this list: send the line
At Fri, 29 May 2015 09:21:51 +0200,
Takashi Iwai wrote:
Linus,
please pull sound fixes for v4.1-rc6 from:
git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound.git
tags/sound-4.1-rc6
The topmost commit is b40eda6408e94ee286cb5720cd3f409f70e01778
On Thu, May 28, 2015 at 05:03:12PM -0700, Eric Anholt wrote:
We're currently using a fixed frequency clock specified in the DT, so
enabling is a no-op. However, the RPi firmware-based clocks driver
can actually disable unused clocks, so when switching to use it we
ended up losing our MMC
This enables sPAPR defined feature called Dynamic DMA windows (DDW).
Each Partitionable Endpoint (IOMMU group) has an address range on a PCI bus
where devices are allowed to do DMA. These ranges are called DMA windows.
By default, there is a single DMA window, 1 or 2GB big, mapped at zero
on a
This adds a iommu_table_ops struct and puts pointer to it into
the iommu_table struct. This moves tce_build/tce_free/tce_get/tce_flush
callbacks from ppc_md to the new struct where they really belong to.
This adds the requirement for @it_ops to be initialized before calling
iommu_init_table() to
This relies on the fact that a PCI device always has an IOMMU table
which may not be the case when we get dynamic DMA windows so
let's use more reliable check for IOMMU group here.
As we do not rely on the table presence here, remove the workaround
from pnv_pci_ioda2_set_bypass(); also remove the
The set_iommu_table_base_and_group() name suggests that the function
sets table base and add a device to an IOMMU group.
The actual purpose for table base setting is to put some reference
into a device so later iommu_add_device() can get the IOMMU group
reference and the device to the group.
At
This makes use of the it_page_size from the iommu_table struct
as page size can differ.
This replaces missing IOMMU_PAGE_SHIFT macro in commented debug code
as recently introduced IOMMU_PAGE_XXX macros do not include
IOMMU_PAGE_SHIFT.
Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru
This moves page pinning (get_user_pages_fast()/put_page()) code out of
the platform IOMMU code and puts it to VFIO IOMMU driver where it belongs
to as the platform code does not deal with page pinning.
This makes iommu_take_ownership()/iommu_release_ownership() deal with
the IOMMU table bitmap
This is a pretty mechanical patch to make next patches simpler.
New tce_iommu_unuse_page() helper does put_page() now but it might skip
that after the memory registering patch applied.
As we are here, this removes unnecessary checks for a value returned
by pfn_to_page() as it cannot possibly
This adds create/remove window ioctls to create and remove DMA windows.
sPAPR defines a Dynamic DMA windows capability which allows
para-virtualized guests to create additional DMA windows on a PCI bus.
The existing linux kernels use this new window to map the entire guest
memory and switch to the
On 2015/05/29 10:04AM, Ingo Molnar wrote:
* Naveen N. Rao naveen.n@linux.vnet.ibm.com wrote:
/proc/pid/schedstat is currently only available if CONFIG_SCHEDSTATS is
enabled. But, all the fields that this exposes are available and valid
if CONFIG_TASK_DELAY_ACCT is enabled as well.
We are adding support for DMA memory pre-registration to be used in
conjunction with VFIO. The idea is that the userspace which is going to
run a guest may want to pre-register a user space memory region so
it all gets pinned once and never goes away. Having this done,
a hypervisor will not have
This adds missing locks in iommu_take_ownership()/
iommu_release_ownership().
This marks all pages busy in iommu_table::it_map in order to catch
errors if there is an attempt to use this table while ownership over it
is taken.
This only clears TCE content if there is no page marked busy in
This checks that the TCE table page size is not bigger that the size of
a page we just pinned and going to put its physical address to the table.
Otherwise the hardware gets unwanted access to physical memory between
the end of the actual page and the end of the aligned up TCE page.
Since
At the moment the DMA setup code looks for the ibm,opal-tce-kill
property which contains the TCE kill register address. Writing to
this register invalidates TCE cache on IODA/IODA2 hub.
This moves the register address from iommu_table to pnv_pnb as this
register belongs to PHB and invalidates TCE
Recent header file changes for cgroup caused lots of warnings
about a missing struct seq_file form declaration for every
inclusion of include/linux/cgroup-defs.h.
As some files are built with -Werror, this leads to build
failure like:
from
At the moment iommu_free_table() only releases memory if
the table was initialized for the platform code use, i.e. it had
it_map initialized (which purpose is to track DMA memory space use).
With dynamic DMA windows, we will need to be able to release
iommu_table even if it was used for VFIO in
From: gongzhaogang gongzhaog...@inspur.com
Delete the extra content in the comment.
return_object - Where to put method's return value (if
any). If NULL, no value is returned.
Signed-off-by: Gong Zhaogang gongzhaog...@inspur.com
---
drivers/acpi/acpica/nseval.c | 2 --
1
* Namhyung Kim namhy...@kernel.org wrote:
It was inconvenient that perf cannot be quit with SIGINT during
processing samples on TUI especially for large data files.
This was because the first argument of SLang_init_tty(), abort_char,
being 0. The manual says it's the ascii value of the
On Thu 28-05-15 12:59:34, Andrew Morton wrote:
On Thu, 28 May 2015 20:26:06 +0300 Vladimir Davydov vdavy...@parallels.com
wrote:
When trimming memcg consumption excess (see memory.high), we call
try_to_free_mem_cgroup_pages without checking if we are allowed to sleep
in the current
Hi,
On Fri, May 29, 2015 at 6:27 AM, HungNien Chen hn.c...@weidahitech.com wrote:
Signed-off-by: HungNien Chen hn.c...@weidahitech.com
This seems rather short for adding a new driver. I also just noticed
that your subjects don't quite match up with the actual contents of
the commit. They rather
* Paul E. McKenney paul...@linux.vnet.ibm.com wrote:
On Thu, May 28, 2015 at 05:25:07PM +1000, Stephen Rothwell wrote:
Hi Paul,
Today's linux-next merge of the rcu tree got a conflict in
include/linux/rcupdate.h between commits 0a04b0166929 (rcu: Move
lockless_dereference() out of
On Sun, May 17, 2015 at 1:26 AM, Ingo Molnar mi...@kernel.org wrote:
check_tsc_warp() is hard-coded to take 2ms. I don't know if 2ms is a
magic number or if shorter has same value. It seems a bit sad to do
this serially for every CPU at boot, when we could do all the CPUs
in parallel after
This patch adds an idle-states node to describe the mt8173 idle states and
also adds references to the idle-states node in all CPU nodes.
Signed-off-by: Howard Chen howard.c...@linaro.org
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 18 ++
1 file changed, 18 insertions(+)
diff
Kexec_load syscall in ARM checks that machine-specific code
has the smp_ops.cpu_kill() before loading kernel image.
This patch adds the cpu_kill(), as a result, kexec reboot and
kernel crash dump become available in mach-socfpga.
Signed-off-by: Hiraku Toyooka hiraku.toyooka...@hitachi.com
Cc:
Add the driver for on-chip UART used on UniPhier SoCs.
This hardware is similar to 8250, but the register mapping is
slightly different:
- The offset to FCR, MCR is different.
- The divisor latch access bit does not exist. Instead, the
divisor latch register is available at offset 9.
Hi Linus,
please pull these fixes.
I think raid5 is all working nicely again now.
I think there is still a race somewhere in starting the recovery thread, but
it is minor and I suspect I'll have it nailed soon. Not quite this week
though.
Thanks,
NeilBrown
The following changes since
The following patch will use dio/aio to submit IO to backing file,
then it needn't to schedule IO concurrently from work, so
use kthread_work for decreasing context switch cost a lot.
For non-AIO case, single thread has been used for long long time,
and it was just converted to work in v4.0,
* Vince Weaver vincent.wea...@maine.edu wrote:
We're trying to get self-monitoring multi-threaded sampling working in PAPI.
Fun times.
Is this even possible?
Ideally in your parent thread you could perf_event_open() with inherit set.
Then your program (say an OpenMP program) would
On Thu, May 28, 2015 at 12:59:45PM -0700, Joe Perches wrote:
On Wed, 2015-05-27 at 14:06 -0700, Andrew Morton wrote:
On Wed, 27 May 2015 14:01:44 -0700 Joe Perches j...@perches.com wrote:
I'll send a private email to all these people and see if they
want to be listed in the MAINTAINERS file
On 29/05/15 02:20, Dan Williams wrote:
On Thu, May 21, 2015 at 9:42 AM, Srinivas Kandagatla
srinivas.kandaga...@linaro.org wrote:
Thankyou all for providing inputs and comments on previous versions of this
patchset.
Here is the v5 of the patchset addressing all the issues raised as
part of
On Fri, 29 May 2015, Shuah Khan shua...@osg.samsung.com wrote:
I am seeing the following in the dmesg on 4.0.4 with rt patch
[5.720319] [ cut here ]
[5.720347] WARNING: CPU: 6 PID: 466 at
drivers/gpu/drm/i915/intel_display.c:9748
On Fri, May 29, 2015 at 10:47:29AM +0800, James Liao wrote:
Hi Sascha,
And really the driver matching mediatek,mt8173-vencsys should register
the necessary clocks and reset lines and call of_platform_populate on
the subnodes. The driver should also be a real driver, not something
On Thu, May 28, 2015 at 08:41:45PM +0200, Matthias Brugger wrote:
This patch set adds regmap support for the simple clock multiplexer.
Regmap use, apart from a pointer to the regmap struct needs an
offset value to know where in the regmap it has to read/write.
We add both fields to struct
When direct IO is submitted from kernel, it is often unnecessary
to dirty pages, for example of loop, dirtying pages have been
considered in the upper filesystem(over loop) side already, and
they don't need to be dirtied again.
So this patch introduces IOCB_DONT_DIRTY_PAGE flag for direct IO,
and
Hi Guys,
There are about 3 advantages to use direct I/O and AIO on
read/write loop's backing file:
1) double cache can be avoided, then memory usage gets
decreased a lot
2) not like user space direct I/O, there isn't cost of
pinning pages
3) avoid context switch for obtaining good throughput
-
1 - 100 of 1630 matches
Mail list logo
