On Mon, Aug 17, 2015 at 06:36:03AM +0200, Borislav Petkov wrote:
> On Mon, Aug 17, 2015 at 12:29:56AM +0200, Jiri Olsa wrote:
> > hi,
> > 'perf test 18' is failing on systems with AMD processor.
>
> Hmm, still using that b0rked test box? :-)
heh, nope.. have seen this on at least 2 boxes so far
On 16.08.2015 17:33, Andreas Mohr wrote:
> Hi,
>
> [rogue out-of-band reply, sorry - lkml.org mail info is broken]
Hi Andreas,
>
>> There are trackpoint devices that fail to respond to the PS2 command
>> PSMOUSE_CMD_GETID if immediately queried after the parent device is
>> deactivated. Add a s
On 08/15/2015 05:31 AM, Vaishali Thakkar wrote:
> Use resource managed function devm_snd_soc_register_component for
> component registration instead of snd_soc_register_component.
>
> Also, remove davinci_vcif_remove as it is now redundant.
Acked-by: Peter Ujfalusi
> Signed-off-by: Vaishali Tha
2015-08-17 16:10 GMT+09:00 Wang Dongsheng :
> Hi Alexandre,
>
> Could you apply this patch?
Give some time before pinging.
>
> Regards,
> -Dongsheng
>
>> -Original Message-
>> From: Dongsheng Wang [mailto:dongsheng.w...@freescale.com]
>> Sent: Wednesday, August 12, 2015 5:14 PM
>> To: ale
On 29/07/15 00:14, Adrian Hunter wrote:
> When TSC is stable perf/sched clock is based on it.
> However the conversion from cycles to nanoseconds
> is not as accurate as it could be. Because
> CYC2NS_SCALE_FACTOR is 10, the accuracy is +/- 1/2048
>
> The change is to calculate the maximum shift t
On Tue, Aug 4, 2015 at 5:50 PM, Alban Bedel wrote:
> Currently CONFIG_ARCH_HAVE_CUSTOM_GPIO_H is defined for all MIPS
> machines, and each machine type provides its own gpio.h. However
> only a handful really implement the GPIO API, most just forward
> everythings to gpiolib.
>
> The Alchemy machi
On Mon, 17 Aug 2015, Barry Song wrote:
> 2015-07-22 21:04 GMT+08:00 Lee Jones :
> > Lots of platforms contain clocks which if turned off would prove fatal.
> > The only way to recover from these catastrophic failures is to restart
> > the board(s). Now, when a clock provider is registered with th
On 08/05/2015 10:08 AM, Alexey Kardashevskiy wrote:
This is about VFIO aka PCI passthrough used from QEMU.
KVM is irrelevant here.
QEMU is a machine emulator. It allocates guest RAM from anonymous memory
and these pages are movable which is ok. They may happen to be allocated
from the contiguous
From: Byungchul Park
change from v1 to v2
* introduce two functions for adjusting vruntime and load when attaching
and detaching.
* call the introduced functions instead of switched_from(to)_fair() directly
in task_move_group_fair().
* add decaying logic for a se which has detached from a cfs
From: Byungchul Park
se's load can be valuable just after being detached from cfs_rq, however
it will become useless over time, e.g. in case of switching to another
sched class and switching back to fair class.
therefore even in case where se is already detached from cfs, decaying
its load is ne
On Thursday 06 August 2015 06:05 PM, Vineet Gupta wrote:
Hi Thomas/Peter,
Of late I've been debugging a seeming lost wakeup when running a specific
EEMBC Multibench workload (4M-check -w4) on a quad core HS38 config on FPGA
CONFIG_SMP, CONFIG_PREEMPT.
I've yet to nail that issue down, but in the
From: Byungchul Park
current code is wrong with cfs_rq's avg loads when changing a task's
cfs_rq to another. i tested with "echo pid > cgroup" and found that
e.g. cfs_rq->avg.load_avg became larger and larger whenever i changed
a cgroup to another again and again. we have to sync se's avg loads
w
From: Byungchul Park
two functions are introduced for attaching(detaching) a task to a cfs_rq.
it does mainly adjusting its vruntime and load avg with the cfs_rq.
switched_from_fair(), switched_to_fair() and task_move_group_fair() can
use these functions, now.
Signed-off-by: Byungchul Park
---
On Fri, 14 Aug 2015, Srinivas Kandagatla wrote:
> This patch adds support to get edid way early before the connector is
> created, this is mainly used for panel drivers to auto-probe the panel
> based on the vendor and product id from EDID.
>
> Signed-off-by: Srinivas Kandagatla
> ---
> drivers/
On Sat, Aug 15, 2015 at 02:27:47PM +0100, Jonathan Cameron wrote:
> On 12/08/15 11:12, Markus Pargmann wrote:
> > This replaces all usage of direct i2c accesses with regmap accesses.
> >
> > Signed-off-by: Markus Pargmann
> Clearly there is some work needed on the earlier patches and this
> might
On Fri, 2015-08-14 at 16:38 +0800, maoguang.m...@mediatek.com wrote:
> From: Maoguang Meng
>
> This patch implement irq_set_wake to get who is wakeup source and
> setup on suspend resume.
>
> Signed-off-by: Maoguang Meng
>
> ---
> changes since v3:
> -add a comment in mtk_eint_chip_read_mask.
On 08/10/2015 05:58 PM, Thomas Renninger wrote:
> On Monday, August 03, 2015 11:46:00 AM Shreyas B. Prabhu wrote:
>> get_cpu_topology() tries to get topology info from all cpus by reading
>> files in the topology sysfs dir. If a cpu is offlined, since it doesn't
>> have topology dir, this functio
Hi Bjorn,
To be honest I'm wainting that Zhou patch (PCI: designware: Add ARM64
support) is accepted.
Because this patch allows to remove "pci: designware: remove
pci_common_init_dev()" from my patchset. I think it's more judicious
to do that.
I can send a v4 based on Zhou patchset ([PATCH v6 0/
On Mon, Aug 17, 2015 at 12:17:54PM +1000, Stephen Rothwell wrote:
> Hi Eduardo,
>
> Today's linux-next merge of the thermal-soc tree got a conflict in:
>
> drivers/thermal/cpu_cooling.c
>
> between commit:
>
> df6f527755a5 ("thermal: cpu_cooling: fix lockdep problems in cpu_cooling")
>
> f
On Thu, Jun 25, 2015 at 2:20 AM, Javier Martinez Canillas
wrote:
> The Chrome platform support depends on X86 || ARM because there are
> only Chromebooks using those architectures. But only some drivers
> depend on a given architecture, and the ones that do already have
> a dependency on their spe
On Sat, Aug 15, 2015 at 02:33:51PM +0100, Jonathan Cameron wrote:
> On 12/08/15 11:12, Markus Pargmann wrote:
> > i2c_client struct is now only used for debugging output. We can use the
> > device struct as well so we can remove all struct i2c_client usage.
> >
> > Signed-off-by: Markus Pargmann
On Sat, Aug 15, 2015 at 02:41:29PM +0100, Jonathan Cameron wrote:
> On 12/08/15 11:12, Markus Pargmann wrote:
> > Signed-off-by: Markus Pargmann
> There are a few bits in here following through from earlier
> patches that I haven't bothered mentioning as you'll have fixed
> them already before thi
On Wed, Aug 12, 2015 at 01:03:00PM +0100, Mark Brown wrote:
> On Wed, Aug 12, 2015 at 12:12:45PM +0200, Markus Pargmann wrote:
>
> > + .use_single_rw = false,
> > + .cache_type = REGCACHE_NONE,
> > +};
>
> No need to initialise defaults.
Thanks, removed those.
Best regards,
Markus
--
Pen
On 15.08.2015 18:13, Guenter Roeck wrote:
On Fri, Aug 14, 2015 at 12:37:13PM -0700, Dustin Byford wrote:
70762ab from 11/2014 (i2c: Use stable dev_name for ACPI enumerated I2C
slaves) modified the sysfs-visible dev_name() for ACPI enumerated I2C
devices. With that change, /sys/bus/i2c/devices/i
(Sorry about the late reply, wasn't around on the weekend.)
* Linus Torvalds wrote:
> Now that said, I doubt anybody cares. Since we don't support the original
> 80386,
> the only way to ever trigger FP emulation is by having a 486SX or possibly a
> couple of even rarer clone chips. [...]
Y
On Sat, Aug 15, 2015 at 02:47:20PM +0100, Jonathan Cameron wrote:
> On 12/08/15 11:12, Markus Pargmann wrote:
> > Add a simple SPI driver which initializes the spi regmap for the bmc150
> > core driver.
> >
> > Signed-off-by: Markus Pargmann
> 1 thing inline, plus the change of kconfig approach s
Hi Russell,
On Mon, 17 Aug 2015 08:55:49 +0100 Russell King - ARM Linux
wrote:
>
> Yes it does. It's above the explanation of why it's there. However,
> now that Eduardo has taken patches to fix the long standing bug, I can
> drop this commit.
Ah, yes, I only expect to see them at the end. S
On Wed, 2015-05-08 at 07:08:31 UTC, "Gautham R. Shenoy" wrote:
> Section 3.7 of Version 1.2 of the Power8 Processor User's Manual
> prescribes that updates to HID0 be preceded by a SYNC instruction and
> followed by an ISYNC instruction (Page 91).
>
> Create an inline function name update_power8_h
On Sun, 16 Aug 2015, Geert Uytterhoeven wrote:
> Hi Finn,
>
> On Sat, Jul 25, 2015 at 9:45 AM, Finn Thain
> wrote:
> > The generic NVRAM module, drivers/char/generic_nvram, implements a
> > /dev/nvram misc device. It is used only by 32-bit PowerPC platforms
> > and isn't generic enough to be
Hi Greg,
Today's linux-next merge of the staging tree got conflicts in:
drivers/staging/Kconfig
drivers/staging/Makefile
between commit:
c2347d1b409d ("RDMA/amso1100: deprecate the amso1100 provider")
17465e48756f ("IB/ipath: Move ipath driver to staging.")
97748be1d6d0 ("Move hfi1 to
Make sparse happy:
drivers/mmc/host/android-goldfish.c:535:56: sparse: incorrect type in argument
3 (different address spaces)
Signed-off-by: Christoph Hellwig
---
drivers/mmc/host/android-goldfish.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mmc/host/android-g
Hello John,
On Thu, Aug 13, 2015 at 05:20:26PM +0100, John Kacur wrote:
> Clark Williams and I are pleased to announce a new rt-tests release.
> Note we have a new git location,
> make sure you update your repo to one of the following
>
> git://git.kernel.org/pub/scm/utils/rt-tests/rt-tests.git
Hi Finn,
On Mon, Aug 17, 2015 at 10:04 AM, Finn Thain wrote:
>> BTW, checkpatch reported a few newly-introduced whitespace errors in
>> patches 03, 05, 16, 24, and 25.
>
> I will check again, but I'm sure those are all deliberate. I examined all
> the "errors" and "warnings" before submitting.
>
On Mon, Aug 3, 2015 at 1:15 AM, Alexey Khoroshilov
wrote:
> Dear colleagus,
>
> grgpio_irq_unmap() code looks quite suspicious regarding usage of
> priv->bgc.lock spinlock.
>
> It locks the spinlock in line 310:
> spin_lock_irqsave(&priv->bgc.lock, flags);
> and then it can call grgpio_set
On Tue, Aug 11, 2015 at 10:16:32PM +0200, Robert Jarzmik wrote:
> From: Robert Jarzmik
>
> Don't use the direction passed in the configuration, and rely on each
> transfer's direction to prepare the transfers. This will enable
> future removal of direction parameter from dma_slave_config.
Applie
As reported by Alexey Khoroshilov:
grgpio_irq_unmap() code looks quite suspicious regarding usage of
priv->bgc.lock spinlock.
It locks the spinlock in line 310:
spin_lock_irqsave(&priv->bgc.lock, flags);
and then it can call grgpio_set_imask() in line 317:
grgpi
A bug is reported(https://bugzilla.redhat.com/show_bug.cgi?id=1227208)
that, after resuming from S3, CPU is working at a low speed.
After investigation, it is found that, BIOS has modified the value
of THERM_CONTROL register during S3, changes it from 0 to 0x10,
while the latter means CPU can only
Hi Vaishali,
Thanks for the patch. Unfortunately it causes build break.
Please fix the issues and resubmit.
On 08/15/2015 12:21 PM, Vaishali Thakkar wrote:
Use resource-managed function devm_led_classdev_register instead
of led_classdev_register to make the error-path simpler.
To be compatible
Hi Linus:
This push fixes the following issues:
* A regression caused by the conversion of IPsec ESP to the new
AEAD interface: ESN with authencesn no longer works because it
relied on the AD input SG list having a specific layout which
is no longer the case. In linux-next authencesn is fi
Hi Maintainers
I found below panic when bootup OVM3.3.3 on HP PROLIANT DL980 G7 with
dom0_mem=max:128G, not reproduce with dom0_mem=max:127G.
Dom0 kernel is uek4 4.1.5-5.el6uek which is based on Upstream Linux 4.1
tree. This looks like an upstream issue.
Appereciate any patch/fix. Thanks
(XE
Hello Geert,
Thanks a lot for your feedback.
On Mon, Aug 17, 2015 at 9:56 AM, Geert Uytterhoeven
wrote:
> On Thu, Jun 25, 2015 at 2:20 AM, Javier Martinez Canillas
> wrote:
>> The Chrome platform support depends on X86 || ARM because there are
>> only Chromebooks using those architectures. But
On Mon, Aug 3, 2015 at 10:53 AM, Linus Walleij wrote:
> On Fri, Jul 31, 2015 at 2:48 PM, Rabin Vincent wrote:
>
>> If the driver has specified its own irq_{request/release}_resources()
>> functions, don't override them. The gpio-etraxfs driver will use this.
>>
>> Signed-off-by: Rabin Vincent
>
Below is the list of build error/warning regressions/improvements in
v4.2-rc7[1] compared to v4.1[2].
Summarized:
- build errors: +13/-53
- build warnings: +133/-278
JFYI, when comparing v4.2-rc7[1] to v4.2-rc6[3], the summaries are:
- build errors: +6/-14
- build warnings: +25/-54
Note
On Mon, Aug 17, 2015 at 10:43 AM, Geert Uytterhoeven
wrote:
> JFYI, when comparing v4.2-rc7[1] to v4.2-rc6[3], the summaries are:
> - build errors: +6/-14
+ /home/kisskb/slave/src/arch/arm/kernel/devtree.c: error: implicit
declaration of function 'early_init_dt_scan_nodes'
[-Werror=implicit-f
+ Rafael
On 08/17/2015 09:29 AM, Johannes Berg wrote:
On Mon, 2015-08-17 at 09:48 +0800, Fu, Zhonghui wrote:
The suspend/resume timing of wiphy device and related devices will be
ensured by their parent/child relationship. So, enabling wiphy device
to suspend/resume asynchronously does not cha
On Mon, 17 Aug 2015, Geert Uytterhoeven wrote:
> On Mon, Aug 17, 2015 at 10:04 AM, Finn Thain
> wrote:
> >> BTW, checkpatch reported a few newly-introduced whitespace errors in
> >> patches 03, 05, 16, 24, and 25.
> >
> > I will check again, but I'm sure those are all deliberate. I examined
>
On Fri, Aug 14, 2015 at 07:21:29AM -0700, Tadeusz Struk wrote:
>
> Yes, that was wrong, sorry. The reason I wanted to change it is that
> the SW implementation can return a number with leading zeros.
> This is because mpi_read_buffer() returns the whole thing.
I think mpi_read_buffer is broken.
On Fri, Aug 14, 2015 at 07:24:23AM -0700, Tadeusz Struk wrote:
>
> If you don't like the first option then we still need this, as you pointed
> out.
Yes this looks like the right fix for qat. Please add a sign-off.
You might be able to just do it by replying to this thread, and
patchwork may be
From: Dongdong Yang
If system restart after panic, this patch also enables
panic and oops messages which in suspend context to be
logged into ramoops console buffer where it can be read
back at some later point.
Signed-off-by: Dongdong Yang
Signed-off-by: Linghua Gu
Signed-off-by: Hui Du
---
On Mon, Aug 17, 2015 at 10:23 AM, Alexandre Courbot wrote:
> As reported by Alexey Khoroshilov:
>
> grgpio_irq_unmap() code looks quite suspicious regarding usage of
> priv->bgc.lock spinlock.
>
> It locks the spinlock in line 310:
>
> spin_lock_irqsave(&priv->bgc.lock, flags)
On Fri, Aug 14, 2015 at 01:08:32PM -0400, Raphaël Beamonte wrote:
> Fix a macro with complex value coding style error.
>
This patch description is too vague.
regards,
dan carpenter
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@v
From: "pi-cheng.chen"
This patch adds CPU mux clocks which are used by Mediatek cpufreq driver
for intermediate clock source switching.
Signed-off-by: Pi-Cheng Chen
Reviewed-by: Daniel Kurtz
---
Changes in v5:
- Replace __initdata with __initconst to fix compiling error
Changes in v4:
- Fix s
On Mon, Aug 17, 2015 at 07:15:01AM +0100, Paul E. McKenney wrote:
> On Mon, Aug 17, 2015 at 02:06:07PM +1000, Michael Ellerman wrote:
> > On Wed, 2015-08-12 at 08:43 -0700, Paul E. McKenney wrote:
> > > On Wed, Aug 12, 2015 at 02:44:15PM +0100, Will Deacon wrote:
> > > > On Fri, Jul 24, 2015 at 04:
On Fri, Aug 14, 2015 at 09:26:21PM +0100, Bjorn Helgaas wrote:
> On Fri, Aug 14, 2015 at 11:43 AM, Will Deacon wrote:
> > On Fri, Aug 14, 2015 at 05:40:51PM +0100, Bjorn Helgaas wrote:
> >> Do we need support for pci-probe-only in pci-host-generic at all?
> >> You're removing the use in amd-overdr
On Fri, Aug 14, 2015 at 2:40 PM, Lars-Peter Clausen wrote:
> On 08/14/2015 02:34 PM, Linus Walleij wrote:
> [...]
>> Every chip will get their own lock class on the heap.
>>
>> But I think it is a bit kludgy.
>>
>> Is it not possible to have the lock key in struct gpio_chip
>> be a real member in
On Sat, Aug 15, 2015 at 06:59:25AM +0100, Viresh Kumar wrote:
> On 14-08-15, 18:56, Javi Merino wrote:
> > The OPP library is now used for power models to calculate the power
> > that a device would consume at a specific OPP. To do that, we use a
> > simple power model which takes frequency and vo
On Sun, Aug 16, 2015 at 01:30:12AM -0400, Raphaël Beamonte wrote:
> #define MALLOC_WILC_BUFFER(name, size) \
> - exported_ ## name = kmalloc(size, GFP_KERNEL);\
> - if (!exported_ ## name) { \
> - printk("fail to alloc: %s memory\n", exported_ ## name); \
> -
This is the 4th version of patch set to add support for Altera PCIe host
controller with MSI feature on Altera FPGA device families. This patchset
mainly resolve comments from Marc Zyngier in v3.
It is based on patch series from Marc Zyngier "Per-device MSI domain &
platform MSI" [1] to get rid of
This patch adds Altera PCIe MSI driver. This soft IP supports configurable
number of vectors, which is a dts parameter.
Signed-off-by: Ley Foon Tan
---
drivers/pci/host/Kconfig | 8 +
drivers/pci/host/Makefile | 1 +
drivers/pci/host/pcie-altera-msi.c | 322 +++
On Sun, Aug 16, 2015 at 10:24:47AM +0100, Jonathan Cameron wrote:
> On 12/08/15 15:31, Irina Tirdea wrote:
> > Some i2c busses (e.g.: Synopsys DesignWare I2C adapter) need to
> > enable/disable the bus at each i2c transfer and must wait for
> > the enable/disable to happen before sending the data.
This patch adds the bindings for Altera PCIe host controller driver and
Altera PCIe MSI driver.
Signed-off-by: Ley Foon Tan
---
.../devicetree/bindings/pci/altera-pcie-msi.txt| 27
.../devicetree/bindings/pci/altera-pcie.txt| 49 ++
2 files changed, 7
Signed-off-by: Ley Foon Tan
---
MAINTAINERS | 16
1 file changed, 16 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index fd60784..32f5287 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -7759,6 +7759,14 @@ F: include/linux/pci*
F: arch/x86/pci/
F: arch/x86/k
Saturday, August 15, 2015, 12:39:25 AM, you wrote:
> On Sat, 2015-08-15 at 00:09 +0200, Sander Eikelenboom wrote:
>> On 2015-08-13 00:41, Eric Dumazet wrote:
>> > On Wed, 2015-08-12 at 23:46 +0200, Sander Eikelenboom wrote:
>> >
>> >> Thanks for the reminder, but luckily i was aware of that,
>>
On 08/17/2015 05:45 PM, Vlastimil Babka wrote:
On 08/05/2015 10:08 AM, Alexey Kardashevskiy wrote:
This is about VFIO aka PCI passthrough used from QEMU.
KVM is irrelevant here.
QEMU is a machine emulator. It allocates guest RAM from anonymous memory
and these pages are movable which is ok. The
This patch adds the Altera PCIe host controller driver.
Signed-off-by: Ley Foon Tan
---
drivers/pci/host/Kconfig | 7 +
drivers/pci/host/Makefile | 1 +
drivers/pci/host/pcie-altera.c | 543 +
3 files changed, 551 insertions(+)
create mode
Include asm-generic/msi.h to support CONFIG_GENERIC_MSI_IRQ_DOMAIN.
This to fix compilation error:
"include/linux/msi.h:123:21: fatal error: asm/msi.h:
No such file or directory"
Signed-off-by: Ley Foon Tan
---
arch/arm/include/asm/Kbuild | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/
On Mon, Aug 17, 2015 at 3:52 PM, Yingjoe Chen wrote:
> On Fri, 2015-08-14 at 16:38 +0800, maoguang.m...@mediatek.com wrote:
>> From: Maoguang Meng
>>
>> This patch implement irq_set_wake to get who is wakeup source and
>> setup on suspend resume.
>>
>> Signed-off-by: Maoguang Meng
>>
>> ---
>> c
HYVÄ ASIAKAS
Uuden ohjelmiston asentaminen internetpankkiisi.
Tämän palvelun avulla NORDEA-internetpankkisi on vapaa viruksista,
saat lisäturvan internetpetoksia vastaan ja nopean pääsyn e-pankkiisi
suoraan puhelimellasi. Aloittaaksesi ohjelmistopäivityksen,
pyydämme sinua klikkaamaan alla olevaa
Thanks, Arnd,
You are right. This is the same IP as hip04_mdio.c. We just mis-understand the
hardware design. We will merge them and re-submit the patches.
On Fri, Aug 14, 2015 at 10:57:28PM +0200, Arnd Bergmann wrote:
> On Friday 14 August 2015 18:30:20 Kenneth Lee wrote:
>
> > +#define MDIO_B
On 08/15/2015 11:13 PM, Chuck Ebbert wrote:
> On Wed, 12 Aug 2015 10:13:24 -0400
> Sasha Levin wrote:
>
>> While fuzzing with trinity inside a KVM tools guest running -next I've
>> stumbled on the following:
>>
>> [64092.216447]
>> =
Hi Morten,
On Tue, Jul 07, 2015 at 07:24:01PM +0100, Morten Rasmussen wrote:
> From: Dietmar Eggemann
>
> This patch is only here to be able to test provisioning of energy related
> data from an arch topology shim layer to the scheduler. Since there is no
> code today which deals with extracting
MT8173 is a ARMv8 based SoC with 2 clusters. All CPUs in a single cluster
share the same power and clock domain. This series tries to add cpufreq support
for MT8173 SoC. The v6 of this series is resent with Acks added.
changes in v6:
- Move clock and regulator consumer properties document to the d
This patch adds the required properties in device tree to enable MT8173
cpufreq driver.
Signed-off-by: Pi-Cheng Chen
Acked-by: Viresh Kumar
---
It is based on the top of MT8173 SoC maintainer's tree:
https://github.com/mbgg/linux-mediatek.git v4.2-next/arm64
commit id: e26945245e414eff42ee1ffeae
Mediatek MT8173 is an ARMv8 based quad-core (2*Cortex-A53 and
2*Cortex-A72) SoC with duall clusters. For each cluster, two voltage
inputs, Vproc and Vsram are supplied by two regulators. For the big
cluster, two regulators come from different PMICs. In this case, when
scaling voltage inputs of the
This patch adds the clock and regulator consumer properties part of
document for CPU DVFS clocks on Mediatek MT8173 SoC.
Signed-off-by: Pi-Cheng Chen
Acked-by: Michael Turquette
Acked-by: Viresh Kumar
---
.../devicetree/bindings/clock/mt8173-cpu-dvfs.txt | 83 ++
1 file ch
> -Original Message-
> From: Lars-Peter Clausen [mailto:l...@metafoo.de]
> Sent: 12 August, 2015 18:04
> To: Markus Pargmann; Jonathan Cameron
> Cc: Srinivas Pandruvada; Dogaru, Vlad; Paul Bolle; linux-...@vger.kernel.org;
> linux-kernel@vger.kernel.org; ker...@pengutronix.de;
> Tirdea,
On Mon, Aug 17, 2015 at 02:02:08PM +0800, Baolin Wang wrote:
> On 17 August 2015 at 09:15, Li Jun wrote:
> > On Fri, Aug 14, 2015 at 07:04:56PM +0800, Baolin Wang wrote:
> >> On 14 August 2015 at 16:55, Li Jun wrote:
> >> > Hi Baolin,
> >> >
> >> > On Fri, Aug 14, 2015 at 05:47:43PM +0800, Baolin
On Mon, Aug 17, 2015 at 12:47 PM, Alexandre Courbot wrote:
> On Thu, Aug 13, 2015 at 4:29 PM, Vaishali Thakkar
> wrote:
>> Use managed resource functions devm_clk_put and
>> devm_snd_soc_register_component to simplify error handling.
>>
>> To be compatible with the change various gotos are replac
On Mon, Aug 17, 2015 at 04:45:49PM +0900, byungchul.p...@lge.com wrote:
> From: Byungchul Park
i am very sorry for ugly versioning..
while i proposed several indivisual patches and was feedbacked, i felt
that i needed to pack some patches into one series.
thanks,
byungchul
>
> change from v1
> -Original Message-
> From: Jonathan Cameron [mailto:ji...@kernel.org]
> Sent: 16 August, 2015 12:25
> To: Tirdea, Irina; Wolfram Sang; linux-...@vger.kernel.org;
> linux-...@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org; Pandruvada, Srinivas; Peter Meerwald
> Subject: Re: [PATCH v
On 08/14/2015 03:34 PM, Linus Walleij wrote:
> On Thu, Aug 13, 2015 at 4:58 PM, Grygorii Strashko
> wrote:
>
>> Since IRQ chip helpers were introduced drivers lose ability to
>> register separate lockdep classes for each registered GPIO IRQ
>> chip and the gpiolib now is using shared lockdep clas
Am 15.08.2015 um 09:48 schrieb Alexander Holler:
Am 30.07.2015 um 13:57 schrieb Alexander Holler:
Am 29.07.2015 um 11:25 schrieb Alexander Holler:
Am 23.05.2015 um 05:55 schrieb Martin KaFai Lau:
To complete the discussion, that "annoying behaviour" is also a big
information leak.
Because r
On 14 August 2015 at 13:39, Juri Lelli wrote:
> Hi vincent,
>
> On 13/08/15 13:08, Vincent Guittot wrote:
>> On 12 August 2015 at 17:15, Juri Lelli wrote:
>>> On 11/08/15 17:37, Vincent Guittot wrote:
On 11 August 2015 at 17:07, Juri Lelli wrote:
> Hi Vincent,
>
> On 11/08/15 12
On 17/08/15 08:52, Jani Nikula wrote:
On Fri, 14 Aug 2015, Srinivas Kandagatla wrote:
This patch adds support to get edid way early before the connector is
created, this is mainly used for panel drivers to auto-probe the panel
based on the vendor and product id from EDID.
Signed-off-by: Srin
> IBM Xseries 346, 2x Xeon 3.2 HT 64-bit (4 threads total, P4 era Xeon),
> 5G RAM. All kernels so far worked fine, last working one was
> 4.2.0-rc2-00077-gf760b87. First kernel tested after that was
> v4.2-rc6-20-g7a834ba and that one crashes on boot.
Same crash happens in 4.2.0-rc7.
> Screens
> -Original Message-
> From: Markus Pargmann [mailto:m...@pengutronix.de]
> Sent: 17 August, 2015 12:10
> To: Jonathan Cameron
> Cc: Tirdea, Irina; Wolfram Sang; linux-...@vger.kernel.org;
> linux-...@vger.kernel.org; linux-kernel@vger.kernel.org; Pandruvada,
> Srinivas; Peter Meerwald
>
Hi Andrew,
Thanks for the patch, few comments other than Stefan's comments.
On 16/08/15 03:54, Andrew Lunn wrote:
Add a read only regmap for accessing the EEPROM, and then use that
with the NVMEM framework.
Signed-off-by: Andrew Lunn
---
drivers/misc/eeprom/at24.c | 65 +
On 08/17/2015 11:11 AM, Alexey Kardashevskiy wrote:
On 08/17/2015 05:45 PM, Vlastimil Babka wrote:
On 08/05/2015 10:08 AM, Alexey Kardashevskiy wrote:
This is about VFIO aka PCI passthrough used from QEMU.
KVM is irrelevant here.
QEMU is a machine emulator. It allocates guest RAM from anonymou
On Mon, Aug 17, 2015 at 10:34:03AM +0300, Adrian Hunter wrote:
> On 29/07/15 00:14, Adrian Hunter wrote:
> > When TSC is stable perf/sched clock is based on it.
> > However the conversion from cycles to nanoseconds
> > is not as accurate as it could be. Because
> > CYC2NS_SCALE_FACTOR is 10, the a
On Mon, 2015-08-17 at 19:11 +1000, Alexey Kardashevskiy wrote:
> On 08/17/2015 05:45 PM, Vlastimil Babka wrote:
> > On 08/05/2015 10:08 AM, Alexey Kardashevskiy wrote:
> > > This is about VFIO aka PCI passthrough used from QEMU.
> > > KVM is irrelevant here.
> > >
> > > QEMU is a machine emulator.
On Fri, Aug 14, 2015 at 01:35:53PM +0100, fu@linaro.org wrote:
> From: Tomasz Nowicki
>
> This commit provides APEI arch-specific bits for aarch64
>
> Changelog:
> Fu Wei:
> Move arch_apei_flush_tlb_one() to arch/arm64/include/asm/apci.h.
> Delete arch/arm64/kernel/apei.c.
> Ad
* Chen Yu wrote:
> A bug is reported(https://bugzilla.redhat.com/show_bug.cgi?id=1227208)
> that, after resuming from S3, CPU is working at a low speed.
> After investigation, it is found that, BIOS has modified the value
> of THERM_CONTROL register during S3, changes it from 0 to 0x10,
> while
On Sat, Aug 01, 2015 at 12:44:31AM +0200, Alexandre Belloni wrote:
> From: Josh Wu
>
> The QiaoDian Xianshi QD43003C0-40 is a 4"3 TFT LCD panel.
>
> Timings from the OTA5180A document, ver 0.9, section
> 10.1.1:
> http://www.orientdisplay.com/pdf/OTA5180A.pdf
>
> Signed-off-by: Josh Wu
> Sig
On 3 August 2015 at 17:04, Heiko Stübner wrote:
> The dw_mci_init_dma() may decide to not use dma, but pio instead, caused
> by things like wrong dma settings in the system.
>
> Till now the code dw_mci_init_slot() always assumed that dma is available
> when CONFIG_MMC_DW_IDMAC was defined, ignori
On Mon, 2015-08-17 at 11:53 +0200, Vlastimil Babka wrote:
> I meant why the kernel used for QEMU has also CMA enabled and used
> (for
> something else)? CMA is mostly used on mobile devices and they don't
> run
> QEMU?
I explained in a separeate reply but yes, we do use a CMA for KVM for
our M
Hi, Ulf.
On 08/17/2015 07:16 PM, Ulf Hansson wrote:
> On 3 August 2015 at 17:04, Heiko Stübner wrote:
>> The dw_mci_init_dma() may decide to not use dma, but pio instead, caused
>> by things like wrong dma settings in the system.
>>
>> Till now the code dw_mci_init_slot() always assumed that dma
Hi Geert,
On 11 August 2015 13:43, Geert wrote:
> On arm64/shmobile:
>
> drivers/pci/host/pci-rcar-gen2.c: In function 'rcar_pci_cfg_base':
> drivers/pci/host/pci-rcar-gen2.c:112:34: error: dereferencing pointer to
> incomplete type
> struct rcar_pci_priv *priv = sys->private_data;
>
Hi Paul,
Currently RCU tree distributes CPUs to leafs based on consequent CPU
IDs. That means CPUs from remote caches and even nodes might end up
in the same leaf.
I did not research the impact, but at the glance that seems at least
sub-optimal; especially in case of remote nodes, when CPUs acces
[...]
>>> - mmc->max_seg_size = mmc->max_req_size;
>>> -#endif /* CONFIG_MMC_DW_IDMAC */
>>> + if (host->use_dma) {
>>> + mmc->max_segs = host->ring_size;
>>
>> I expect this may cause a compiler error since host->ring_size is only
>> available in
Hi Phil,
On Mon, Aug 17, 2015 at 12:23 PM, Phil Edworthy
wrote:
> On 11 August 2015 13:43, Geert wrote:
>> On arm64/shmobile:
>>
>> drivers/pci/host/pci-rcar-gen2.c: In function 'rcar_pci_cfg_base':
>> drivers/pci/host/pci-rcar-gen2.c:112:34: error: dereferencing pointer to
>> incomplete type
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