[GIT PULL] sound updates #2 for 4.7-rc1

Linus, please pull the second sound updates for v4.7-rc1 from: git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound.git tags/sound-4.7-rc1-2 The topmost commit is eb4606e64a7d548f5d60a9583baa8104890b2c6e sound updates #2

Re: [i2c: dev] d6760b14d4: BUG: KASAN: slab-out-of-bounds in of_device_uevent at addr ffff8800091b4c49

> There will be simple boot tests quickly after the compile tests. > However boot tests typically need more time to be detected, bisected > and especially manual checked. We are yet to automate more boot error > reports. Thanks for the heads up. Could there be success mails for boot tests, too?

Re: [patch v2] usb: f_fs: off by one bug in _ffs_func_bind()

much better readable than the original. nice work re, wh Am 28.05.2016 06:48, schrieb Dan Carpenter: > This loop is supposed to set all the .num[] values to -1 but it's off by > one so it skips the first element and sets one element past the end of > the array. > > I've cleaned up the loop a

[PATCH v5 05/22] ARM: dts: exynos: Use lowercase for Exynos5410 CPU node labels

For consistency lowercase node labels are used. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Javier Martinez Canillas --- arch/arm/boot/dts/exynos5410.dtsi | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git

[PATCH v5 01/22] dt-bindings: clock: Add license and reformat Exynos5410 clock IDs

Add license and copyrights (file introduced in 2014) to header with Exynos5410 clock IDs. Additionally reformat it to improve readability. Signed-off-by: Krzysztof Kozlowski Acked-by: Stephen Boyd Reviewed-by: Javier Martinez Canillas

[PATCH v5 03/22] clk: samsung: exynos5410: Add serial3, USB and PWM clocks

Just like other Exynos5 family SoCs, this one has four UARTs. Add missing UART3 clocks to the Exynos5410 clock driver. Add clocks for USB and PWM. Signed-off-by: Krzysztof Kozlowski Acked-by: Stephen Boyd Reviewed-by: Javier Martinez Canillas

[PATCH v5 13/22] ARM: dts: exynos: Enable UART3 on Exynos5410

Just like other Exynos5 family SoCs, this one has four UARTs. Configure clocks for UART3 and enable it. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Javier Martinez Canillas --- arch/arm/boot/dts/exynos5410.dtsi | 3 ++- 1 file changed, 2

[PATCH v5 00/22] ARM: dts: exynos: Add initial support for Odroid XU

Hi, Patchset adds necessary clocks, reorganizes existing stuff and finally adds Odroid XU support. Changes since v4 1. Patch 20: Remove the nodes in exynos5420.dtsi (before they were actually just copied instead of moving). Changes since v3 1. Get rid of 5

[PATCH v5 10/22] ARM: dts: exynos: Use phandle to get parent node in exynos5250-snow

The i2c-arbitrator node in exynos5250-snow-common used absolute path to reference other node (the i2c parent). Use phandle instead, because the depth of the other node may be changed (like moving it under 'soc' node). Signed-off-by: Krzysztof Kozlowski Reviewed-by: Javier

[PATCH v5 02/22] dt-bindings: clock: Add PWM and USB clock IDs to Exynos5410

Add IDs for PWM and USB clocks to Exynos5410. Use the same number as for Exynos5420 just in case in future these drivers were merged. Signed-off-by: Krzysztof Kozlowski Acked-by: Stephen Boyd Reviewed-by: Javier Martinez Canillas

[PATCH V3] mtd: nand: add Loongson1 NAND driver

From: Kelvin Cheung This patch adds NAND driver for Loongson1B. Signed-off-by: Kelvin Cheung --- v3: Replace __raw_readl/__raw_writel with readl/writel. Split ls1x_nand into two structures: ls1x_nand_chip and ls1x_nand_controller. V2:

4.7-rc0: redshift stopped working on intel display

Hi! It looks like redshift stopped working. Even pretty crazy settings have no visible effect: pavel@amd:~$ redshift -O 1500 -g 6.6:6.6:6.6 Using method `randr'. pavel@amd:~$ redshift -x Using method `randr'. pavel@amd:~$ uname -a Linux amd 4.6.0 #47 SMP Fri May 27 12:07:10 CEST 2016 x86_64

Re: [i2c: dev] d6760b14d4: BUG: KASAN: slab-out-of-bounds in of_device_uevent at addr ffff8800091b4c49

> 0day kernel testing robot got the below dmesg and the first bad commit is > > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master So, I got a success message from buildbot "[wsa:i2c/for-next] 72a71f869c95dc11b73f09fe18c593d4a0618c3f BUILD SUCCESS". I assume now that the

Re: [i2c: dev] d6760b14d4: BUG: KASAN: slab-out-of-bounds in of_device_uevent at addr ffff8800091b4c49

On Sat, May 28, 2016 at 09:12:34AM +0200, Wolfram Sang wrote: > > 0day kernel testing robot got the below dmesg and the first bad commit is > > > > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master > > So, I got a success message from buildbot "[wsa:i2c/for-next] >

Re: [PATCH] x86/mce: Do not use bank 1 for APEI generated error logs.

On Fri, May 27, 2016 at 02:11:06PM -0700, Tony Luck wrote: > diff --git a/arch/x86/kernel/cpu/mcheck/mce-apei.c > b/arch/x86/kernel/cpu/mcheck/mce-apei.c > index 34c89a3e8260..9d2c02337713 100644 > --- a/arch/x86/kernel/cpu/mcheck/mce-apei.c > +++ b/arch/x86/kernel/cpu/mcheck/mce-apei.c > @@

Re: [6/7] ath6kl: fix typo

Julia Lawall wrote: > firmare -> firmware > > Signed-off-by: Julia Lawall Thanks, 1 patch applied to ath.git: 8a9a3efa9e77 ath6kl: fix typo -- Sent by pwcli https://patchwork.kernel.org/patch/9113271/

Re: wifi: ath6kl: simplify logical condition

Heinrich Schuchardt wrote: > x <= 7 implies x < 8. > > Signed-off-by: Heinrich Schuchardt Thanks, 1 patch applied to ath.git: 93b4a09f0f30 ath6kl: simplify logical condition -- Sent by pwcli https://patchwork.kernel.org/patch/9115691/

Re: Very Urgent !

Date :: Saturday, May 28th, 2016. Greetings from BENIN REPUBLIC: Let me start by introduce myself; I am Mrs.Ruth Yoda, Bill and Exchange manager (Bank of Africa) Cotonou, Benin Republic. I write you this letter based on the latest development at our bank which i will like to bring to your

[PATCH 3/4] clocksource: sp804: use sp804_timer_disable() where possible

Use sp804_timer_disable() where possible, prepare for 64bit mode timer support. Signed-off-by: Kefeng Wang --- drivers/clocksource/timer-sp804.c | 11 +-- 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/clocksource/timer-sp804.c

[PATCH 2/4] clocksource: sp804: introduce helper sp804_load_mode_set()

Introduce helper sp804_load_mode_set(), and use it, prepare for 64bit mode timer support. Signed-off-by: Kefeng Wang --- drivers/clocksource/timer-sp804.c | 27 +-- 1 file changed, 13 insertions(+), 14 deletions(-) diff --git

[PATCH 0/4] Support hisilicon 64bit mode timer

There is a kind of 64bit mode timer in hisilicon soc(like Hip05, Hip06 and some arm32 soc), it is very similar with ARM sp804 Dual Timers, but TimerX LOAD/Value/BGLoad are 64bit(two 32bit regs), and reg offset is different. This patchset make some cleanup and enable 64bit mode timer for

[PATCH 4/4] clocksource: sp804: support 64bit mode for hisilicon timer64

There is a kind of 64bit mode timer in hisilicon soc(like Hip05, Hip06 and some arm32 soc), it is very similar with ARM sp804 Dual Timers, but TimerX LOAD/Value/BGLoad are 64bit(two 32bit regs), and reg offset is different. Signed-off-by: Kefeng Wang ---

[PATCH 1/4] clocksource: sp804: cleanup clk_get_sys()

Move the clk_get_sys() part into sp804_get_clock_rate(), cleanup the same code. Signed-off-by: Kefeng Wang --- drivers/clocksource/timer-sp804.c | 34 +++--- 1 file changed, 11 insertions(+), 23 deletions(-) diff --git

[PATCH V3] dmaengine: Loongson1: add Loongson1 dmaengine driver

From: Kelvin Cheung This patch adds DMA Engine driver for Loongson1B. Signed-off-by: Kelvin Cheung --- V3: Rename ls1x_dma_filter_fn to ls1x_dma_filter. V2: Change the config from 'DMA_LOONGSON1' to 'LOONGSON1_DMA', and rearrange it

[PATCH] MIPS: Loongson1B: Provide DMA filter callbacks via platform data

From: Kelvin Cheung This patch provides DMA filter callbacks via platform data to make NAND driver independent of single DMA engine driver. Signed-off-by: Kelvin Cheung --- arch/mips/include/asm/mach-loongson32/dma.h | 4

[PATCH] MIPS: Loongson1B: Remove ARCH_WANT_OPTIONAL_GPIOLIB

From: Kelvin Cheung This patch removes ARCH_WANT_OPTIONAL_GPIOLIB due to upstream changes. Signed-off-by: Kelvin Cheung --- arch/mips/Kconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index

[PATCH v5 17/22] ARM: dts: exynos: Add initial support for Odroid XU board

The Hardkernel's Odroid XU board was first design with big.LITTLE SoC from Samsung: the Exynos5410. Details: 1. Exynos5410 octa-core (A15+A7, however as of now only one cluster is enabled), 2. 2 GB DDR3 RAM, 3. PowerVR SGX544MP3 GPU (not enabled in DTS), 4. USB 3.0 Host x 1, USB 3.0 OTG x 1,

[PATCH v5 16/22] ARM: dts: exynos: Add USB to Exynos5410

Move USB 3.0 DWC and 2.0 EHCI/OHCI nodes from exynos5420.dtsi to exynos54xx.dtsi common for entire family. For Exynos542x/5800 this should not have functional impact but for Exynos5410 this effectively adds USB support. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Javier

[PATCH v5 14/22] ARM: dts: exynos: MCT is not an interrupt controller and extend length of iomap

Multi-Core Timer generates interrupts but it is not really an interrupt controller so remove the "interrupt-controller" and "interrupt-cells" properties. Additionally extend the length of mapped memory to cover all registers (last SFR is at 0x0A40). Signed-off-by: Krzysztof Kozlowski

[PATCH v5 15/22] ARM: dts: exynos: Move common Exynos5410/542x/5800 nodes to new DTSI

The Exynos5410/542x/5800 are very similar designs. Create a new DTSI with common nodes to remove DTS duplication. Although currently only MCT and SysRAM are shared but in future more nodes will be added to the common file. The patch should not have functional impact. Signed-off-by: Krzysztof

[PATCH v5 19/22] clk: samsung: exynos5410: Add I2C, HSI2C and RTC clocks

Add clocks for I2C, USI (HSI2C) and RTC to the Exynos5410 clock driver. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Javier Martinez Canillas --- drivers/clk/samsung/clk-exynos5410.c | 9 + 1 file changed, 9 insertions(+) diff --git

[PATCH v5 21/22] ARM: dts: exynos: Add I2C, PWM and UART pinctrl to Exynos5410

Add pincontrol groups for HSI2C (USI), I2C, PWM and UART to Exynos5410. This allows configuring these pins to specific functions. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Javier Martinez Canillas --- arch/arm/boot/dts/exynos5410-pinctrl.dtsi |

[PATCH v5 18/22] dt-bindings: clock: Add I2C, HSI2C and RTC clock IDs to Exynos5410

Add IDs for I2C, USI (HSI2C) and RTC clocks to Exynos5410. Use the same number as for Exynos5420 just in case in future these drivers were merged. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Javier Martinez Canillas ---

[PATCH v5 20/22] ARM: dts: exynos: Move HSI2C nodes to exynos54xx.dtsi

The USI/HSI2C nodes can be mostly shared between Exynos5420 and Exynos5410 so move them to common DTSI. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Javier Martinez Canillas Tested-by: Javier Martinez Canillas --- Change

[PATCH v5 22/22] ARM: dts: exynos: Add RTC and I2C to Exynos5410

Configure Exynos5410-specific properties of RTC, I2C and HSI2C nodes. This still does not enable them on the board level though. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Javier Martinez Canillas --- arch/arm/boot/dts/exynos5410.dtsi | 63

Re: [PATCH v2] perf tools: Add arch/*/include/generated/ to .gitignore

On 05/27/2016 11:44 PM, Arnaldo Carvalho de Melo wrote: Em Fri, May 27, 2016 at 07:01:14PM +0900, Taeung Song escreveu: Commit 1b700c9975008615ad470cf79acc8455ce60a695 ("perf tools: Build syscall table .c header from kernel's syscall_64.tbl") that automatically generate per-arch syscall table

Re: [i2c: dev] d6760b14d4: BUG: KASAN: slab-out-of-bounds in of_device_uevent at addr ffff8800091b4c49

On Sat, May 28, 2016 at 09:32:17AM +0200, Wolfram Sang wrote: > > > There will be simple boot tests quickly after the compile tests. > > However boot tests typically need more time to be detected, bisected > > and especially manual checked. We are yet to automate more boot error > > reports. > >

Re: [patch v2] usb: f_fs: off by one bug in _ffs_func_bind()

On Sat, May 28 2016, Dan Carpenter wrote: > This loop is supposed to set all the .num[] values to -1 but it's off by > one so it skips the first element and sets one element past the end of > the array. > > I've cleaned up the loop a little as well. > > Fixes: ddf8abd25994 ('USB: f_fs: the

Re: [Intel-gfx] [v4.6-10530-g28165ec7a99b] i915: *ERROR* "CPU pipe/PCH transcoder" A FIFO underrun

On 5/27/16, Chris Bainbridge wrote: > On 25 May 2016 at 08:31, Sedat Dilek wrote: >> Hi Daniel, >> >> with latest Linus Git I see this with my Intel SandyBridge GPU... >> >> [ 17.629014] [drm:intel_cpu_fifo_underrun_irq_handler [i915]] >>

[PATCH] cfg80211: Fix checkpatch issues

Fix the following issues reported by checkpatch.pl - - document spinlock_t where needed/possible - do not use multiple blank lines - add blank line after a declaration - use a trailing '*/' on a separate line in block comments - don't use empty '/*' lines - use ether_addr_copy instead of memcpy -

[PATCH] cfg80211: Fix checkpatch issues

Fix the following issues reported by checkpatch.pl - - document spinlock_t where needed/possible - do not use multiple blank lines - add blank line after a declaration - use a trailing '*/' on a separate line in block comments - don't use empty '/*' lines - use ether_addr_copy instead of memcpy -

Re: pxa_defconfig runtime failures due to 'ARM: pxa: activate pinctrl for device-tree machines'

Guenter Roeck writes: > Hi, > > your mainline commit f806dac5938b ("ARM: pxa: activate pinctrl for device-tree > machines") causes various non-devicetree systems to fail with the following > error messages when running a pxa_defconfig image. Ah yes, you're right. > > During

[PATCH] Add more Intel GPUs IDs to quirks.c

Hello all, Please someone have a look at this trivial and annoying issue. Why users have to "fix" this problem for newer Intel PCI ids on a 1-by-1 basis themselves yet again and again, after lots of time-wasting and hair-pulling. +++ drivers/pci/quirks.c2016-05-23 00:34:16.001122309

[PATCH] Revert "i2c: dev: switch from register_chrdev to cdev API"

This reverts commit d6760b14d4a1243f918d983bba1e35c5a5cd5a6d. When hitting Linus' tree, buildbots ran additional checks and found boot problems. Although Dan Carpenter provided an obvious fix already, I still could not reproduce one problem manually (at least not on a Saturday morning). So we'll

Re: [PATCH] Revert "i2c: dev: switch from register_chrdev to cdev API"

On Sat, May 28, 2016 at 11:07:47AM +0200, Wolfram Sang wrote: > This reverts commit d6760b14d4a1243f918d983bba1e35c5a5cd5a6d. When > hitting Linus' tree, buildbots ran additional checks and found boot > problems. Although Dan Carpenter provided an obvious fix already, I > still could not reproduce

[PATCH v2 0/5] fix some type infos and bugs for arm64/of numa

v1 -> v2: 1. Base on https://lkml.org/lkml/2016/5/24/679 2. Rewrote of_numa_parse_memory_nodes according to Rob Herring's advice. So that it looks more clear. 3. Rewrote patch 5 because some scenes were not considered before. Zhen Lei (5): of/numa: remove a duplicated pr_debug information

[PATCH v2 5/5] arm64/numa: avoid inconsistent information to be printed

numa_init(of_numa_init) may returned error because of numa configuration error. So "No NUMA configuration found" is inaccurate. In fact, specific configuration error information should be immediately printed by the testing branch. Signed-off-by: Zhen Lei ---

[PATCH v2 3/5] arm64/numa: add nid check for memory block

Use the same tactic to cpu and numa-distance nodes. Signed-off-by: Zhen Lei --- arch/arm64/mm/numa.c | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/arm64/mm/numa.c b/arch/arm64/mm/numa.c index c7fe3ec..2601660 100644 --- a/arch/arm64/mm/numa.c +++

[PATCH v2 4/5] of/numa: remove a duplicated warning

This warning has been printed in of_numa_parse_cpu_nodes before. Signed-off-by: Zhen Lei --- drivers/of/of_numa.c | 9 ++--- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/drivers/of/of_numa.c b/drivers/of/of_numa.c index fa85a51..fb62307 100644

[PATCH v2 1/5] of/numa: remove a duplicated pr_debug information

This information will be printed in the subfunction numa_add_memblk. They are not the same, but very similar. Signed-off-by: Zhen Lei --- drivers/of/of_numa.c | 4 1 file changed, 4 deletions(-) diff --git a/drivers/of/of_numa.c b/drivers/of/of_numa.c index

[PATCH v2 2/5] of/numa: fix a memory@ node can only contains one memory block

For a normal memory@ devicetree node, its reg property can contains more memory blocks. Because we don't known how many memory blocks maybe contained, so we try from index=0, increase 1 until error returned(the end). Signed-off-by: Zhen Lei --- drivers/of/of_numa.c

Re: [PATCH] block: correctly fallback for zeroout

On Sat, May 28, 2016 at 08:55:43AM +, Sitsofe Wheeler wrote: > On Thu, May 26, 2016 at 11:08:14AM -0700, Shaohua Li wrote: > > blkdev_issue_zeroout try discard/writesame first, if they fail, zeroout > > fallback to regular write. The problem is discard/writesame doesn't > > return error for

[PATCH v5 12/22] ARM: dts: exynos: Include common exynos5 in exynos5410.dtsi

The exynos5.dtsi is used for common nodes shared between Exynos5250 and Exynos542x. Since Exynos5410 is very similar to Exynos5420 it can include the common file as well to remove duplication and make everything more consistent. Signed-off-by: Krzysztof Kozlowski Reviewed-by:

[PATCH v5 11/22] ARM: dts: exynos: Move Exynos5250 and Exynos5420 nodes under soc

The conventions is to put SoC devices under 'soc' node. In fact other our DTSes (like exynos3250.dtsi or exynos5410.dtsi) already follow it. Adjust exynos5250 and exynos5420 DTSI to follow this convention. This is also necessary for the upcoming change in exynos5410.dtsi to inherit from common

[PATCH v5 04/22] ARM: dts: exynos: Re-order alphabetically Exynos5420 SD0/SD1 pinctrl nodes

The 'sd0_rclk' was put in the middle of SD1 nodes. Remove the confusion. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Javier Martinez Canillas Tested-by: Javier Martinez Canillas --- arch/arm/boot/dts/exynos5420-pinctrl.dtsi

[PATCH v5 06/22] ARM: dts: exynos: Configure Exynos5410 pinctrl for eMMC and SD card

Configure the pinctrl for MMC0 (eMMC) and MMC2 (microSD card). Signed-off-by: Krzysztof Kozlowski Reviewed-by: Javier Martinez Canillas --- Important changes since v2: 1. Re-order the eMMC pins by pin-name, not by label. ---

[PATCH v5 08/22] ARM: dts: exynos: Move common nodes to exynos5.dtsi

Exynos5420 and Exynos5250 share some nodes: the PWM, syscon (sysreg_system_controller) and first four I2C controllers. Move them to parent DTSI to avoid duplication. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Javier Martinez Canillas Tested-by:

[PATCH v5 09/22] ARM: dts: exynos: Prepare for inclusion of exynos5.dtsi in exynos5410.dtsi

Add 'sromc' label to SROM memory controller in common exynos5.dtsi so it can be referenced by inheriting DTSI. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Javier Martinez Canillas Tested-by: Javier Martinez Canillas ---

[PATCH v5 07/22] ARM: dts: exynos: Split Odroid XU3 LEDs to separate DTSI

The LED nodes can be shared between Odroid XU3, XU3-Lite and XU (not yet added) thus removing duplication. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Javier Martinez Canillas Tested-by: Javier Martinez Canillas ---

Re: [PATCH v5] input: tablet: add Pegasus Notetaker tablet driver

Hi Dmitry, Thanks again for your help! Only one comment below... Am 2016-05-27 um 23:59 schrieb Dmitry Torokhov: > Hi Martin, > >> +static void pegasus_parse_packet(struct pegasus *pegasus) >> +{ >> +unsigned char *data = pegasus->data; >> +struct input_dev *dev = pegasus->dev; >> +

[PATCH v6 11/11] perf callchain: Support aarch64 cross-platform

Support aarch64 cross platform callchain unwind. Signed-off-by: He Kuang --- tools/perf/arch/Build | 1 + tools/perf/arch/arm64/util/unwind-libunwind.c | 4 +++- .../perf/arch/arm64/util/unwind-libunwind_arm64.c | 22

[PATCH v6 06/11] perf tools: Extract local libunwind code out of unwind-libunwind.c

This patch extracts codes related to specific arithecture out of unwind-libunwind.c. The extrated part are only built if local libunwind is supported. Signed-off-by: He Kuang --- tools/perf/util/Build| 1 + tools/perf/util/unwind-libunwind-local.c | 677

[PATCH v6 03/11] perf tools: Introducing struct unwind_libunwind_ops for local unwind

Currently, libunwind operations are fixed, and they are chosen according to the host architecture. This will lead a problem that if a thread is run as x86_32 on x86_64 machine, perf will use libunwind methods for x86_64 to parse the callchain and get wrong result. This patch changes the fixed

Re: [PATCH 3/3] pvclock: Add a new wrapper function to only get variable flags

On 05/27/16 at 06:06P, Paolo Bonzini wrote: > > > On 27/05/2016 17:40, Andy Lutomirski wrote: > > On Thu, May 26, 2016 at 11:17 PM, Minfei Huang wrote: > >> There is a generic function __pvclock_read_cycles to be used to get both > >> flags and cycles. For function

[PATCH v6 08/11] perf tools: Show warnings for unsupported cross-platform unwind

Currently, perf script uses host unwind methods to parse perf.data callchain info regardless of the target architecture. So we get wrong result without any warnings when unwinding callchains of x86(32-bit) on x86(64-bit) machine. This patch shows warning messages when we do remote unwind

Re: [PATCH v6 06/11] perf tools: Extract local libunwind code out of unwind-libunwind.c

On 2016/5/28 19:59, He Kuang wrote: This patch extracts codes related to specific arithecture out of unwind-libunwind.c. The extrated part are only built if local libunwind is supported. Signed-off-by: He Kuang --- tools/perf/util/Build| 1 +

Re: [PATCH V3] mtd: nand: add Loongson1 NAND driver

Hi Kelvin, On Sat, 28 May 2016 17:54:10 +0800 Keguang Zhang wrote: > From: Kelvin Cheung > > This patch adds NAND driver for Loongson1B. I think your controller matches Mychaela's "high-level NAND controller" definition [1]. Mychaela, can you

[PATCH 3/3 V2] pvclock: Get rid of __pvclock_read_cycles in function pvclock_read_flags

There is a generic function __pvclock_read_cycles to be used to get both flags and cycles. For function pvclock_read_flags, it's useless to get cycles value. To make this function be more effective, get this variable flags directly in function. Signed-off-by: Minfei Huang ---

Re: Nokia N900 retention mode in v4.6, camera buttons fun

On Mon 2016-05-02 22:12:17, Sebastian Reichel wrote: > Hi Pavel, > > On Sun, May 01, 2016 at 05:48:56PM +0200, Sebastian Reichel wrote: > > > I see latest series, and it also talks about frequency scaling. > > > But I guess it is not going to fix this issue? > > > > No, this is independent of

Re: [PATCH] tty: vt: Fix soft lockup in fbcon cursor blink timer.

On Tue, 17 May 2016, David Daney wrote: > From: David Daney > We are getting somewhat random soft lockups with this signature: > > [ 86.992215] [] el1_irq+0xa0/0x10c > [ 86.997082] [] cursor_timer_handler+0x30/0x54 > [ 87.002991] [] call_timer_fn+0x54/0x1a8 > [

Re: [PATCH] fbcon: warn on invalid cursor blink intervals

On Thu, 19 May 2016, Scot Doyle wrote: > Two systems are locking on boot [1] because ops->cur_blink_jiffies > is set to zero from vc->vc_cur_blink_ms. > > Ignore such invalid intervals and log a warning. > > [1] https://bugs.launchpad.net/bugs/1574814 > > Suggested-by: David Daney

Re: [PATCH] fbcon: warn on invalid cursor blink intervals

On Fri, 20 May 2016, Scot Doyle wrote: > On Fri, 20 May 2016, Jeremy Kerr wrote: > > >Then looks there are two fix patches acked & tested: > > > > > > - the patch in this thread > > > - another one "[PATCH] tty: vt: Fix soft lockup in fbcon cursor > > >blink timer." > > >

[PATCH v6 07/11] perf tools: Export normalize_arch() function

Export normalize_arch() function, so other part of perf can get normalized form of arch string. Signed-off-by: He Kuang --- tools/perf/arch/common.c | 2 +- tools/perf/arch/common.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/tools/perf/arch/common.c

[PATCH v6 04/11] perf tools: Move unwind__prepare_access from thread_new into thread__insert_map

For determine the libunwind methods to use, we should get the 32bit/64bit information from maps of a thread. When a thread is newly created, the information is not prepared. This patch moves unwind__prepare_access() into thread__insert_map() so we can get the information we need from maps.

[PATCH v6 02/11] perf tools: Decouple thread->address_space on libunwind

Currently, the type of thread->addr_space is unw_addr_space_t, which is a pointer defined in libunwind headers. For local libunwind, we can simple include "libunwind.h", but for remote libunwind, the header file is depends on the target libunwind platform. This patch uses 'void *' instead to

[PATCH v6 10/11] perf callchain: Support x86 target platform

Support x86(32-bit) cross platform callchain unwind. Signed-off-by: He Kuang --- tools/perf/arch/Build | 1 + tools/perf/arch/x86/util/unwind-libunwind.c| 7 --- tools/perf/arch/x86/util/unwind-libunwind_x86_32.c | 21

[PATCH v6 01/11] perf tools: Use LIBUNWIND_DIR for remote libunwind feature check

Pass LIBUNWIND_DIR to feature check flags for remote libunwind tests. So perf can be able to detect remote libunwind libraries from arbitrary directory. Signed-off-by: He Kuang --- tools/perf/config/Makefile | 9 + 1 file changed, 9 insertions(+) diff --git

[PATCH v6 09/11] perf tools: Change fixed name of libunwind__arch_reg_id to macro

For local libunwind, it uses the fixed methods to convert register id according to the host platform, but in remote libunwind, this convert function should be the one for remote architechture. This patch changes the fixed name to macro and code for each remote platform can be compiled

[PATCH v6 05/11] perf tools: Separate local/remote libunwind config

CONFIG_LIBUNWIND/NO_LIBUNWIND are changed to CONFIG_LOCAL_LIBUNWIND/NO_LOCAL_LIBUNWIND for retaining local unwind features. The new CONFIG_LIBUNWIND stands for either local or remote or both unwind are supported. Signed-off-by: He Kuang --- tools/perf/arch/arm/util/Build

[PATCH v6 00/11] Add support for remote unwind

v5 url: http://thread.gmane.org/gmane.linux.kernel/2226821 Currently, perf script uses host unwind methods(local unwind) to parse perf.data callchain info regardless of the target architecture. So we get wrong result and no promotion when do remote unwind on other platforms/machines. This

Re: pxa_defconfig runtime failures due to 'ARM: pxa: activate pinctrl for device-tree machines'

On 05/28/2016 01:24 AM, Robert Jarzmik wrote: Guenter Roeck writes: Hi, your mainline commit f806dac5938b ("ARM: pxa: activate pinctrl for device-tree machines") causes various non-devicetree systems to fail with the following error messages when running a pxa_defconfig

[PATCH V6 3/8] vfio: platform: add support for ACPI probe

The code is using the compatible DT string to associate a reset driver with the actual device itself. The compatible string does not exist on ACPI based systems. HID is the unique identifier for a device driver instead. Signed-off-by: Sinan Kaya ---

[PATCH V6 5/8] vfio: platform: call _RST method when using ACPI

The device tree code checks for the presence of a reset driver and calls the of_reset function pointer by looking up the reset driver as a module. ACPI defines _RST method to perform device level reset. After the _RST method is executed, the OS can resume using the device. _RST method is expected

[PATCH V6 7/8] vfio: platform: check reset call return code during open

Open call is ignoring the return code from reset call and can potentially continue even though reset call failed. If reset_required module parameter is set, this patch is going to validate the return code and will abort open if reset fails. Signed-off-by: Sinan Kaya ---

[PATCH V6 4/8] vfio: platform: add extra debug info argument to call reset

Getting ready to bring out extra debug information to the caller so that more verbose information can be printed when an error is observed. Signed-off-by: Sinan Kaya --- drivers/vfio/platform/vfio_platform_common.c | 9 + 1 file changed, 5 insertions(+), 4

[PATCH V6 1/8] vfio: platform: move reset call to a common function

The reset call sequence seems to replicate itself multiple times across the file. Grouping them together for maintenance reasons. Signed-off-by: Sinan Kaya Reviewed-by: Eric Auger --- drivers/vfio/platform/vfio_platform_common.c | 30

[PATCH 1/1] iio: light: Added CM36672 Proximity Sensor Driver.

Added Vishay Capella CM36672 Proximity Sensor IIO driver. Support both ACPI and Device Tree. Signed-off-by: Kevin Tsai --- .../devicetree/bindings/i2c/trivial-devices.txt| 1 + .../devicetree/bindings/iio/light/cm36672.txt | 54 ++ MAINTAINERS

[PATCH] of: irq: don't return 0 from of_irq_get()

of_irq_get() returns 0 iff irq_create_of_mapping() call fails. Returning both error code and 0 on failure is a sign of a misdesigned API. Return -ENXIO instead like one of the callers, platform_get_irq(), does; fix up the kernel-doc as well... Signed-off-by: Sergei Shtylyov

Re: [PATCH v2 3/3] cpufreq: schedutil: map raw required frequency to driver frequency

On Thu, May 26, 2016 at 9:16 AM, Viresh Kumar wrote: > On 25-05-16, 19:53, Steve Muckle wrote: >> The slow-path frequency transition path is relatively expensive as it >> requires waking up a thread to do work. Should support be added for >> remote CPU cpufreq updates

Hello

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[PATCH] x86: Add early quirk to reset Apple AirPort card

The EFI firmware on Macs contains a full-fledged network stack for downloading OS X images from osrecovery.apple.com. Unfortunately on Macs introduced 2011 and 2012, EFI brings up the Broadcom 4331 wireless card on every boot and leaves it enabled even after ExitBootServices has been called. The

[PATCH V6 6/8] vfio, platform: make reset driver a requirement by default

The code was allowing platform devices to be used without a supporting VFIO reset driver. The hardware can be left in some inconsistent state after a guest machine abort. The reset driver will put the hardware back to safe state and disable interrupts before returning the control back to the host

[PATCH V6 8/8] vfio: platform: check reset call return code during release

Release call is ignoring the return code from reset call and can potentially continue even though reset call failed. If reset_required module parameter is set, this patch is going to validate the return code and will cause stack dump with WARN_ON and warn the user of failure. Signed-off-by:

[PATCH V6 2/8] vfio: platform: determine reset capability

Creating a new function to determine if this driver supports reset function or not. This is an attempt to abstract device tree calls from the rest of the code. Signed-off-by: Sinan Kaya Reviewed-by: Eric Auger ---

Re: [PATCH v2] tracing: Choose static tp_printk buffer by explicit nesting count

Hi Andy, On Fri, May 27, 2016 at 4:00 AM, Andy Lutomirski wrote: > Currently, the trace_printk code chooses which static buffer to use based > on what type of atomic context (NMI, IRQ, etc) it's in. Simplify the > code and make it more robust: simply count the nesting depth and

[PATCH] befs/linuxvfs: remove unneeded initialization

res is initialized to 0 in befs_get_block() but this value will be overwritten before it is used. Signed-off-by: Luis de Bethencourt --- Hi, Saw this small issue while reading the code. BeFS is very interesting, and reading this code is very educational after reading

Re: [PATCH v5 3/4] iio: stx104: Allow build for X86_64

On 27/05/16 23:09, William Breathitt Gray wrote: > With the introduction of the ISA_BUS_API Kconfig option, ISA-style > drivers may be built for X86_64 architectures. This patch changes the > ISA Kconfig option dependency of the Apex Embedded Systems STX104 DAC > driver to ISA_BUS_API, thus

Re: [PATCH] mtd: brcmnand: Add v7.2 controller support

Hello, On Fri, 27 May 2016 14:58:11 -0700, Florian Fainelli wrote: > + if (ctrl->nand_version >= 0x0702) > + bits = 7; > if (ctrl->nand_version >= 0x0600) Don't you want an "else if" here ? Otherwise, even for the 7.2 version of your controller bits will be set to 1.

[PATCH v3 01/10] Pull out string hash to

... so they can be used without the rest of The hashlen_* macros will make sense next patch. Signed-off-by: George Spelvin --- include/linux/dcache.h | 27 + include/linux/stringhash.h | 72 ++ 2 files

[PATCH v3 10/10] h8300: Add

This will improve the performance of hash_32() and hash_64(), but due to complete lack of multi-bit shift instructions on H8, performance will still be bad in surrounding code. Designing H8-specific hash algorithms to work around that is a separate project. (But if the maintainers would like to

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