On Wed, Jun 01, 2016 at 12:53:59PM +0530, Kedareswara rao Appana wrote:
> +config XILINX_ZYNQMP_DMA
> + tristate "Xilinx ZynqMP DMA Engine"
> + depends on (ARCH_ZYNQ || MICROBLAZE || ARM64)
> + select DMA_ENGINE
> + help
> + Enable support for Xilinx ZynqMP DMA controller.
Kc
The idea is good, define the heap ids in header file is inconvenient.
But if we query the heaps information from user-space.
It need to maintain this ids and name userspace one by one. The code may
be complicated in different module user-space.
In android, the gralloc and other lib will all use
On 06/06/2016 07:56 PM, Marc Zyngier wrote:
> The ARM architected timer specification mandates that the interrupt
> associated with each timer is level triggered (which corresponds to
> the "counter >= comparator" condition).
>
> A number of DTs are being remarkably creative, declaring the interru
Hi Baolu
> -Original Message-
> From: Lu Baolu [mailto:baolu...@linux.intel.com]
> Sent: Tuesday, June 07, 2016 2:27 PM
> To: Jun Li ; Roger Quadros ; Peter Chen
>
> Cc: felipe.ba...@linux.intel.com; Mathias Nyman ;
> Greg Kroah-Hartman ; Lee Jones
> ; Heikki Krogerus ;
> Liam Girdwood ;
Jens,
are you picking this fix?
Thanks,
Paolo
Il 13/05/2016 22:42, Jeff Moyer ha scritto:
Paolo Valente writes:
When a bio is cloned, the newly created bio must be associated with
the same blkcg as the original bio (if BLK_CGROUP is enabled). If
this operation is not performed, then the new
Add documentation for ad5820 device tree binding.
Signed-off-by: Pavel Machek
Acked-by: Sakari Ailus
Acked-by: Rob Herring
---
v2: Fixed nit in example, added acks.
diff --git a/Documentation/devicetree/bindings/media/i2c/ad5820.txt
b/Documentation/devicetree/bindings/media/i2c/ad5820.txt
On Mon, Jun 06, 2016 at 03:20:03PM +0200, Thomas Gleixner wrote:
> On Thu, 2 Jun 2016, Dong Aisheng wrote:
> > On Wed, Apr 27, 2016 at 12:15:00PM +0200, Thomas Gleixner wrote:
> > > Calling a function which might sleep _BEFORE_ kernel_init() is wrong.
> > > Don't
> > > try to work around such an i
On Mon, Jun 06, 2016 at 11:31:39PM +0200, Mateusz Guzik wrote:
> The reason is that leaf_walk_rcu does get_child_rcu(pn, cindex++), which
> ends up in lockless_dereference as pn[cindex++], which is now evaluated
> twice.
Indeed, bad that; yes I think the below will work, will you send a
proper pa
On Mon, Jun 06, 2016 at 09:47:52PM +, Mathieu Desnoyers wrote:
> >> +++ b/kernel/sched/core.c
> >> @@ -2230,6 +2230,11 @@ int sysctl_schedstats(struct ctl_table *table, int
> >> write,
> >> #endif
> >> #endif
> >>
> >> +static void sched_set_prio(struct task_struct *p, int prio)
> >> +{
> >>
On Mon, Jun 06, 2016 at 11:10:38PM -0700, Eric Anholt wrote:
> >> >> - if (ret == DMA_COMPLETE || !txstate)
> >> >> + if (ret == DMA_COMPLETE)
> >> >
> >> > Why do you change this? txstate can be NULL, so no point calculating
> >> > reside
> >> > for those cases
> >>
> >> The point wa
On Mon, Jun 06, 2016 at 10:28:24AM -0700, Paul E. McKenney wrote:
> commit 43672d15aeb69b1a196c06cbc071cbade8d247fd
> Author: Paul E. McKenney
> Date: Mon Jun 6 10:19:42 2016 -0700
>
> documentation: Clarify limited control-dependency scope
>
> Nothing in the control-dependencies s
DT binding documentation for ISC driver.
Signed-off-by: Songjun Wu
---
Changes in v4:
- Remove the isc clock nodes.
Changes in v3:
- Remove the 'atmel,sensor-preferred'.
- Modify the isc clock node according to the Rob's remarks.
Changes in v2:
- Remove the unit address of the endpoint.
- Add
Add driver for the Image Sensor Controller. It manages
incoming data from a parallel based CMOS/CCD sensor.
It has an internal image processor, also integrates a
triple channel direct memory access controller master
interface.
Signed-off-by: Songjun Wu
---
Changes in v4:
- Modify the isc clock c
The Image Sensor Controller driver includes two parts.
1) Driver code to implement the ISC function.
2) Device tree binding documentation, it describes how
to add the ISC in device tree.
Changes in v4:
- Modify the isc clock code since the dt is changed.
- Remove the isc clock nodes.
Changes i
On 06/06/2016 06:56 PM, Rhyland Klein wrote:
> Add check to power_supply_read_temp() to only use the power_supply
> get_property() callback if the use_cnt is > 0. The use_cnt will
> be incremented at the end of __power_supply_register, so this will
> block to case where get_property can be called b
Hello
On 6/3/2016 7:29 PM, Vincent Palatin wrote:
Do not shutdown the PHY if Wake-on-Lan is enabled, else it cannot wake
us up.
I do not understand why you need that.
This is done inside the PHY layer and it is tested on our platforms
he idea is: If the parent wants to Wake the system then th
On Thu, 2 Jun 2016 18:11:02 -0700
Omar Sandoval wrote:
> From: Omar Sandoval
>
> ftrace is very quick to give up on saving the task command line (see
> `trace_save_cmdline()`). The workaround for events which really care
> about the command line is to explicitly assign it as part of the entry.
On 07/06/2016 03:24, Rik van Riel wrote:
> On Mon, 2016-06-06 at 15:40 +0200, Paolo Bonzini wrote:
>>
>> On 02/06/2016 15:59, Rik van Riel wrote:
>>>
>>> If a guest is saved to disk and later restored (eg. after
>>> a host reboot), or live migrated to another host, I would
>>> expect to get total
Hi Magnus,
On Tue, Jun 7, 2016 at 5:39 AM, Magnus Damm wrote:
> iommu/ipmmu-vmsa: Initial r8a7796 support
>
> [PATCH 1/3] iommu/ipmmu-vmsa: Add r8a7796 DT binding
> [PATCH 2/3] iommu/ipmmu-vmsa: Increase maximum micro-TLBS to 48
> [PATCH 3/3] iommu/ipmmu-vmsa: Hook up r8a7796 DT matching code
>
>
On Mon, Jun 06, 2016 at 10:15:06PM +0100, Sudip Mukherjee wrote:
> prot_sg_cnt has been assigned with the value of ret which we have
> already checked to be non-zero so prot_sg_cnt can never be zero at this
> point of the code and hence the else part can never execute.
> And since we know prot_sg_c
On Fri 03-06-16 17:10:01, Andrea Arcangeli wrote:
> Hello Michal,
>
> CC'ed Hugh,
>
> On Fri, Jun 03, 2016 at 04:46:00PM +0200, Michal Hocko wrote:
> > What do you think about the external dependencies mentioned above. Do
> > you think this is a sufficient argument wrt. occasional higher
> > late
On 6.6.2016 19:56, Marc Zyngier wrote:
> The ARM architected timer specification mandates that the interrupt
> associated with each timer is level triggered (which corresponds to
> the "counter >= comparator" condition).
>
> A number of DTs are being remarkably creative, declaring the interrupt
>
Hi Dietmar,
On 6 June 2016 at 21:32, Dietmar Eggemann wrote:
> On 01/06/16 16:54, Vincent Guittot wrote:
>> On 1 June 2016 at 17:31, Dietmar Eggemann wrote:
>>> On 30/05/16 16:52, Vincent Guittot wrote:
The cfs_rq->avg.last_update_time is initialize to 0 with the main effect
that the 1
2016-06-07 15:31 GMT+08:00 Paolo Bonzini :
>
>
> On 07/06/2016 03:24, Rik van Riel wrote:
>> On Mon, 2016-06-06 at 15:40 +0200, Paolo Bonzini wrote:
>>>
>>> On 02/06/2016 15:59, Rik van Riel wrote:
If a guest is saved to disk and later restored (eg. after
a host reboot), or live migr
Hi Ted,
Thanks for your explanation which convinced me.
Regards,
Mariusz.
-Original Message-
From: Theodore Ts'o [mailto:ty...@mit.edu]
Sent: Monday, June 6, 2016 15:36
To: Barczak, Mariusz
Cc: Andreas Dilger ; Andrew Morton
; Jens Axboe ; Alexander Viro
; linux...@kvack.org; linux-bl.
On 06/06/2016 06:35 PM, Ben Dooks wrote:
> Fix the path for s5p-dev-mfc.c to arch/arm/mach-exynos
> (Moved in b93b315d444faa1505b6a5e001c30f3024849e46)
>
> Signed-off-by: Ben Dooks
> ---
> Cc: Krzysztof Kozlowski
> Cc: Kukjin Kim
> Cc: linux-kernel@vger.kernel.org
> ---
> MAINTAINERS | 2 +-
>
On a 4-socket brickland, hot-removing one ioapic is fine. Hot-removing
the 2nd one causes panic:
[ 453.422259] BUG: unable to handle kernel NULL pointer dereference at
0030
[ 453.431059] IP: [] release_resource+0x22/0x80
[ 453.437713] PGD 0
[ 453.439976] Oops: [#1] SMP
[ 453.
Hi All,
While testing ioapic hotplug, two bugs were found.
1) acpi_ioapic_add() is only called during hotadd of ioapics. Those
already present during system boot are not added, and thus cannot be
hot-removed.
2) ioapics[i].iomem_res were assigned the wrong pointers, causing panic
while hot-remov
IOAPICs present during system boot aren't added to ioapic_list,
thus are unable to be hot-removed. Fix it by calling
acpi_ioapic_add() during root bus enumeration.
Signed-off-by: Rui Wang
---
drivers/acpi/internal.h | 2 --
drivers/acpi/ioapic.c | 7 ---
drivers/acpi/pci_root.c | 2 +-
dri
>From soylentnews:
https://soylentnews.org/comments.pl?threshold=-1&highlightthresh=-1&mode=improvedthreaded&commentsort=5&op=Change&sid=13849#post_comment
>Re:Playing lawyer (Score:2)
>by darkfeline (1030) on Sunday >June 05, @06:30AM (#355471) >Homepage
>
>But you didn't even address my argument.
Now that we do have pci_request_mem_regions() and pci_release_mem_regions() at
hand, use it in the NVMe driver.
Suggested-by: Christoph Hellwig
Signed-off-by: Johannes Thumshirn
Reviewed-by: Christoph Hellwig
Cc: Christoph Hellwig
Cc: Keith Busch
Cc: Jens Axboe
Cc: linux-n...@lists.infradead
Add helpers to request and release a device's memory or I/O regions.
With these helpers in place, one does not need to select a device's memory or
I/O regions with pci_select_bars() prior to requesting or releasing them.
Suggested-by: Christoph Hellwig
Signed-off-by: Johannes Thumshirn
Reviewed
Now that we do have pci_request_mem_regions() and pci_release_mem_regions() at
hand, use it in the Intel ethernet drivers.
Suggested-by: Christoph Hellwig
Signed-off-by: Johannes Thumshirn
Cc: Jeff Kirsher
Cc: David S. Miller
Cc: net...@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: inte
On Wed 2016-06-01 21:33:24, dbaseh...@chromium.org wrote:
> From: Derek Basehore
>
> This patch set adds support for catching errors when entering freeze
> on Intel Skylake SoCs. Support for this can be added to newer SoCs in
> later patches.
>
> Verification is done by waking up the CPU once ev
Provide a small convenience wrapper that transmits
a set_tear_scanline command.
Cc: Archit Taneja
Cc: John Stultz
Cc: Thierry Reding
Cc: Sumit Semwal
Cc: Jani Nikula
Signed-off-by: Vinay Simha BN
--
v1:
* helper function suggested by Thierry
for set_tear_scanline
* Also includes sma
Now that we do have pci_request_mem_regions() and pci_release_mem_regions() at
hand, use it in the genwqe driver.
Suggested-by: Christoph Hellwig
Signed-off-by: Johannes Thumshirn
Cc: Frank Haverkamp
Cc: Greg Kroah-Hartman
---
drivers/misc/genwqe/card_base.c | 13 +
1 file changed
On 06/07/2016 06:37 AM, Taeung Song wrote:
On 06/07/2016 05:23 AM, Arnaldo Carvalho de Melo wrote:
Em Mon, Jun 06, 2016 at 07:52:53PM +0900, Taeung Song escreveu:
Because of die() at perf_parse_file() a config set was freed
in collect_config(), if failed.
But it is natural to free a config
Now that we do have pci_request_mem_regions() and pci_release_mem_regions() at
hand, use it in the lpfc driver.
Suggested-by: Christoph Hellwig
Signed-off-by: Johannes Thumshirn
Acked-by: Dick Kennedy
Cc: James Smart
Cc: Dick Kennedy
Cc: "James E.J. Bottomley"
Cc: "Martin K. Petersen"
Cc: l
On Mon, 06 Jun 2016, Boris Brezillon wrote:
> On Mon, 6 Jun 2016 16:32:31 +0100
> Lee Jones wrote:
>
> > On Fri, 29 Apr 2016, Boris Brezillon wrote:
> >
> > > Hi Lee,
> > >
> > > On Fri, 22 Apr 2016 11:18:04 +0100
> > > Lee Jones wrote:
> > >
> > > > The first part of this set extends the
Now that we do have pci_request_mem_regions() and pci_release_mem_regions() at
hand, use it in the ethernet drivers.
Suggested-by: Christoph Hellwig
Signed-off-by: Johannes Thumshirn
Cc: Jay Cliburn
Cc: Chris Snook
Cc: David S. Miller
Cc: net...@vger.kernel.org
Cc: linux-kernel@vger.kernel.or
On Tuesday 07 June 2016 12:08 PM, Laxman Dewangan wrote:
On Tuesday 07 June 2016 09:25 AM, Keerthy wrote:
On Monday 06 June 2016 05:14 PM, Laxman Dewangan wrote:
Maxim Semiconductor MAX77620 supports alarm interrupts when
its die temperature crosses 120C and 140C. These threshold
temperatu
Hi,
On Tuesday 07 June 2016 09:01 AM, Frank Wang wrote:
> Hi Heiko,
>
> On 2016/6/7 10:59, Frank Wang wrote:
>> Hi Heiko & Mark,
>>
>> On 2016/6/6 20:33, Heiko Stübner wrote:
>>> Am Montag, 6. Juni 2016, 12:27:54 schrieb Mark Rutland:
On Mon, Jun 06, 2016 at 05:20:03PM +0800, Frank Wang wrot
The first patch in this series introduces the following 4 helper functions to
the PCI core:
* pci_request_mem_regions()
* pci_request_io_regions()
* pci_release_mem_regions()
* pci_release_io_regions()
which encapsulate the request and release of a PCI device's memory or I/O
bars.
The subsequent
On 7.6.2016 04:43, Paul Gortmaker wrote:
> The Kconfig currently controlling compilation of this code is:
>
> config PINCTRL_ZYNQ
> bool "Pinctrl driver for Xilinx Zynq"
>
> ...meaning that it currently is not being built as a module by anyone.
>
> Lets remove the modular code that is es
On Mon, Jun 6, 2016 at 6:32 PM, Markus Heiser wrote:
> From: "Heiser, Markus"
>
> Hi Jonathan, Jani, all -
>
> I merged the work from sphkerneldoc POC [1], into branch (on v4.7-rc2)
>
> git://github.com/return42/linux.git linux-doc-reST
>
> The specification of the implementation is the (new)
> My own life in the Linux world is constant opposition.
>
> Every idea you bring to the table, gets shot down.
>
> You get no support for anything you want to do. If it doesn't agree with
> them, you've already lost.
I have encountered the same thing.
It is known as "design by committee" in oth
Hi! Below are my comments, all about coding style.
On Monday 06 June 2016 12:19:29 Mario Limonciello wrote:
> The RTL8153-AD supports a persistent system specific MAC address.
> This means a device plugged into two different systems with host side
> support will show different (but persistent) MAC
Hi Frank,
Am Dienstag, 7. Juni 2016, 11:31:59 schrieb Frank Wang:
> On 2016/6/7 10:59, Frank Wang wrote:
> > On 2016/6/6 20:33, Heiko Stübner wrote:
> >> Am Montag, 6. Juni 2016, 12:27:54 schrieb Mark Rutland:
> >>> On Mon, Jun 06, 2016 at 05:20:03PM +0800, Frank Wang wrote:
> Signed-off-by:
On Thu, 2 Jun 2016 18:11:03 -0700
Omar Sandoval wrote:
> From: Omar Sandoval
>
> You'd only ever want $comm as a string, but the default is still u64.
> Push the type parsing later so we can decide based on the actual
> fetcharg and make "string" the default for $comm.
Hmm, at this moment, I'
On Mon 2016-06-06 22:19:09, Chen Yu wrote:
> Stress test from Varun Koyyalagunta reports that, the
> nonboot CPU would hang occasionally, when resuming from
> hibernation. Further investigation shows that, the precise
> phase when nonboot CPU hangs, is the time when the nonboot
> CPU been woken up
On Fri, Jun 03, 2016 at 05:06:28PM -0700, Yinghai Lu wrote:
> This one is preparing patch for next one:
> PCI: Let pci_mmap_page_range() take resource addr
>
> We need to pass extra resource pointer to avoid searching that again
> for powerpc and microblaze prot set operation.
>
> Signed-off-by
On 07/06/16 09:49, Lothar Waßmann wrote:
> Hi,
>
> On Mon, 6 Jun 2016 15:02:21 +0300 Tomi Valkeinen wrote:
>> Hi,
>>
>> On 06/06/16 13:44, Lothar Waßmann wrote:
>>> 'brightness' is usually an index into a table of duty_cycle values,
>>> where the value at index 0 may well be non-zero
>>> (tegra30-
On Thu, 12 May 2016, Rhyland Klein wrote:
> When configuring FPS during probe, assuming a DT node is present for
> FPS, the code can run into a problem with the switch statements in
> max77620_config_fps() and max77620_get_fps_period_reg_value(). Namely,
> in the case of chip->chip_id == MAX77620,
From: Kefeng Wang
Use pr_fmt to prefix kernel output.
Signed-off-by: Kefeng Wang
---
drivers/of/of_numa.c | 19 ++-
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/drivers/of/of_numa.c b/drivers/of/of_numa.c
index ed7bd22..019738f 100644
--- a/drivers/of/of_numa.
At present, the distances must equal in both direction for each node
pairs. For example: the distance of node B->A must the same to A->B.
But we really don't have to do this.
End up fill default distances as below:
1. If both direction specified, keep no change.
2. If only one direction specified,
On Monday, June 6, 2016 9:28:54 PM CEST Tony Lindgren wrote:
> * Nishanth Menon [160601 15:51]:
> > On 06/01/2016 05:31 PM, Arnd Bergmann wrote:
> > > On Wednesday, June 1, 2016 4:31:54 PM CEST Nishanth Menon wrote:
> > >>
> > >> Hence the "KEYSTONE_TYPICAL" option is designed similar to commit
>
On 6 June 2016 at 21:05, Yuyang Du wrote:
> Hi Vincent,
>
> On Mon, Jun 06, 2016 at 02:32:39PM +0200, Vincent Guittot wrote:
>> > Unlike the switch to fair class case, if the task is on_rq, it will be
>> > enqueued after we move task groups, so the simplest solution is to reset
>> > the task's las
Update documentation. This limit is unneccessary.
Signed-off-by: Zhen Lei
---
Documentation/devicetree/bindings/numa.txt | 1 -
1 file changed, 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/numa.txt
b/Documentation/devicetree/bindings/numa.txt
index 21b3505..c0ea4a7 100644
--- a
On Mon, Jun 06, 2016 at 09:36:03PM -0700, Z Lim wrote:
> On Mon, Jun 6, 2016 at 10:05 AM, Will Deacon wrote:
> > On Sat, Jun 04, 2016 at 03:00:29PM -0700, Zi Shen Lim wrote:
> >> Remove superfluous stack frame, saving us 3 instructions for
> >> every JMP_CALL.
> >>
> >> Signed-off-by: Zi Shen Lim
On Mon, Jun 06, 2016 at 11:20:43PM +0200, Christoph Hellwig wrote:
> These have been added in NVMe 1.2 and we'll need at least oaes for the
> NVMe target driver.
>
> Reviewed-by: Sagi Grimberg
> Reviewed-by: Jay Freyensee
> Signed-off-by: Christoph Hellwig
> ---
> include/linux/nvme.h | 5
v3 -> v4:
1. Packed three patches of Kefeng Wang, patch6-8.
2. Add 6 new patches(9-15) to enhance the numa on arm64.
v2 -> v3:
1. Adjust patch2 and patch5 according to Matthias Brugger's advice, to make the
patches looks more well. The final code have no change.
v1 -> v2:
1. Base on https://l
1. Currently only cpu0 set on cpu_possible_mask and percpu areas have not
been initialized.
2. No reason to limit cpu0 must belongs to node0.
Signed-off-by: Zhen Lei
---
arch/arm64/mm/numa.c | 8
1 file changed, 8 deletions(-)
diff --git a/arch/arm64/mm/numa.c b/arch/arm64/mm/numa.c
This warning has been printed in of_numa_parse_cpu_nodes before.
Signed-off-by: Zhen Lei
---
drivers/of/of_numa.c | 9 ++---
1 file changed, 2 insertions(+), 7 deletions(-)
diff --git a/drivers/of/of_numa.c b/drivers/of/of_numa.c
index 7b3fbdc..3157130 100644
--- a/drivers/of/of_numa.c
+++
This information will be printed in the subfunction numa_add_memblk.
They are not the same, but very similar.
Signed-off-by: Zhen Lei
---
drivers/of/of_numa.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/of/of_numa.c b/drivers/of/of_numa.c
index ed5a097..fb71b4e 100644
--- a/dr
Some numa nodes may have no memory. For example:
1. cpu0 on node0
2. cpu1 on node1
3. device0 access the momory from node0 and node1 take the same time.
So, we can not simply classify device0 to node0 or node1, but we can
define a node2 which distances to node0 and node1 are the same.
Signed-off-
Hi Lee,
On Fri, 22 Apr 2016, Lee Jones wrote:
> ST's PWM IP is supplied by 2 different clocks. One for PWM
> Output and the other for Capture. This patch provides clock
> handling for the latter.
>
> Signed-off-by: Lee Jones
> ---
> drivers/pwm/pwm-sti.c | 25 +
> 1 f
On Monday, June 6, 2016 7:28:22 PM CEST Bjorn Helgaas wrote:
> The caller is performing one abstract operation: reading or writing
> config space of a PCI device. In the caller's context, it makes no
> difference whether it's a type0 or type1 access.
>
> Moving the test from the host bridge drive
From: Kefeng Wang
Use pr_fmt to prefix kernel output, and remove duplicated msg
of NUMA turned off.
Signed-off-by: Kefeng Wang
---
arch/arm64/mm/numa.c | 42 +-
1 file changed, 21 insertions(+), 21 deletions(-)
diff --git a/arch/arm64/mm/numa.c b/arch/a
Use the same tactic to cpu and numa-distance nodes.
Signed-off-by: Zhen Lei
---
arch/arm64/mm/numa.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/mm/numa.c b/arch/arm64/mm/numa.c
index c7fe3ec..2601660 100644
--- a/arch/arm64/mm/numa.c
+++ b/arch/arm64/mm/numa.c
@@ -141,6
For a normal memory@ devicetree node, its reg property can contains more
memory blocks.
Because we don't known how many memory blocks maybe contained, so we try
from index=0, increase 1 until error returned(the end).
Signed-off-by: Zhen Lei
---
drivers/of/of_numa.c | 29 ++--
To make each percpu area allocated from its local numa node. Without this
patch, all percpu areas will be allocated from the node which cpu0 belongs
to.
Signed-off-by: Zhen Lei
---
arch/arm64/Kconfig | 8
arch/arm64/mm/numa.c | 56
Hi Lee,
On Fri, 22 Apr 2016, Lee Jones wrote:
> Here we're requesting the PWM Capture IRQ and supplying the
> handler which will be called in the event of an IRQ fire to
> handle it.
>
> Signed-off-by: Lee Jones
> ---
> drivers/pwm/pwm-sti.c | 92
>
numa_init(of_numa_init) may returned error because of numa configuration
error. So "No NUMA configuration found" is inaccurate. In fact, specific
configuration error information should be immediately printed by the
testing branch.
Signed-off-by: Zhen Lei
---
arch/arm64/mm/numa.c | 6 +++---
1 fi
1. MAX_NUMNODES is base on CONFIG_NODES_SHIFT, the default value of the
latter is very small now.
2. Suppose the default value of MAX_NUMNODES is enlarged to 64, so the
size of numa_distance is 4K, it's still acceptable if run the Image
on other processors.
3. It will make function __node_
From: Kefeng Wang
Use of_get_next_parent() instead of open-code.
Signed-off-by: Kefeng Wang
---
drivers/of/of_numa.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/drivers/of/of_numa.c b/drivers/of/of_numa.c
index 3157130..ed7bd22 100644
--- a/drivers/of/of_numa.c
+++
Use mem-to-mem DMA to read from flash when reading in mmap mode. This
gives improved read performance and reduces CPU load.
With this patch the raw-read throughput is ~16MB/s on DRA74 EVM. And CPU
load is <20%. UBIFS read ~13 MB/s.
Signed-off-by: Vignesh R
---
v3: Cleanup code based on review c
This series adds support for DMA during QSPI flash read using memory
mapped mode.
Tested on DRA74 EVM, DRA72 EVM and AM437x SK on linux-next.
v2: https://lkml.org/lkml/2016/4/25/187
v1: https://lkml.org/lkml/2016/4/4/855
Vignesh R (2):
spi: Add DMA support for spi_flash_read()
spi: spi-ti-
Few SPI devices provide accelerated read interfaces to read from
SPI-NOR flash devices. These hardwares also support DMA to transfer data
from flash to memory either via mem-to-mem DMA or dedicated slave DMA
channels. Hence, add support for DMA in order to improve throughput and
reduce CPU load.
Us
The driver limits the physical number of paRAM slots to be used by channels.
If the transfer needs more slots (more SGs) then the transfer is broken up
to smaller chunks. When the chunk is finished the driver will rewrite the
physical slots and continues the transfer. This set up time can take some
On Wed, Jun 01, 2016 at 11:23:53AM -0700, Tim Chen wrote:
> On Wed, 2016-06-01 at 16:12 +0900, Minchan Kim wrote:
> >
> > Hi Tim,
> >
> > To me, this reorganization is too limited and not good for me,
> > frankly speaking. It works for only your goal which allocate batch
> > swap slot, I guess. :
Hi Kishon & Heiko,
On 2016/6/7 15:45, Kishon Vijay Abraham I wrote:
Hi,
On Tuesday 07 June 2016 09:01 AM, Frank Wang wrote:
Hi Heiko,
On 2016/6/7 10:59, Frank Wang wrote:
Hi Heiko & Mark,
On 2016/6/6 20:33, Heiko Stübner wrote:
Am Montag, 6. Juni 2016, 12:27:54 schrieb Mark Rutland:
On Mo
On Mon, Jun 06, 2016 at 03:35:35PM +0200, Oliver Neukum wrote:
> On Mon, 2016-06-06 at 16:28 +0300, Heikki Krogerus wrote:
>
> > I would prefer lower case letters. I don't know the SIDs there are at
> > them moment, other then Display Port. Do you know them?
> >
> > I don't think we can ever guar
On Mon, Jun 06, 2016 at 07:41:28AM -0700, Greg KH wrote:
> On Mon, Jun 06, 2016 at 04:45:09PM +0300, Heikki Krogerus wrote:
> > > For consistency, should this be either type-c/type-c.c or
> > > typec/typec.c?
> >
> > For some reason I like to have the dash in the folder name, but I
> > don't like
On Tue, Jun 7, 2016 at 1:38 PM, Zhen Lei wrote:
> 1. Currently only cpu0 set on cpu_possible_mask and percpu areas have not
>been initialized.
> 2. No reason to limit cpu0 must belongs to node0.
even smp init assumes cpu0/boot processor.
is this patch tested on any hardware?
can you describe
Hi Lee,
On Fri, 22 Apr 2016, Lee Jones wrote:
> Each PWM Capture device is allocated a structure to hold its own
> state. During a capture the device may be partaking in one of 3
> phases. Initial (rising) phase change, a subsequent (falling)
> phase change indicating end of the duty-cycle phas
Now on ARM64 platform, it will set 'dummy_dma_ops' for device dma_ops if
it did not call 'arch_setup_dma_ops' at device creation time by issuing
platform_device_alloc() function, that will cause failure when setting
the dma mask for device.
Hence We need to hook the archdata to setup proper dma_op
Hello
On 6/7/2016 5:01 AM, th...@altera.com wrote:
From: Tien Hock Loh
This adds support for TSE PCS that uses SGMII adapter when the phy-mode of
the dwmac is set to sgmii
Signed-off-by: Tien Hock Loh
---
v2:
- Refactored the TSE PCS out from the dwmac-socfpga.c file
- Added binding documen
On Tue, Jun 7, 2016 at 1:38 PM, Zhen Lei wrote:
> Some numa nodes may have no memory. For example:
> 1. cpu0 on node0
> 2. cpu1 on node1
> 3. device0 access the momory from node0 and node1 take the same time.
i am wondering, if access to both nodes is same, then why you need numa.
the example you
From: Wanpeng Li
Commit e9532e69b8d1 ("sched/cputime: Fix steal time accounting vs. CPU
hotplug")
set rq->prev_* to 0 after a cpu hotplug comes back in order to fix the scenario:
| steal is smaller than rq->prev_steal_time we end up with an insane large
| value which then gets added to rq->pre
From: Wanpeng Li
I observed that sometimes st is 100% instantaneous, then idle is 100%
even if there is a cpu hog on the guest cpu after the cpu hotplug comes
back(N.B. this can not always be readily reproduced). I add trace to
capture it as below:
cpuhp/1-12[001] d.h1 167.461657: accou
From: Wanpeng Li
This patch adds guest steal-time support to full dynticks CPU
time accounting. After the following commit:
ff9a9b4c4334 ("sched, time: Switch VIRT_CPU_ACCOUNTING_GEN to jiffy
granularity")
... time sampling became jiffy based, even if it's still listened
to ring boundaries, so
From: Vikram Mulukutla
Some low memory systems with complex peripherals cannot afford to
have the relatively large firmware images taking up valuable
memory during suspend and resume. Change the internal
implementation of firmware_class to disallow caching based on a
configurable option. In the n
We use similar structured code to read and write the kmapped
firmware pages. The only difference is read copies from the kmap
region and write copies to it. Consolidate this into one function
to reduce duplication.
Cc: Vikram Mulukutla
Signed-off-by: Stephen Boyd
---
drivers/base/firmware_class
Some systems are memory constrained but they need to load very
large firmwares. The firmware subsystem allows drivers to request
this firmware be loaded from the filesystem, but this requires
that the entire firmware be loaded into kernel memory first
before it's provided to the driver. This can le
On 31/05/16 21:04, Aneesh Kumar K.V wrote:
> We don't need to check this always. The idea here is to capture the
> wrong usage of find_linux_pte_or_hugepte and we can do that by
> occasionally running with DEBUG_VM enabled.
>
> Signed-off-by: Aneesh Kumar K.V
> ---
> arch/powerpc/include/asm/p
On Mon, 06 Jun 2016, Lee Jones wrote:
> On the STiH410 B2120 development board the ports on the Generic PHY
> share their reset lines with each other. New functionality in the
> reset subsystems forces consumers to be explicit when requesting
> shared/exclusive reset lines.
>
> Signed-off-by: Le
Hi Pavel,
On 2016年06月07日 16:03, Pavel Machek wrote:
On Mon 2016-06-06 22:19:09, Chen Yu wrote:
Stress test from Varun Koyyalagunta reports that, the
nonboot CPU would hang occasionally, when resuming from
hibernation. Further investigation shows that, the precise
phase when nonboot CPU hangs, i
On Mon, 06 Jun 2016, Lee Jones wrote:
> On the STiH410 B2120 development board the MiPHY28lp shares its reset
> line with the Synopsys DWC3 SuperSpeed (SS) USB 3.0 Dual-Role-Device
> (DRD). New functionality in the reset subsystems forces consumers to
> be explicit when requesting shared/exclusiv
Servus,
while working on an improved TLB flush logic for s390 I noticed that
for s390 cpumask_equal() alias bitmap_equal() can be improved for the
special case "(nbits % BITS_PER_LONG) == 0". The memcmp function can
be used in this case and we have an instruction for that ..
Trouble is that the d
On Mon, 06 Jun 2016, Lee Jones wrote:
> On the STiH410 B2120 development board the ST EHCI IP shares its reset
> line with the OHCI IP. New functionality in the reset subsystems forces
> consumers to be explicit when requesting shared/exclusive reset lines.
>
> Signed-off-by: Lee Jones
> ---
>
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