Auto-detection functions are passed a busw parameter to retrieve the actual
NAND bus width and eventually set the correct value in chip->options.
Rework the nand_get_flash_type() function to get rid of this extra
parameter and let detection code directly set the NAND_BUSWIDTH_16 flag in
Am 06.01.2017 um 01:36 schrieb James Bottomley:
On Thu, 2017-01-05 at 16:50 -0700, Jason Gunthorpe wrote:
On Thu, Jan 05, 2017 at 02:58:46PM -0800, James Bottomley wrote:
On Thu, 2017-01-05 at 15:21 -0700, Jason Gunthorpe wrote:
On Thu, Jan 05, 2017 at 11:55:49AM -0800, James Bottomley wrote:
On Thu, Jan 5, 2017 at 11:49 PM, David Lechner wrote:
> Hi Sekhar,
>
> On 11/21/2016 10:59 AM, Axel Haslam wrote:
>>
>> Add the usb1 device node for the da850 soc.
>> This will allow boards to use the usb1 port
>> when booting through DT.
>>
>> Signed-off-by: Axel Haslam
Hi Stephen,
[auto build test WARNING on net-next/master]
url:
https://github.com/0day-ci/linux/commits/Stephen-Hemminger/net-make-ndo_get_stats64-a-void-function/20170106-160123
config: xtensa-allmodconfig (attached as .config)
compiler: xtensa-linux-gcc (GCC) 4.9.0
reproduce:
wget
On Thu 05-01-17 13:30:10, Khalid Aziz wrote:
[...]
> It is very tempting to restrict tags to PAGE_SIZE granularity since it makes
> code noticeably simpler and that is indeed going to be the majority of
> cases. Sooner or later somebody would want to use multiple tags per page
> though.
I didn't
Hi Bharat
On 06/01/2017 09:50, Bharat Bhushan wrote:
> Hi Eric,
>
>> -Original Message-
>> From: Eric Auger [mailto:eric.au...@redhat.com]
>> Sent: Friday, January 06, 2017 12:35 AM
>> To: eric.au...@redhat.com; eric.auger@gmail.com;
>> christoffer.d...@linaro.org;
On 06/01/17 09:08, Auger Eric wrote:
> Hi Bharat
>
> On 06/01/2017 09:50, Bharat Bhushan wrote:
>> Hi Eric,
>>
>>> -Original Message-
>>> From: Eric Auger [mailto:eric.au...@redhat.com]
>>> Sent: Friday, January 06, 2017 12:35 AM
>>> To: eric.au...@redhat.com; eric.auger@gmail.com;
This patch adds header with values used for ZTE 2967
SoC's power domain driver.
Signed-off-by: Baoyou Xie
---
include/dt-bindings/soc/zte,pm_domains.h | 24
1 file changed, 24 insertions(+)
create mode 100644
This patch introduces the power domain driver of zx296718
which belongs to zte's zx2967 family.
Signed-off-by: Baoyou Xie
Reviewed-by: Jun Nie
---
drivers/soc/zte/Makefile | 1 +
drivers/soc/zte/zx296718_pm_domains.c | 182
Add the ZTE SoC drivers as maintained by ARM ZTE
architecture maintainers, as they're parts of the core IP.
By the way, this patch adds the maintainer for ARM
ZTE architecture to Baoyou Xie.
Signed-off-by: Baoyou Xie
---
MAINTAINERS | 4
1 file changed, 4
The ARMv8 zx2967 family (296718, 296716 etc) uses different value
for controlling the power domain on/off registers, Choose the
value depending on the compatible.
Multiple domains are prepared for the family, this patch prepares
the common functions.
Signed-off-by: Baoyou Xie
Hello Mark and Vladimir
On 01/05/2017 09:58 AM, Mark Brown wrote:
On Thu, Jan 05, 2017 at 03:10:15PM +0900, Jiada Wang wrote:
Previously watermark level is configured to fifosize/2,
DMA mode can be used only when transfer length can be divided
by 'watermark level * bpw', which makes DMA mode
On Thu, Jan 05, 2017 at 02:48:22PM +, Lee Jones wrote:
> On Thu, 05 Jan 2017, Charles Keepax wrote:
>
> > On Thu, Jan 05, 2017 at 08:07:01AM +, Lee Jones wrote:
> > > On Wed, 04 Jan 2017, Charles Keepax wrote:
> > >
> > > > arizona_poll_reg essentially hard-codes
This patch adds device tree bindings document for ZTE zx2967
family power domain controller.
Signed-off-by: Baoyou Xie
---
.../devicetree/bindings/soc/zte/pd-2967xx.txt | 19 +++
1 file changed, 19 insertions(+)
create mode 100644
Hello,
Hopefully the last round for this series. I'll wait a week for
reviewers to comment, and if there's no objection, I'll apply it.
This patch series is a step forward in supporting vendor-specific
functionalities.
This series is mainly moving vendor-specific initialization or
detection code
(1) The HiSilicon Flash Memory Controller(FMC) is a multi-functions
device which supports SPI Nor flash controller, SPI nand Flash
controller and parallel nand flash controller. So when we are prepare
to operation SPI Nor, we should make sure the flash type is SPI Nor.
(2) Make sure the boot
> -Original Message-
> From: Marc Zyngier [mailto:marc.zyng...@arm.com]
> Sent: Friday, January 06, 2017 2:50 PM
> To: Auger Eric ; Bharat Bhushan
> ; eric.auger@gmail.com;
> christoffer.d...@linaro.org; robin.mur...@arm.com;
>
Hi
I am setting up a lab where the SCTP traffics from client is passing
through a linux router before reaching to the SCTP server running
LKSCTP.
The linux router did not change the source address of the client, so
when it arrived to the SCTP server, the source address is the oriingal
one.
On 01/05/17 at 09:52pm, Borislav Petkov wrote:
> On Thu, Jan 05, 2017 at 11:35:57AM -0800, Kees Cook wrote:
> > The only reason I had it as an option was for kernel module space. It
> > wasn't clear to me at the time if enough space remained for modules in
> > all use-cases. It seems like probably
Hi,
Fixes them by adding the tracking logic (in the previous patch) for
these funcs above, ocfs2_permission(), ocfs2_iop_[set|get]_acl(),
ocfs2_setattr().
As described cases above, shall we just add the tracking logic only for
set/get_acl()?
The idea is to detect recursive locking on the
On Thu, Jan 05, 2017 at 03:14:29PM -0800, Kees Cook wrote:
> From: John Dias
>
> When moving a group_leader perf event from a software-context to
> a hardware-context, there's a race in checking and updating that
> context. The existing locking solution doesn't work; note
Hi,
On 01/06/2017 12:48 PM, Bjorn Andersson wrote:
On Tue 20 Dec 09:03 PST 2016, Vivek Gautam wrote:
diff --git a/drivers/phy/phy-qcom-qmp.c b/drivers/phy/phy-qcom-qmp.c
[..]
+static int qcom_qmp_phy_poweron(struct phy *phy)
[..]
+
+err3:
Rather than naming your labels errX, it's
After the last four patches, all exported headers are under uapi/, thus
input-files2 are not needed anymore.
The side effect is that input-files1-name is exactly header-y.
Note also that unput-files3-name is genhdr-y.
Signed-off-by: Nicolas Dichtel
---
Here is the v2 of this series. The first 5 patches are just cleanup: some
exported headers were still under a non-uapi directory.
The patch 6 was spotted by code review: there is no in-tree user of this
functionality.
The last patch remove the use of header-y. Now all files under an uapi
This header file is exported, thus move it to uapi.
Signed-off-by: Nicolas Dichtel
---
arch/h8300/include/asm/bitsperlong.h | 10 +-
arch/h8300/include/uapi/asm/bitsperlong.h | 14 ++
2 files changed, 15 insertions(+), 9 deletions(-)
create
This header file is exported, thus move it to uapi.
Signed-off-by: Nicolas Dichtel
---
arch/x86/include/asm/msr-index.h | 694 +
arch/x86/include/uapi/asm/msr-index.h | 698 ++
2 files changed, 699
Hi
On 6 January 2017 at 00:01, Laura Abbott wrote:
> Hi,
>
> This is v2 of the series to make sanity_check_meminfo (renamed in this series)
> more readable and less error prone and fix an existing bug. v1 failed in that
> it
> re-introduced a previously fixed bug. Hopefully
This header file is exported, thus move it to uapi.
Signed-off-by: Nicolas Dichtel
---
arch/nios2/include/asm/setup.h | 2 +-
arch/nios2/include/uapi/asm/setup.h | 6 ++
2 files changed, 7 insertions(+), 1 deletion(-)
create mode 100644
This option was added in commit c7bb349e7c25 ("kbuild: introduce destination-y
for exported headers") but never used in-tree.
Signed-off-by: Nicolas Dichtel
---
Documentation/kbuild/makefiles.txt | 23 ---
scripts/Makefile.headersinst | 2 +-
This header file is exported, thus move it to uapi.
Signed-off-by: Nicolas Dichtel
---
arch/arm/include/asm/types.h | 36 +--
arch/arm/include/uapi/asm/types.h | 40 +++
2 files changed, 41
On Thu, 05 Jan 2017, Bjorn Andersson wrote:
> On Wed 04 Jan 23:49 PST 2017, Lee Jones wrote:
>
> > On Wed, 04 Jan 2017, Bjorn Andersson wrote:
> >
> > > On Wed 04 Jan 03:54 PST 2017, Lee Jones wrote:
> > >
> > > > On Mon, 26 Dec 2016, Bjorn Andersson wrote:
> > > >
> > > > > From: Bjorn
Hi Tom,
I am currently looking at kmalloc with vmalloc fallback users [1]
and came across alloc_ila_locks which is using a pretty unusual
allocation pattern - it seems to be a c alloc_bucket_locks which
is doing a similar thing - except it has to support GFP_ATOMIC.
I am really wondering what is
MTD_NAND_IDS is selected by MTD_NAND, which makes it useless. Remove the
Kconfig option and link nand_ids.o into the nand.o object file.
Doing that also prevents adding an extra nand_ids.ko module when MTD_NAND
is activated as a module.
Signed-off-by: Boris Brezillon
On 17/1/6 17:13, Eric Ren wrote:
Hi,
Fixes them by adding the tracking logic (in the previous patch) for
these funcs above, ocfs2_permission(), ocfs2_iop_[set|get]_acl(),
ocfs2_setattr().
As described cases above, shall we just add the tracking logic
only for set/get_acl()?
The idea is to
On 17/1/6 16:21, Eric Ren wrote:
On 01/06/2017 03:14 PM, Joseph Qi wrote:
On 17/1/6 14:56, Eric Ren wrote:
On 01/06/2017 02:09 PM, Joseph Qi wrote:
Hi Eric,
On 17/1/5 23:31, Eric Ren wrote:
Commit 743b5f1434f5 ("ocfs2: take inode lock in
ocfs2_iop_set/get_acl()")
results in a
On 2017년 01월 06일 17:50, Krzysztof Kozlowski wrote:
> On Fri, Jan 06, 2017 at 04:20:52PM +0900, Chanwoo Choi wrote:
>> On 2017년 01월 06일 16:05, Krzysztof Kozlowski wrote:
>>> On Fri, Jan 06, 2017 at 12:59:05PM +0900, Jaechul Lee wrote:
From: Chanwoo Choi
This
Hi,
On 06/01/2017 at 14:59:45 +0800, Wenyou Yang wrote :
> For the SoCs such as SAMA5D2 and SAMA5D4 which have L2 cache,
> flush the L2 cache first before entering the cpu idle.
>
> Signed-off-by: Wenyou Yang
> ---
>
> arch/arm/mach-at91/pm.c | 19
On Fri, Jan 06, 2017 at 06:06:43PM +0900, Chanwoo Choi wrote:
> On 2017년 01월 06일 17:50, Krzysztof Kozlowski wrote:
> > On Fri, Jan 06, 2017 at 04:20:52PM +0900, Chanwoo Choi wrote:
> >> On 2017년 01월 06일 16:05, Krzysztof Kozlowski wrote:
> >>> On Fri, Jan 06, 2017 at 12:59:05PM +0900, Jaechul Lee
Store the NAND ID in struct nand_chip to avoid passing id_data and id_len
as function parameters.
Signed-off-by: Boris Brezillon
Reviewed-by: Marek Vasut
---
drivers/mtd/nand/nand_base.c | 55
On 06-01-17, 14:16, Rajendra Nayak wrote:
>
> On 12/12/2016 04:26 PM, Viresh Kumar wrote:
> > Some platforms have the capability to configure the performance state of
> > their Power Domains. The performance levels are represented by positive
> > integer values, a lower value represents lower
Hi Krzysztof,
> > > > .../boot/dts/exynos/exynos5433-tm2-common.dtsi | 1118
> > > > +++
> > > > arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 1153
> > > > +---
> > >
> > > Like talking to a wall. Without any feedback. If my instructions were
> > >
>> I narrowed it down to commit 6e9b5e76882c ("hwrng: geode - Migrate to
>> managed API") which seems to introduce this. It looks to me like some issue
>> between devres, the Geode hwrng and AES drivers which both use the same PCI
>> device.
>
> It does
>
>> I'm no expert here, but I curious if
Add the usb1 device node for the da850 soc.
This will allow boards to use the usb1 port
when booting through DT.
Signed-off-by: Axel Haslam
---
arch/arm/boot/dts/da850.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/da850.dtsi
Enable the usb1 controller (ohci) and phy for the lcdk board
Signed-off-by: Axel Haslam
---
arch/arm/boot/dts/da850-lcdk.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/da850-lcdk.dts b/arch/arm/boot/dts/da850-lcdk.dts
index 03f9bfd..94f6ea9
This adds the DT node for the ohci controller and
enables it for the omapl138-lckd platform.
Changes v1 -> v2
* remove usb-phy node as it was added in merged patches for usb0 (musb)
* remove dependency on regulator patches as these are not needed for
the lcdk board.
* remove dependency on
On 06/01/17 04:27, Bharat Bhushan wrote:
> Hi Mark,
>
>> -Original Message-
>> From: Auger Eric [mailto:eric.au...@redhat.com]
>> Sent: Thursday, January 05, 2017 5:39 PM
>> To: Marc Zyngier ; eric.auger@gmail.com;
>> christoffer.d...@linaro.org;
Regularly, when a new header is created in include/uapi/, the developer
forgets to add it in the corresponding Kbuild file. This error is usually
detected after the release is out.
In fact, all headers under uapi directories should be exported, thus it's
useless to have an exhaustive list.
After
On Thu, Jan 05, 2017 at 01:37:22PM -0500, Sinan Kaya wrote:
> On 1/5/2017 1:29 PM, Lorenzo Pieralisi wrote:
> > iort_node_get_id() takes an index as input to refer to a specific
> > mapping entry in the mapping array to retrieve the id at a specific
> > index provided the index is below the total
2016-12-27 21:57 GMT+08:00 Dmitry Vyukov :
> Hello,
>
> The following program triggers use-after-free in complete_emulated_mmio:
> https://gist.githubusercontent.com/dvyukov/79c7ee10f568b0d5c33788534bb6edc9/raw/2c2d4ce0fe86398ed81e65281e8c215c7c3632fb/gistfile1.txt
>
> BUG:
On 01/06/2017 11:40 AM, Michal Hocko wrote:
> On Fri 06-01-17 09:18:05, Vlastimil Babka wrote:
>> Since commit 682a3385e773 ("mm, page_alloc: inline the fast path of the
>> zonelist iterator") we replace a NULL nodemask with
>> cpuset_current_mems_allowed
>> in the fast path, so that
On Fri, Jan 06, 2017 at 12:14:13AM +, Junichi Nomura wrote:
> Personally I have same opinion as yours. :)
>
> But according to Documentation/process/coding-style.rst, it seems
> "sizeof(*p)" is preferred style and the reason there makes some
> sense.
>
> Quote from coding-style.rst:
> >
Address compilation issues on arm64:
samples/seccomp/bpf-fancy.c:13:27: error: linux/seccomp.h: No such file or
directory
samples/seccomp/bpf-fancy.c: In function 'main':
samples/seccomp/bpf-fancy.c:36: error: invalid use of undefined type 'struct
seccomp_data'
samples/seccomp/bpf-fancy.c:37:
Move Micron specific initialization logic into nand_micron.c. This is
part of the "separate vendor specific code from core" cleanup process.
Signed-off-by: Boris Brezillon
---
drivers/mtd/nand/Makefile | 1 +
drivers/mtd/nand/nand_base.c | 32
Commit-ID: 12bf98b91f7aa8a9a526309aba645ccdcc470cab
Gitweb: http://git.kernel.org/tip/12bf98b91f7aa8a9a526309aba645ccdcc470cab
Author: Dou Liyang
AuthorDate: Thu, 5 Jan 2017 17:54:43 +0800
Committer: Ingo Molnar
CommitDate: Fri, 6 Jan 2017
Commit-ID: ecc7ea5dd1409d4e6dfba2f0ff0ee1c6ccd855bd
Gitweb: http://git.kernel.org/tip/ecc7ea5dd1409d4e6dfba2f0ff0ee1c6ccd855bd
Author: Andy Shevchenko
AuthorDate: Thu, 5 Jan 2017 18:17:17 +0200
Committer: Ingo Molnar
CommitDate: Fri,
Commit-ID: 4b5b61eaf8b70838750a1e6dc80ecd044c8f4b3f
Gitweb: http://git.kernel.org/tip/4b5b61eaf8b70838750a1e6dc80ecd044c8f4b3f
Author: Andy Shevchenko
AuthorDate: Thu, 5 Jan 2017 15:02:34 +0200
Committer: Ingo Molnar
CommitDate: Fri,
On Thu, Jan 05, 2017 at 07:04:36PM +, Eric Auger wrote:
> +static void intel_iommu_get_resv_regions(struct device *device,
> + struct list_head *head)
> +{
> + struct iommu_resv_region *reg;
> +
> + reg = iommu_alloc_resv_region(IOAPIC_RANGE_START,
Hi guys,
On Thu, Jan 05, 2017 at 05:54:02PM +0200, Mika Westerberg wrote:
> > +static ssize_t
> > +typec_altmode_roles_show(struct device *dev, struct device_attribute *attr,
> > +char *buf)
> > +{
> > + struct typec_mode *mode = container_of(attr, struct typec_mode,
> > +
Commit-ID: a33d331761bc5dd330499ca5ceceb67f0640a8e6
Gitweb: http://git.kernel.org/tip/a33d331761bc5dd330499ca5ceceb67f0640a8e6
Author: Borislav Petkov
AuthorDate: Thu, 5 Jan 2017 10:26:38 +0100
Committer: Ingo Molnar
CommitDate: Fri, 6 Jan 2017 08:37:41
On Thu, Jan 05, 2017 at 07:04:29PM +, Eric Auger wrote:
> struct iommu_dma_cookie {
> - struct iova_domain iovad;
> - struct list_headmsi_page_list;
> - spinlock_t msi_lock;
> + union {
> + struct iova_domain iovad;
> +
Commit-ID: 1e620f9b23e598ab936ece12233e98e97930b692
Gitweb: http://git.kernel.org/tip/1e620f9b23e598ab936ece12233e98e97930b692
Author: Boris Ostrovsky
AuthorDate: Thu, 8 Dec 2016 11:44:31 -0500
Committer: Ingo Molnar
CommitDate: Fri, 6 Jan
On Thu, Jan 05, 2017 at 07:04:28PM +, Eric Auger wrote:
> iommu/dma: Allow MSI-only cookies
> iommu: Rename iommu_dm_regions into iommu_resv_regions
> iommu: Add a new type field in iommu_resv_region
> iommu: iommu_alloc_resv_region
> iommu: Only map direct mapped regions
> iommu:
On Mon, Jan 02, 2017 at 06:42:36PM +0530, Sricharan R wrote:
> From: Mitchel Humpherys
>
> Add the IOMMU_PRIV attribute, which is used to indicate privileged
> mappings.
>
> Reviewed-by: Robin Murphy
> Tested-by: Robin Murphy
On Wednesday, January 4, 2017 6:29:39 PM CET Nikita Yushchenko wrote:
> > Just a guess, but if the inbound translation windows in the host
> > bridge are wider than 32-bit, the reason for setting up a single
> > 32-bit window is probably because that is what the parent bus supports.
>
> Well
On 06-01-17, 16:06, Rajendra Nayak wrote:
> No, I am thoroughly confused :)
> I was struggling with 2 powerdomains and now there are way too many of them :P
For the record, we had some offline chat and his case is pretty much
taken care of by the proposed bindings. Though he will look in more
On 05/01/17 18:06, Catalin Marinas wrote:
On Wed, Jan 04, 2017 at 05:49:05PM +, Suzuki K. Poulose wrote:
Track the user visible fields of a CPU feature register. This will be
used for exposing the value to the userspace. All the user visible
fields of a feature register will be passed on as
On Friday, January 6, 2017 12:29:12 PM CET Raviteja Garimella wrote:
> Hi Arnd,
>
> On Fri, Jan 6, 2017 at 3:33 AM, Arnd Bergmann wrote:
> > On Thursday, January 5, 2017 1:53:16 PM CET Raviteja Garimella wrote:
> >> The UDC is based on Synopsys Designware core USB (2.0) Device
From: Hans de Goede
On some nand controllers with hw-ecc the controller code wants to know
the ecc strength and size and having these as 0, 0 is not accepted.
Specifying these in devicetree is possible but undesirable as the nand
may be different in different production
Currently tm2e dts includes tm2 but there are some differences
between the two boards and tm2 has some properties that tm2e
doesn't have.
That's why it's important to keep the two dts files independent
and put all the commonalities in a tm2-common.dtsi file.
At the current status the only two
Move Macronix specific initialization into nand_macronix.c. This is part
of the "separate vendor specific code from core" cleanup process.
Signed-off-by: Boris Brezillon
---
drivers/mtd/nand/Makefile| 1 +
drivers/mtd/nand/nand_base.c | 11
Hi Joerg,
On 06/01/2017 12:00, Joerg Roedel wrote:
> On Thu, Jan 05, 2017 at 07:04:35PM +, Eric Auger wrote:
>> +list_for_each_entry_safe(region, next, _resv_regions, list) {
>> +str += sprintf(str, "0x%016llx 0x%016llx\n",
>> + (long long
On Fri, 2017-01-06 at 09:55 +0100, Michal Hocko wrote:
> On Fri 06-01-17 09:13:23, Mike Galbraith wrote:
> > radix-tree: Partially disable memcg accounting in radix_tree_node_alloc()
> >
> > Having no preload, which turns accounting off for non-rt kernels, trying to
> > allocate coming from
Commit-ID: a01b3391b542aaaed539f9d9d6d0d4d6502ab9c6
Gitweb: http://git.kernel.org/tip/a01b3391b542aaaed539f9d9d6d0d4d6502ab9c6
Author: Andy Shevchenko
AuthorDate: Thu, 5 Jan 2017 15:02:35 +0200
Committer: Ingo Molnar
CommitDate: Fri,
On Thu, Jan 05, 2017 at 07:04:35PM +, Eric Auger wrote:
> + list_for_each_entry_safe(region, next, _resv_regions, list) {
> + str += sprintf(str, "0x%016llx 0x%016llx\n",
> +(long long int)region->start,
> +(long long
Move Toshiba specific initialization and detection logic into
nand_toshiba.c. This is part of the "separate vendor specific code from
core" cleanup process.
Signed-off-by: Boris Brezillon
---
drivers/mtd/nand/Makefile | 1 +
On Thu, Jan 05, 2017 at 05:26:17PM -0800, Raj, Ashok wrote:
> Agree, since we have both a log and another agent to deal with it, it makes
> no good reason to continue... Will pass this along, and have someone look at
> cleaning this up.
Like this?
---
From: Borislav Petkov
Date:
On Thursday, December 22, 2016 4:15:57 PM CET Ming Lei wrote:
> ERROR: "inb" [drivers/watchdog/wdt_pci.ko] undefined!
> ERROR: "outb" [drivers/watchdog/wdt_pci.ko] undefined!
> ERROR: "outb" [drivers/watchdog/pcwd_pci.ko] undefined!
> ERROR: "inb" [drivers/watchdog/pcwd_pci.ko] undefined!
> ERROR:
From: Jaechul Lee
This patch adds support for the TM2 touch key and led
functionality.
The driver interfaces with userspace through an input device and
reports KEY_PHONE and KEY_BACK event types. LED brightness can be
controlled by
On Fri, Jan 06, 2017 at 11:11:36AM +0100, Jerome Brunet wrote:
> The purpose of this patch is to provide a way to mark as broken a
> particular eee mode. At first, it had nothing to do with "set_eee" but,
> as Florian rightly pointed out, users shouldn't be able to re-enable a
> broken mode.
I
Hi,
On Fri, Jan 06, 2017 at 05:34:47PM +0800, Sun Paul wrote:
> Hi
>
> I am setting up a lab where the SCTP traffics from client is passing
> through a linux router before reaching to the SCTP server running
> LKSCTP.
>
> The linux router did not change the source address of the client, so
>
Hi,
I'll send this patch on behalf of Jaechul Lee
becasue it's I don't want to block
anyone who wants to make changes to the exynos5433-tm2*dts*
files.
This patches are based on Krzysztof's branch for-next [1]
"This patchset adds support for the tm2 touchkey device.
From: Jaechul Lee
This patch adds the binding description of the tm2 touchkey
device driver.
Signed-off-by: Jaechul Lee
Reviewed-by: Javier Martinez Canillas
Reviewed-by: Andi Shyti
Acked-by: Rob
From: Jaechul Lee
Add DT node support for TM2 touchkey device.
Signed-off-by: Beomho Seo
Signed-off-by: Jaechul Lee
Signed-off-by: Andi Shyti
Reviewed-by: Javier Martinez Canillas
From: Chanwoo Choi
This patch fixes wrong values assigned to ldo23 and ldo25 on both TM2 and TM2E.
Fixes: 01e5d2352152 ("arm64: dts: exynos: Add dts file for Exynos5433-based TM2
board")
Signed-off-by: Chanwoo Choi
Signed-off-by: Andi Shyti
On Fri, Jan 06, 2017 at 12:45:54PM +0100, Auger Eric wrote:
> On 06/01/2017 12:01, Joerg Roedel wrote:
> > On Thu, Jan 05, 2017 at 07:04:36PM +, Eric Auger wrote:
> > That is different from what AMD does, can you also report the RMRR
> > regions for the device here (as direct-map regions)?
>
Now that struct nand_chip embeds an mtd_info object we can get rid of the
mtd parameter and extract it from the chip parameter with the nand_to_mtd()
helper.
Signed-off-by: Boris Brezillon
Reviewed-by: Marek Vasut
---
On Fri, Jan 06, 2017 at 12:46:05PM +0100, Auger Eric wrote:
> On 06/01/2017 12:00, Joerg Roedel wrote:
> > I think it also makes sense to report the type of the reserved region.
>
> What is the best practice in that case? Shall we put the type enum
> values as strings such as:
> - direct
> -
On Mon, 2017-01-02 at 20:32 +0100, Linus Lüssing wrote:
> Implements an optional, per bridge port flag and feature to deliver
> multicast packets to any host on the according port via unicast
> individually. This is done by copying the packet per host and
> changing the multicast destination MAC
Hello Andi,
On 01/06/2017 08:41 AM, Andi Shyti wrote:
> Currently tm2e dts includes tm2 but there are some differences
> between the two boards and tm2 has some properties that tm2e
> doesn't have.
>
> That's why it's important to keep the two dts files independent
> and put all the
On Fri, 2017-01-06 at 13:20 +0100, Mike Galbraith wrote:
> > > madvise06 isn't as deadly to the twiddled PREEMPT kernel as
> it is to PREEMPT_RT_FULL, but a very few runs attracted the oom beast.
The very next run paniced the box... deadly enough for gvt. work :)
Commit 05ee799f2021 ("usb: dwc2: Move gadget settings into core_params")
changes to type u16 for DT binding "g-rx-fifo-size" and
"g-np-tx-fifo-size" but use type u32 for "g-tx-fifo-size". Finally the
the first two parameters cannot be passed successfully with wrong data
format. This is found the
Group all the PCI drivers that use designware core in dwc directory.
dwc IP is capable of operating in both host mode and device mode and
keeping it inside the *host* directory is misleading.
Cc: Thomas Petazzoni
Cc: Minghuan Lian
On 06/01/17 19:44, Stephen Boyd wrote:
> On 01/06, Chris Packham wrote:
>> diff --git a/arch/arm/mach-mvebu/platsmp.c b/arch/arm/mach-mvebu/platsmp.c
>> index 46c742d3bd41..3c9ab9a008ad 100644
>> --- a/arch/arm/mach-mvebu/platsmp.c
>> +++ b/arch/arm/mach-mvebu/platsmp.c
>> @@ -182,5 +182,48 @@
Ard Biesheuvel writes:
> On 5 January 2017 at 12:51, Nicolai Stange wrote:
>> Before invoking the arch specific handler, efi_mem_reserve() reserves
>> the given memory region through memblock.
>>
>> efi_mem_reserve() can get called after mm_init()
Hello,
The following program triggers BUG in loaded_vmcs_init when vmm_exclusive=0:
https://gist.githubusercontent.com/dvyukov/b7d05c1dc99ee25f07db786a788271e0/raw/93908cca12d92f32876f40db2dd5bec9d709/gistfile1.txt
kernel BUG at arch/x86/kvm/x86.c:332!
invalid opcode: [#1] SMP KASAN
Hi,
On 06/01/2017 13:48, Joerg Roedel wrote:
> On Fri, Jan 06, 2017 at 12:46:05PM +0100, Auger Eric wrote:
>> On 06/01/2017 12:00, Joerg Roedel wrote:
>
>>> I think it also makes sense to report the type of the reserved region.
>>
>> What is the best practice in that case? Shall we put the type
On Friday, January 6, 2017 6:22:48 PM CET Kishon Vijay Abraham I wrote:
> Group all the PCI drivers that use designware core in dwc directory.
> dwc IP is capable of operating in both host mode and device mode and
> keeping it inside the *host* directory is misleading.
I have no objections to the
Hi Joerg,
On 06/01/2017 13:46, Joerg Roedel wrote:
> On Fri, Jan 06, 2017 at 12:45:54PM +0100, Auger Eric wrote:
>> On 06/01/2017 12:01, Joerg Roedel wrote:
>>> On Thu, Jan 05, 2017 at 07:04:36PM +, Eric Auger wrote:
>
>>> That is different from what AMD does, can you also report the RMRR
-Remove-PMIC-GPIO-block-support/20170106-185609
base: git://git.infradead.org/users/dvhart/linux-platform-drivers-x86.git
for-next
config: x86_64-randconfig-s0-01062027 (attached as .config)
compiler: gcc-4.4 (Debian 4.4.7-8) 4.4.7
reproduce:
# save the attached .config to linux build tree
Hi Robin,
On 06/01/2017 13:12, Robin Murphy wrote:
> On 06/01/17 11:46, Auger Eric wrote:
>>
>>
>> On 06/01/2017 11:59, Joerg Roedel wrote:
>>> On Thu, Jan 05, 2017 at 07:04:29PM +, Eric Auger wrote:
struct iommu_dma_cookie {
- struct iova_domain iovad;
- struct
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