From: Colin Cross
The BINDER_GET_NODE_DEBUG_INFO ioctl will return debug info on
a node. Each successive call reusing the previous return value
will return the next node. The data will be used by
libmemunreachable to mark the pointers with kernel references
as reachable.
On Thu, Aug 31, 2017 at 09:55:57AM +0200, Thomas Gleixner wrote:
> > Arghh!!!
> >
> > And allowing us to create events for offline CPUs (possible I think, but
> > maybe slightly tricky) won't solve that, because we're already holding
> > the hotplug_lock during PREPARE.
>
> There are two ways to
On Wed 2017-08-30 22:44:00, Jacek Anaszewski wrote:
> Hi,
>
> On 08/29/2017 10:38 PM, Pavel Machek wrote:
> > Hi!
> >
> >>> -As a specific example of this use-case, let's look at vibrate feature on
> >>> -phones. Vibrate function on phones is implemented using PWM pins on SoC
> >>> or
> >>>
Because we have disabled RT priority inheritance for
the regular binder domain, the following can happen:
1) thread A (prio 98) calls into thread B
2) because RT prio inheritance is disabled, thread B
runs at the lowest nice (prio 100) instead
3) thread B calls back into A; A will run at prio
On Thu, 31 Aug 2017, Peter Zijlstra wrote:
> On Thu, Aug 31, 2017 at 09:55:57AM +0200, Thomas Gleixner wrote:
> > > Arghh!!!
> > >
> > > And allowing us to create events for offline CPUs (possible I think, but
> > > maybe slightly tricky) won't solve that, because we're already holding
> > > the
On Thu, Aug 31, 2017 at 10:04:42AM +0200, Peter Zijlstra wrote:
> On Wed, Aug 30, 2017 at 08:25:46PM +0900, Byungchul Park wrote:
>
> > For example - I'm giving you the same example repeatedly:
> >
> > context X context Y
> > - -
> >
According to ACPI IORT spec, named component specific data has a node
flags field whoes bit0 is for Stall support. However, it do not have any
field for pasid bit.
As PCIe SMMU support 20 pasid bits, this patch suggest to use 5 bits[5:1]
in node flags field for pasid bits which means we can have
The previous code assumed a channel has otg capability if a channel
has interrupt property. But, it is not good because:
- Battery charging feature also needs interrupt property.
- Some R-Car Gen3 SoCs (e.g. R-Car D3) doesn't have OTG capability.
So, this patch checks whether usb 2.0 host node
This patch adds SoC-specific parameter to avoid reading/writing
specific registers wrongly if this driver runs on a SoC which doesn't
have dedicated pins (e.g. R-Car D3).
Signed-off-by: Yoshihiro Shimoda
---
drivers/phy/renesas/phy-rcar-gen3-usb2.c | 24
This patch adds binding for r8a77995 (R-Car D3). Since r8a77995 doesn't
have dedicated pins (ID, VBUS), this will match against the generic
fallback on R-Car D3.
For now, this driver doesn't support usb role swap for r8a77995.
Signed-off-by: Yoshihiro Shimoda
This patch set is based on the latest phy.git / next branch
(the commit id = d9c51f4c53ae2af03aa8bd001d46f21b0adcdab8).
After this patch set is applied, a usb 2.0 host node that is combined
with usb 2.0 peripheral needs 'dr_mode = "otg";' property.
Changes from v1:
- Revise typo "wronly" to
Hi Florent,
I'd like for the UEFI folks and arm64 kernel maintainers to express
their views on this overall approach before I do an in-depth review, but
I have some random comments based on reading this patch:
On Fri, Aug 25, 2017 at 09:31:34AM +0100, Florent Revest wrote:
> Usual KVM virtual
The whole VMA games here look entirely bogus you can't just drop
and reacquire mmap_sem for example. And splitting vmas looks just
as promblematic.
As a minimum you really must see the linux-mm list can get some
feedback there.
On Wed, Aug 30, 2017 at 11:09:31PM -0400, Nicolas Pitre wrote:
>
On 31/08/2017 at 12:04:03 +0300, Andy Shevchenko wrote:
> On Thu, 2017-08-31 at 10:23 +0200, Julia Lawall wrote:
> >
> > On Thu, 31 Aug 2017, Alexandre Belloni wrote:
> >
> > > On 31/08/2017 at 06:40:42 +0200, Christophe JAILLET wrote:
> > > > If 'clk_prepare_enable()' fails, we must release
Hi Liam,
> Am 31.08.2017 um 10:58 schrieb Liam Breck :
>
> On Wed, Aug 30, 2017 at 11:58 PM, H. Nikolaus Schaller
> wrote:
>> Hi Liam,
>>
>>> Am 30.08.2017 um 13:24 schrieb Liam Breck :
>>>
>>> Hi Nikolaus,
>>>
>>> On Wed,
super_operations are not supposed to change at runtime.
"struct super_block" working with super_operations provided
by work with const super_operations. So mark
the non-const structs as const
Signed-off-by: Arvind Yadav
---
fs/f2fs/super.c | 2 +-
1 file changed, 1
On Thu, Aug 31, 2017 at 11:43:53AM +0200, Juerg Haefliger wrote:
> On 08/30/2017 06:47 PM, Tycho Andersen wrote:
> > On Wed, Aug 30, 2017 at 07:31:25AM +0200, Juerg Haefliger wrote:
> >>
> >>
> >> On 08/23/2017 07:04 PM, Mark Rutland wrote:
> >>> On Wed, Aug 23, 2017 at 10:58:42AM -0600, Tycho
On Wed, Aug 30, 2017 at 10:54:03AM +0800, Zhangshaokun wrote:
> Hi Jan,
>
> Some trivial things i noticed, please consider if you are glad.
>
> Thanks,
> Shaokun
Hi Shaokun, thanks for the review.
> On 2017/8/29 21:12, Jan Glauber wrote:
> > Add support for the PMU counters on Cavium SOC
On 31/08/2017 at 12:38:17 +0300, Andy Shevchenko wrote:
> On Thu, 2017-08-31 at 11:35 +0200, Alexandre Belloni wrote:
> > On 31/08/2017 at 12:04:03 +0300, Andy Shevchenko wrote:
> > > On Thu, 2017-08-31 at 10:23 +0200, Julia Lawall wrote:
> > > >
> > > > On Thu, 31 Aug 2017, Alexandre Belloni
Aarch64 instructions must be word aligned. The current 16 byte
alignment is more than enough. Relax it into 4 byte alignment.
Signed-off-by: Masahiro Yamada
---
I do not know why arm64 Linux requires 16 byte alignment.
I dug git-history of
On Thu, Aug 31, 2017 at 11:57:46AM +0200, Jan Glauber wrote:
> On Wed, Aug 30, 2017 at 10:54:03AM +0800, Zhangshaokun wrote:
> > On 2017/8/29 21:12, Jan Glauber wrote:
> > > Add support for the PMU counters on Cavium SOC memory controllers.
> > >
> > > This patch also adds generic functions to
Hi Robert,
On 2017/8/29 20:47, Robert Richter wrote:
> Shaokun,
>
> On 29.08.17 17:26:00, Zhangshaokun wrote:
>> On 2017/8/24 20:03, Ganapatrao Kulkarni wrote:
>>> This is not a full event list, but a short list of useful events.
>>>
>>> Signed-off-by: Ganapatrao Kulkarni
-tree-binding-file/20170831-144636
base: git://linuxtv.org/media_tree.git master
config: mips-allyesconfig (attached as .config)
compiler: mips-linux-gnu-gcc (Debian 6.1.1-9) 6.1.1 20160705
reproduce:
wget
https://raw.githubusercontent.com/01org/lkp-tests/master/sbin/make.cross -O
~/bin
On Thu, Aug 31, 2017 at 07:03:11AM +0900, Stafford Horne wrote:
> From: Stefan Kristiansson
>
> Simple enough to be compatible with simulation environments,
> such as verilated systems, QEMU and other targets supporting OpenRISC
> SMP. This also supports our
> -Original Message-
> From: Marc Zyngier [mailto:marc.zyng...@arm.com]
> Sent: Thursday, August 31, 2017 3:02 PM
> To: Bharat Bhushan ; robh...@kernel.org;
> ark.rutl...@arm.com; will.dea...@arm.com; o...@buserror.net; Gang Liu
> ;
On Wed, Aug 23, 2017 at 04:54:45PM -0600, Toshi Kani wrote:
> The ghes_edac driver was introduced in 2013 [1], but it has not
> been enabled by any distro yet. This driver obtains error info
> from firmware interfaces, which are not properly implemented on
> many platforms, as the driver always
-tree-binding-file/20170831-144636
base: git://linuxtv.org/media_tree.git master
config: i386-allmodconfig (attached as .config)
compiler: gcc-6 (Debian 6.2.0-3) 6.2.0 20160901
reproduce:
# save the attached .config to linux build tree
make ARCH=i386
All errors (new ones prefixed
On 2017/8/31 17:36, Arvind Yadav wrote:
> super_operations are not supposed to change at runtime.
> "struct super_block" working with super_operations provided
> by work with const super_operations. So mark
> the non-const structs as const
>
> Signed-off-by: Arvind Yadav
Previously, we will miss merging flush command during fsync due to below
race condition:
Thread AThread BThread C
- f2fs_issue_flush
- atomic_read(_flush)
- f2fs_issue_flush
- atomic_read(_flush)
In scenario of remount_ro vs flush, after flush_thread exits in
->remount_fs, flusher will only clean up golbal issue_list, but
without waking up flushers waiting on that list, result in hang
related user threads.
In order to fix this issue, this patch enables the flusher to
take charge of
This change adds flags to flat_binder_object.flags
to allow indicating a minimum scheduling policy for
the node. It also clarifies the valid value range
for the priority bits in the flags.
Internally, we use the priority map that the kernel
uses, e.g. [0..99] for real-time policies and [100..139]
Hi,
On 31 August 2017 at 15:16, Linus Walleij wrote:
> On Thu, Aug 17, 2017 at 8:50 AM, Baolin Wang
> wrote:
>
>> In some scenarios, we should set some pins as input/output/pullup/pulldown
>> when the specified system goes into deep sleep
Hi Geert-san,
Thank you for the comments!
> From: Geert Uytterhoeven
> Sent: Thursday, August 31, 2017 4:51 PM
>
> Hi Shimoda-san,
>
> On Thu, Aug 31, 2017 at 9:31 AM, Yoshihiro Shimoda
> wrote:
> > This patch adds SoC-specific parameter to avoid
On Mon, Aug 28, 2017 at 04:48:32PM +, KY Srinivasan wrote:
>
>
> > -Original Message-
> > From: Haiyang Zhang
> > Sent: Monday, August 28, 2017 8:57 AM
> > To: Stephen Hemminger ; Eduardo Otubo
> > ; KY Srinivasan
> >
On Thu, Aug 31, 2017 at 05:15:01PM +0900, Byungchul Park wrote:
> It's not important. Ok, check the following, instead:
>
> context X context Y
> - -
> wait_for_completion(C)
> acquire(A)
> release(A)
> process_one_work()
>
On Thu, 2017-08-31 at 10:23 +0200, Julia Lawall wrote:
>
> On Thu, 31 Aug 2017, Alexandre Belloni wrote:
>
> > On 31/08/2017 at 06:40:42 +0200, Christophe JAILLET wrote:
> > > If 'clk_prepare_enable()' fails, we must release some resources
> > > before
> > > returning. Add a new label in the
On Thu 2017-08-31 12:01:01, Nikita Yushchenko wrote:
> >> I think that trying to make this generic is purely synthetic. This
> >> information is board-specific per it's nature, it comes from what board
> >> is designed for, different boards have quite different sets of possible
> >> reset reasons.
'Object code reading' test always fails on powerpc guest. Two reasons
for the failure are:
1. When elf section is too big (size beyond 'unsigned int' max value).
objdump fails to disassemble from such section. This was fixed with
commit 0f6329bd7fc ("binutils/objdump: Fix disassemble for huge elf
On 31/08/17 12:14, Ravi Bangoria wrote:
> 'Object code reading' test always fails on powerpc guest. Two reasons
> for the failure are:
>
> 1. When elf section is too big (size beyond 'unsigned int' max value).
> objdump fails to disassemble from such section. This was fixed with
> commit
On Wed, Aug 16, 2017 at 8:02 AM, Vinay Simha BN wrote:
> Add support for general purpose (GP) clocks
> for apq8064
>
> DT binding documentation updated for
> qcom,apq8064-pinctrl general purpose (GP) clocks.
>
> Acked-by: Bjorn Andersson
>
On 08/30/2017 06:47 PM, Tycho Andersen wrote:
> On Wed, Aug 30, 2017 at 07:31:25AM +0200, Juerg Haefliger wrote:
>>
>>
>> On 08/23/2017 07:04 PM, Mark Rutland wrote:
>>> On Wed, Aug 23, 2017 at 10:58:42AM -0600, Tycho Andersen wrote:
Hi Mark,
On Mon, Aug 14, 2017 at 05:50:47PM
Hi Ingo,
I did a similar patch, and I was told that you sent something similar.
I missed your patch since I have not subscribed to the linux-clk mailing
list. If it's related to at91, you should send it to linux-arm mailing list
too.
On Mon, Jul 10, 2017 at 02:24:09PM +0200, Ingo van Lil wrote:
On Thu, Aug 31, 2017 at 10:07:03AM +1000, Stephen Rothwell wrote:
> Hi all,
>
> After merging the xfs tree, today's linux-next build (powerpc
> ppc64_defconfig) produced this warning:
>
> fs/xfs/xfs_buf_item.c: In function 'xfs_buf_item_unlock':
> fs/xfs/xfs_buf_item.c:573:9: warning: unused
On Thu, Aug 31, 2017 at 12:31:33PM +0200, Takashi Iwai wrote:
> This is again a typical problem by such a trivial fix patch: the code
> looks as if it were trivial and correct, buried in a patch series that
> easily leads to the oversight by the maintainer's review.
Right, plus the amount of
On 31/08/17 11:23, Lothar Waßmann wrote:
> Hi,
>
> On Thu, 31 Aug 2017 18:56:23 +0900 Masahiro Yamada wrote:
>> Aarch64 instructions must be word aligned. The current 16 byte
>> alignment is more than enough. Relax it into 4 byte alignment.
>>
>> Signed-off-by: Masahiro Yamada
On Thu, Aug 31, 2017 at 12:23:14PM +0200, Takashi Iwai wrote:
> Ah, wait, now I see your point. It was introduced by the very recent
> patch through Mark's asoc tree (since it was wrongly labeled as "ASoC"
> while it isn't). That patch looks indeed fishy. The change in
> atmel_ac97c_resume()
On 30 August 2017 at 21:03, Kevin Hilman wrote:
> Hi Ulf,
>
> Ulf Hansson writes:
>
>> On 28 August 2017 at 16:29, Jerome Brunet wrote:
>>> The patchset features several bugfixes, rework and upgrade for the
>>> meson-gx MMC
On 08/25/2017, 10:31 PM, Josh Poimboeuf wrote:
> On Fri, Aug 25, 2017 at 10:01:58AM -0500, Josh Poimboeuf wrote:
>> On Fri, Aug 25, 2017 at 03:54:12PM +0200, Jiri Slaby wrote:
>>> So now, there are two things:
>>> 1) how to fix orc_find & unwind_init properly?
>>> 2) how to generate an EMPTY hint
Hi Sakari,
Thanks for the review.
My comments below.
---
^Divagar
>-Original Message-
>From: Sakari Ailus [mailto:sakari.ai...@iki.fi]
>Sent: Thursday, August 31, 2017 2:50 AM
>To: Mohandass, Divagar
>Cc: robh...@kernel.org; mark.rutl...@arm.com;
Hi Philipp,
Do you have plans to add reset-simple driver into 4.14?
It would be nice to use it for AXS10x in 4.14.
Thanks.
On Mon, 2017-08-14 at 13:37 +, Eugeniy Paltsev wrote:
> On Fri, 2017-08-11 at 15:46 +0200, Philipp Zabel wrote:
> > Hi Eugeniy,
> >
> > On Thu, 2017-08-10 at 19:41
This can cause issues with processes using the poll()
interface:
1) client sends two oneway transactions
2) the second one gets queued on async_todo
(because the server didn't handle the first one
yet)
3) server returns from poll(), picks up the
first transaction and does transaction
By raising the priority of a thread selected for
a transaction *before* we wake it up.
Delay restoring the priority when doing a reply
until after we wake-up the process receiving
the reply.
Signed-off-by: Martijn Coenen
---
drivers/android/binder.c | 74
On Wed, Aug 30, 2017 at 08:25:46PM +0900, Byungchul Park wrote:
> For example - I'm giving you the same example repeatedly:
>
> context X context Y
> - -
> wait_for_completion(C)
> acquire(A)
> process_one_work()
>
As specified in tools/perf/Documentation/perf-config.txt, perf
configuration items must be in 'key = value' format, otherwise the
following error message occurs:
$ perf record -e intel_pt//u -- ls
bad config file line 2 in ~/.perfconfig
$ cat .perfconfig
[intel-pt]
mispred-all
Changing
Hi!
> >> > -As a specific example of this use-case, let's look at vibrate feature on
> >> > -phones. Vibrate function on phones is implemented using PWM pins on SoC
> >> > or
> >> > -PMIC. There is a need to activate one shot timer to control the vibrate
> >> > -feature, to prevent user space
This allows to easily trace and visualize priority inheritance
in the binder driver.
Signed-off-by: Martijn Coenen
---
drivers/android/binder.c | 4
drivers/android/binder_trace.h | 24
2 files changed, 28 insertions(+)
diff --git
1. Problems: Cannot detect EC event in noirq stages.
EC IRQs contain transaction IRQs (OBF/IBF) and event IRQ (SCI_EVT).
Transactions are initiated by hosts. The earliest OSPMs execution of EC
transactions is from acpi_ec_transaction(), where the common EC IRQ
handling procedure -
Removes the process waitqueue, so that threads
can only wait on the thread waitqueue. Whenever
there is process work to do, pick a thread and
wake it up. Having the caller pick a thread is
helpful for things like priority inheritance.
This also fixes an issue with using epoll(),
since we no
Instead of pushing new transactions to the process
waitqueue, select a thread that is waiting on proc
work to handle the transaction. This will make it
easier to improve priority inheritance in future
patches, by setting the priority before we wake up
a thread.
If we can't find a waiting thread,
From: Jean-Philippe Brucker
Platform device can realise SVM function by using the stall mode. That
is to say, when device access a memory via iova which is not populated,
it will stalled and when SMMU try to translate this iova, it also will
stall and meanwhile
When SMMU do not support SVM feature, however the master support SVM,
which means matser can stall and with mult-pasid number, then the user
can bind a task to device using API like iommu_bind_task(). however,
when device trigger a stall mode fault i will cause panic:
[ 106.996087] Unable to
Jean-Philippe has post a patchset for Adding PCIe SVM support to ARM SMMUv3:
https://www.spinics.net/lists/arm-kernel/msg565155.html
But for some platform devices(aka on-chip integrated devices), there is also
SVM requirement, which works based on the SMMU stall mode.
Jean-Philippe has prepared a
From: Jean-Philippe Brucker
Document the bindings for stall and PASID capable platform devices.
Signed-off-by: Jean-Philippe Brucker
---
Documentation/devicetree/bindings/iommu/iommu.txt | 13 +
1 file changed, 13
It is ILLEGAL to set STE.S1STALLD if STALL_MODEL is not 0b00, which
means we should not disable stall mode if stall/terminate mode is not
configuable.
Meanwhile, it is also ILLEGAL when STALL_MODEL==0b10 && CD.S==0 which
means if stall mode is force we should always set CD.S.
This patch add
On Wed, Aug 30, 2017 at 02:02:03PM -0700, Stephen Boyd wrote:
> On 08/26, Shawn Guo wrote:
> > On Fri, Aug 25, 2017 at 04:18:18PM -0700, Stephen Boyd wrote:
> > >
> > > Right. Does the GPIO work? If so, it sounds like the read/write
> > > access checks in spmi pmic arb don't work properly.
> >
>
Hi Geert-san,
> From: Geert Uytterhoeven
> Sent: Thursday, August 31, 2017 5:27 PM
>
> Hi Shimoda-san,
>
> On Thu, Aug 31, 2017 at 10:15 AM, Yoshihiro Shimoda
> wrote:
> >> From: Geert Uytterhoeven
> >> Sent: Thursday, August 31, 2017 4:51 PM
> >> On Thu, Aug
On 31/08/17 10:23, Bharat Bhushan wrote:
> This patch adds iommu-map property for PCIe, which enables
> SMMU for these devices on LS208xA devices.
>
> Signed-off-by: Bharat Bhushan
> ---
> arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 4
> 1 file changed, 4
On Fri, Aug 11, 2017 at 8:55 AM, Vinay Simha BN wrote:
> DT binding documentation for qcom,apq8064-pinctrl driver
> for general purpose (GP) clocks.
>
> Signed-off-by: Vinay Simha BN
Patch applied with Rob's ACK.
I don't think Björn will mind.
Yours,
Hello!
On 8/31/2017 10:31 AM, Yoshihiro Shimoda wrote:
The previous code assumed a channel has otg capability if a channel
has interrupt property. But, it is not good because:
- Battery charging feature also needs interrupt property.
- Some R-Car Gen3 SoCs (e.g. R-Car D3) doesn't have OTG
On 2017/8/4 3:41, Nate Watterson wrote:
> Hi Robin,
>
> On 7/31/2017 7:42 AM, Robin Murphy wrote:
>> Hi Nate,
>>
>> On 29/07/17 04:57, Nate Watterson wrote:
>>> Hi Robin,
>>> I am seeing a crash when performing very basic testing on this series
>>> with a Mellanox CX4 NIC. I dug into the crash
drm_fb_helper_funcs are not supposed to change at runtime.
All functions working with drm_fb_helper_funcs provided by
work with const drm_fb_helper_funcs.
So mark the non-const structs as const.
Signed-off-by: Arvind Yadav
---
drivers/staging/vboxvideo/vbox_fb.c | 2
Commit-ID: 39e48d9b128abbd2ea9b8403bb1e2693323db2f4
Gitweb: http://git.kernel.org/tip/39e48d9b128abbd2ea9b8403bb1e2693323db2f4
Author: Jan Beulich
AuthorDate: Thu, 31 Aug 2017 01:30:19 -0600
Committer: Ingo Molnar
CommitDate: Thu, 31 Aug 2017
Commit-ID: 594a30fb12424717a41c62323d2a8bf167dbccad
Gitweb: http://git.kernel.org/tip/594a30fb12424717a41c62323d2a8bf167dbccad
Author: Hans de Goede
AuthorDate: Wed, 30 Aug 2017 12:58:11 +0200
Committer: Ingo Molnar
CommitDate: Thu, 31 Aug 2017
xattr_handler are not supposed to change at runtime.
"struct super_block" working with xattr_handler provided
by work with const xattr_handler. So mark
the non-const structs as const.
Signed-off-by: Arvind Yadav
---
fs/9p/xattr.c | 6 +++---
1 file changed, 3
On 30.08.2017 14:16, Alexey Budankov wrote:
> On 30.08.2017 11:30, Alexey Budankov wrote:
>> On 29.08.2017 16:51, Alexander Shishkin wrote:
>>> Alexey Budankov writes:
>>>
Now I figured that not all indexed events are always located under
the root with
On 31/08/17 11:00, Thomas Gleixner wrote:
> On Thu, 31 Aug 2017, Thomas Gleixner wrote:
>> Hrm. For some reason I missed to remove these defines after getting rid of
>> the tracing idt.
>>
>> I'll remove that now in tip and pull in the XEN stuff to see what needs to
>> be done.
>
> I pushed out
Hi,
On 22.08.2017 23:21, Peter Zijlstra wrote:
> On Fri, Aug 18, 2017 at 08:17:15AM +0300, Alexey Budankov wrote:
>> Hi,
>
> Please don't post new versions in reply to old versions, that gets them
> lost in thread sorted views.
>
>> This patch set v7 moves event groups into rb trees and
On Thu, 31 Aug 2017 11:56:16 +0200,
Alexandre Belloni wrote:
>
> On 31/08/2017 at 10:23:19 +0200, Julia Lawall wrote:
> >
> >
> > On Thu, 31 Aug 2017, Alexandre Belloni wrote:
> >
> > > On 31/08/2017 at 06:40:42 +0200, Christophe JAILLET wrote:
> > > > If 'clk_prepare_enable()' fails, we must
On 15.08.2017 20:28, Alexey Budankov wrote:
> Hi Peter,
>
> On 07.08.2017 10:17, Alexey Budankov wrote:
>> On 04.08.2017 17:36, Peter Zijlstra wrote:
>>> On Thu, Aug 03, 2017 at 11:30:09PM +0300, Alexey Budankov wrote:
On 03.08.2017 16:00, Peter Zijlstra wrote:
> On Wed, Aug 02, 2017 at
Create a new sdhci-omap driver to configure the eMMC/SD/SDIO controller
in TI's OMAP SoCs making use of the SDHCI core library. For OMAP specific
configurations, populate sdhci_ops with OMAP specific callbacks and use
SDHCI quirks.
Enable only high speed mode for both SD and eMMC here and add
This is the first step in deprecating omap_hsmmc driver completely
and moving to sdhci-omap driver which uses the sdhci library.
This patch that adds a new SDHCI quirk "MMC_RSP_136" has already been
merged and hence removed it in this revision.
Apart from the quirk, sdhci-omap has it's own
On Thu, 31 Aug 2017 12:13:00 +0200,
Takashi Iwai wrote:
>
> On Thu, 31 Aug 2017 11:56:16 +0200,
> Alexandre Belloni wrote:
> >
> > On 31/08/2017 at 10:23:19 +0200, Julia Lawall wrote:
> > >
> > >
> > > On Thu, 31 Aug 2017, Alexandre Belloni wrote:
> > >
> > > > On 31/08/2017 at 06:40:42
From: Ravikumar Kattekola
Reference manuals of OMAP5x and DRA7x have been updated to reflect
the PBIAS regulator max-voltage as 3.3V instead of 3.0V, while OMAP3x
and OMAP4x are still quoting 3.0V. So, as of now, the pbias driver
needs to support both 3.0V and 3.3V IO voltage based
From: Ravikumar Kattekola
As per recent TRM, PBIAS cell on dra7 devices supports
3.3V and not 3.0V as documented earlier.
Update PBIAS regulator max voltage to match this.
Document reference:
SPRUI30C – DRA75x, DRA74x Technical reference manual- November 2016
Tested on:
DRA75x PG
Add binding for the TI's sdhci-omap controller.
Signed-off-by: Kishon Vijay Abraham I
---
Documentation/devicetree/bindings/mmc/sdhci-omap.txt | 16
1 file changed, 16 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mmc/sdhci-omap.txt
diff
Add Maintainer for the TI OMAP SDHCI driver.
Signed-off-by: Kishon Vijay Abraham I
Acked-by: Adrian Hunter
---
MAINTAINERS | 6 ++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 1c3feffb1c1c..e52af3b87404 100644
---
PBIAS voltage should be set along with setting vqmmc voltage and
these voltages should be set as part of start_signal_voltage_switch
callback. However since omap_hsmmc is about to be deprecated,
remove setting of PBIAS voltage leaving the PBIAS voltage to be
at the reset value of 3.3V (we'll never
On 30/08/17 21:26, Krzysztof Kozlowski wrote:
> On Wed, Aug 30, 2017 at 03:41:18PM +0100, Dietmar Eggemann wrote:
>> The following 'capacity-dmips-mhz' dt property values are used:
>>
>> Cortex-A15: 1024, Cortex-A7: 539
>>
>> They have been derived from the cpu_efficiency values:
>>
>> Cortex-A15:
Allows a binder node to specify whether it wants to
inherit real-time scheduling policy from a caller. This
inheritance may not always be desirable, for example in
cases where the binder call runs untrusted and therefore
potentially unbounded code.
Signed-off-by: Martijn Coenen
Changes since v1 [1]:
- added more detailed commit messages and comments to the priority
inheritance patches, including rationale for not using
schet_setscheduler() directly, or rt_mutex prio inheritance.
No functional changes.
[1]:
Adds support for SCHED_BATCH/SCHED_FIFO/SCHED_RR priority inheritance
to the binder driver. The desired behavior is as follows:
Each thread in the binder threadpool runs at a default priority, which is
typically nice 0.
Binder nodes (endpoints that can receive binder transactions) can have a
Thanks!
regards,
dan carpenter
On Wed, Aug 30, 2017 at 06:24:39PM +0900, Byungchul Park wrote:
> > And there obviously _should_ not be any dependencies between those. A
>
> 100% right. Since there obviously should not be any, it would be better
> to check them. So I've endlessly asked you 'do you have any reason removing
> the
Because we're not guaranteed that subsequent calls
to poll() will have a poll_table_struct parameter
with _qproc set. When _qproc is not set, poll_wait()
is a noop, and we won't be woken up correctly.
Signed-off-by: Martijn Coenen
---
drivers/android/binder.c | 11 +--
This allows userspace to request death notifications without
having to worry about getting an immediate callback on the same
thread; one scenario where this would be problematic is if the
death recipient handler grabs a lock that was already taken
earlier (eg as part of a nested transaction).
On 30/08/17 21:58, Christoffer Dall wrote:
> On Wed, Aug 30, 2017 at 04:36:06PM +0100, Marc Zyngier wrote:
>> On 28/08/17 19:18, Christoffer Dall wrote:
>>> On Mon, Jul 31, 2017 at 06:26:29PM +0100, Marc Zyngier wrote:
When a vPE is not running, a VLPI being made pending results in a
On Thu, Aug 31, 2017 at 10:04:20AM +0200, Martijn Coenen wrote:
> Adds support for SCHED_BATCH/SCHED_FIFO/SCHED_RR priority inheritance
> to the binder driver. The desired behavior is as follows:
You fail to support SCHED_DEADLINE, that's not optional.
ILP32 series [1] introduces the dependency on for
TASK_SIZE macro. Which in turn requires , and
include , giving a circular dependency,
because TASK_SIZE is currently located in .
In other architectures, TASK_SIZE is defined in , and
moving TASK_SIZE there fixes the problem.
Discussion:
From: Jean-Philippe Brucker
Add stall and pasid properties to iommu_fwspec.
Signed-off-by: Jean-Philippe Brucker
---
drivers/iommu/of_iommu.c | 11 +++
include/linux/iommu.h| 2 ++
2 files changed, 12 insertions(+)
On 30/08/17 16:04, Ritesh Harjani wrote:
> Hi All,
>
> Please ignore the previous patch series from a wrong email
> address. Stupid gitconfig issue. Apologies for the spam.
>
> This is RFC patch series based on top of ulfh_mmc/cmdq branch
> which is based upon Adrian's CMDQ patch series.
>
>
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