From: Chris Phlipot
In the write to the output_fd in the error condition of
record_saved_cmdline(), we are writing 8 bytes from a memory location
on the stack that contains a primitive that is only 4 bytes in size.
Change the primitive to 8 bytes in size to match the size of the write
in order
I have not rebooted my system since recovering my data off of an old
raid5 array with an external journal which broke after a crash in
write-back mode (https://www.spinics.net/lists/raid/msg61331.html) and I
noticed this in my kernel log. I had the array assembled in read-only
mode without a
Hi Richard,
On Mon, Aug 27, 2018 at 02:50:37PM +0200, Richard Weinberger wrote:
> Am Mittwoch, 4. Juli 2018, 14:41:22 CEST schrieb Sascha Hauer:
> > This patch adds the various helper functions needed for authentication
> > support. We need functions to hash nodes, to embed HMACs into a node and
ADMA2 64-bit addressing support is divided into V3 mode and V4 mode.
So there are two kinds of descriptors for ADMA2 64-bit addressing
i.e. 96-bit Descriptor for V3 mode, and 128-bit Descriptor for V4
mode. 128-bit Descriptor is aligned to 8-byte.
For V4 mode, ADMA2 64-bit addressing is enabled
As SD Host Controller Specification v4.10 documents:
Host Controller Version 4.10 defines this "Auto CMD Auto Select" mode.
Selection of Auto CMD depends on setting of CMD23 Enable in the Host
Control 2 register which indicates whether card supports CMD23. If CMD23
Enable =1, Auto CMD23 is used
From: Chunyan Zhang
This patch adds the initial support of Secure Digital Host Controller
Interface compliant controller found in some latest Spreadtrum chipsets.
This patch has been tested on the version of SPRD-R11 controller.
R11 is a variant based on SD v4.0 specification.
With this
Host Controller Version 4.10 re-defines SDMA System Address register
as 32-bit Block Count for v4 mode, and SDMA uses ADMA System
Address register (05Fh-058h) instead if v4 mode is enabled. Also
when using 32-bit block count, 16-bit block count register need
to be set to zero.
Since using 32-bit
From: Chunyan Zhang
This patch adds the device-tree binding documentation for Spreadtrum
SDHCI driver.
Signed-off-by: Chunyan Zhang
---
.../devicetree/bindings/mmc/sdhci-sprd.txt | 41 ++
1 file changed, 41 insertions(+)
create mode 100644
When Host Version 4 Enable is set to 1, SDMA uses ADMA System Address
register (05Fh-058h) instead of using register (000h-004h) to indicate
its system address of data location. The register (000h-004h) is
re-assigned to 32-bit Block Count and Auto CMD23 argument, so then SDMA
may use Auto CMD23.
Added definitions for v400, v410, v420.
Signed-off-by: Chunyan Zhang
---
drivers/mmc/host/sdhci.c | 2 +-
drivers/mmc/host/sdhci.h | 3 +++
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 97e4efa..01bf88c 100644
---
According to the SD host controller specification version 4.10, when
Host Version 4 is enabled, SDMA uses ADMA System Address register
(05Fh-058h) instead of using SDMA System Address register to
support both 32-bit and 64-bit addressing.
Signed-off-by: Chunyan Zhang
---
For SD host controller version 4.00 or later ones, there're two
modes of implementation - Version 3.00 compatible mode or
Version 4 mode. This patch introduced an interface to enable
v4 mode.
Signed-off-by: Chunyan Zhang
---
drivers/mmc/host/sdhci.c | 29 +
>From the SD host controller version 4.0 on, SDHCI implementation either
is version 3 compatible or version 4 mode. This patch-set covers those
changes which are common for SDHCI 4.0 version, regardless of whether
they are used with SD or eMMC storage devices.
This patchset also added a new sdhci
Hi,
On 2018년 08월 28일 00:35, Andy Shevchenko wrote:
> When assign unions we need to supply non-scalar value, otherwise
> static analyzer is not happy:
>
> CHECK drivers/extcon/extcon.c
> drivers/extcon/extcon.c:631:22: warning: cast to non-scalar
>
> Signed-off-by: Andy Shevchenko
> ---
>
On Tue, Aug 28, 2018 at 05:49:01PM +0200, Jann Horn wrote:
> show_opcodes() is used both for dumping kernel instructions and for dumping
> user instructions. If userspace causes #PF by jumping to a kernel address,
> show_opcodes() can be reached with regs->ip controlled by the user,
> pointing to
Hi,
On 27/08/2018 18:51, Lars-Peter Clausen wrote:
> On 08/27/2018 06:22 PM, Luca Ceresoli wrote:
>> Hi,
>>
>> thanks for your feedback.
>>
>> [Adding Michal Simek (Xilinx maintainer) in Cc]
>>
>> On 27/08/2018 14:27, Lars-Peter Clausen wrote:
>>> On 08/24/2018 06:04 PM, Luca Ceresoli wrote:
Hi Mark,
On 28/08/2018 20:58, Mark Brown wrote:
> On Fri, Aug 24, 2018 at 06:04:29PM +0200, Luca Ceresoli wrote:
>> Hi,
>>
>> here is a fix for a nasty audio capture problem when the axi-i2s
>> output stream is fed to a Xilinx AXI-DMA.
>
> Please don't send cover letters for single patches, if
This patch adds support to read calibration values from the eFuse
controller to calibrate the ADC channel scales, which can make ADC
sample data more accurate.
Signed-off-by: Baolin Wang
---
Changes from v1:
- Use nvmem_cell_read() instead of nvmem_cell_read_u32().
---
On Mon, 2018-08-27 at 02:03 +0100, Al Viro wrote:
> On Mon, Aug 20, 2018 at 04:37:09PM +0800, Ian Kent wrote:
> > The autofs_sbi() inline function does not check the super block
> > magic number to verify it has been given an autofs super block.
>
> IMO it's the wrong way to fix it. The one and
On Tue, 28 Aug 2018 at 16:42, Punit Agrawal wrote:
>
> Vincent Guittot writes:
>
> > Hi Amit,
> >
> > On Wed, 22 Aug 2018 at 12:11, Punit Agrawal wrote:
> >>
> >> Hi Vincent,
> >>
> >> Thanks for the patch. One comment about the choice of units below.
> >>
> >> Vincent Guittot writes:
> >>
>
I run into the following error
testing/selftests/kvm/dirty_log_test.c:285: undefined reference to
`pthread_create'
testing/selftests/kvm/dirty_log_test.c:297: undefined reference to
`pthread_join'
collect2: error: ld returned 1 exit status
my gcc version is gcc version 4.8.4
"-pthread" would
> config ANDROID_BINDER_IPC
> bool "Android Binder IPC Driver"
> - depends on MMU
> + depends on MMU && !CPU_CACHE_VIVT
Thats is a purely arm specific symbol which should not be
used in common code. Nevermind that there generally should
be no good reason for it.
> +
The headset device will use channel 20 of ADC controller to detect events,
but it needs the raw ADC data to do conversion according to its own formula.
Thus we should configure the channel mask separately and configure channel
20 as IIO_CHAN_INFO_RAW, as well as adding raw data read support.
On Mon, 2018-08-27 at 18:08 +0100, Jonathan Cameron wrote:
> On Sat, 25 Aug 2018 22:19:07 +0100
> Afonso Bordado wrote:
>
> > FXAS21002C is a 3 axis gyroscope with integrated temperature sensor
> >
> > Signed-off-by: Afonso Bordado
>
> Hi,
>
> Driver is pretty clean so only a few minor
On Mon, 2018-08-27 at 18:13 +0100, Jonathan Cameron wrote:
> On Sat, 25 Aug 2018 22:19:08 +0100
> Afonso Bordado wrote:
>
> > This patch adds device tree support for the fxas21002c driver,
> > including
> > bindings.
> >
> > Signed-off-by: Afonso Bordado
>
> Now, the devicetree bindings
From: Marcel Ziswiler
Depending on the SPI instance one may get an interrupt storm upon
requesting resp. interrupt unless the clock is explicitly enabled
beforehand. This has been observed trying to bring up instance 4 on
T20.
Signed-off-by: Marcel Ziswiler
---
On 8/28/2018 3:09 AM, Stephen Boyd wrote:
Quoting yixin zhu (2018-08-08 01:52:20)
On 8/8/2018 1:50 PM, Stephen Boyd wrote:
Quoting Songjun Wu (2018-08-02 20:02:21)
+ struct clk *clk;
+ int idx;
+
+ for (idx = 0; idx < nr_clks; idx++, osc++) {
+ if
Add generic resistive touchscreen CONFIG_TOUCHSCREEN_ADC to defconfigs
Signed-off-by: Eugen Hristev
---
arch/arm/configs/multi_v7_defconfig | 1 +
arch/arm/configs/sama5_defconfig| 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/arm/configs/multi_v7_defconfig
The unit of dynamic-power-coefficient is described as mW/MHz/uV^2 whereas
its usage in the code assumes that unit is uW/MHz/V^2
In drivers/thermal/cpu_cooling.c, the code is :
power = (u64)capacitance * freq_mhz * voltage_mv * voltage_mv;
do_div(power, 10);
which can be summarized as :
On Tue, Aug 28, 2018 at 06:29:43PM +0200, Jann Horn wrote:
> No, you can also get user opcode bytes printed by WARN() and friends.
> When you add a WARN() in the pagefault handler, you get something like
Ok, let's always do the checking then - who knows in what context we
might be dumping opcodes
On Fri, Aug 17, 2018 at 12:27:24PM +0200, Torsten Duwe wrote:
> Check for compiler support of -fpatchable-function-entry and use it
> to intercept functions immediately on entry, saving the LR in x9.
> Disable ftracing in efi/libstub, because this triggers cross-section
> linker errors now (-pg is
Any updates on this?
On Fri, Aug 03, 2018 at 10:58:43PM +0300, Mike Rapoport wrote:
>
> Hi,
>
> These patches perform conversion to NO_BOOTMEM of hexagon, nios2, uml and
> unicore32. The architecture maintainers have acked the patches, but, since
> I've got no confirmation the patches are going
Hi OMAP3 DTS Maintainers,
is there any progress in merging this patch series?
We have some more patches in our queue which depend on them.
BR and thanks,
Nikolaus Schaller
> Am 31.07.2018 um 09:11 schrieb H. Nikolaus Schaller :
>
> * Sebastian Reichel
> asked why we have reg=<0> for port@1.
On Sat, Aug 11, 2018 at 4:16 AM Masahiro Yamada
wrote:
> The pin 327 was supposed to be used as a voltage control line for the
> SD card regulator, but the SD card port1 does not support UHS-I. It
> only supports 3.3V signaling, hence this pin is pointless.
>
> Just a note about the background.
Scaling the utilization of CPUs with irq util_avg in schedutil doesn't give
any benefit and just waste CPU cycles when irq time is not accounted but
only steal time.
Add an internal _scale_irq_capacity() for scale_rt_capacity but scale
cpu utilization in schedutil only if we are accounting irq
Hi Jia-Ju,
Hans Verkuil is working on revamping the IRQ locking API for GPIO,
and I think these semantic problems will simply disappear when that
is done.
Yours,
Linus Walleij
On Sat, Aug 11, 2018 at 4:22 AM Jia-Ju Bai wrote:
>
> The driver may sleep with holding a spinlock.
>
> The function
On 28-Aug 11:29, Randy Dunlap wrote:
> On 08/28/2018 06:53 AM, Patrick Bellasi wrote:
> > +config UCLAMP_TASK_GROUP
> > + bool "Utilization clamping per group of tasks"
> > + depends on CGROUP_SCHED
> > + depends on UCLAMP_TASK
> > + default n
> > + help
> > + This feature enables
On Mon, Aug 13, 2018 at 3:53 PM wrote:
> From: Michael Hennerich
>
> This fixes:
> [BUG] gpio: gpio-adp5588: A possible sleep-in-atomic-context bug
> in adp5588_gpio_write()
> [BUG] gpio: gpio-adp5588: A possible sleep-in-atomic-context bug
>
On Wed, 29 Aug 2018 01:11:42 -0700
Nadav Amit wrote:
> Use lockdep to ensure that text_mutex is taken when text_poke() is
> called.
>
> Actually it is not always taken, specifically when it is called by kgdb,
> so take the lock in these cases.
Can we really take a mutex in kgdb context?
> On 29 Aug 2018, at 8:52, Wanpeng Li wrote:
>
> From: Wanpeng Li
>
> Dan Carpenter reported that the untrusted data returns from
> kvm_register_read()
> results in the following static checker warning:
> arch/x86/kvm/lapic.c:576 kvm_pv_send_ipi()
> error: buffer underflow
On Mon, Aug 27, 2018 at 10:12:03PM -0700, Bjorn Andersson wrote:
> The Hexagon v5 ADSP driver is used for more than only the ADSP and
> there's an upcoming non-PAS ADSP PIL for SDM845, so rename the driver to
> qcom_q6v5_pas in order to better suite this.
Hello Bjorn,
so I'm a bit new to this,
On Wed, Aug 29, 2018 at 01:11:46AM -0700, Nadav Amit wrote:
> +static void text_poke_fixmap(void *addr, const void *opcode, size_t len,
> + struct page *pages[2])
> +{
> + u8 *vaddr;
> +
> + set_fixmap(FIX_TEXT_POKE0, page_to_phys(pages[0]));
> + if (pages[1])
From: Sebastian Reichel
Add support for the audio-codec node by converting from
devm_of_platform_populate() to devm_mfd_add_devices().
Tested-by: Pavel Machek
Acked-by: Tony Lindgren
Signed-off-by: Sebastian Reichel
Signed-off-by: Pavel Machek
diff --git
From: Sebastian Reichel
mfd: ti-lmu: constify mfd_cell tables
Add const attribute to all mfd_cell structures.
Signed-off-by: Sebastian Reichel
Signed-off-by: Pavel Machek
diff --git a/drivers/mfd/ti-lmu.c b/drivers/mfd/ti-lmu.c
index cfb411c..990437e 100644
---
On Tue, Aug 28, 2018 at 09:33:15PM +0100, Ben Hutchings wrote:
> Commit c3bc8fd637a9 ("tracing: Centralize preemptirq tracepoints and u
> nify their usage") added the inclusion of .
> liblockdep doesn't have a stub version of that header so now fails to
> build.
>
> However, commit bff1b208a5d1
From: Colin Ian King
Pointer 'port_priv' is being assigned but is never used hence it is
redundant and can be removed.
Cleans up clang warning:
variable 'port_priv' set but not used [-Wunused-but-set-variable]
Signed-off-by: Colin Ian King
---
drivers/staging/fsl-dpaa2/ethsw/ethsw.c | 2 --
From: Andy Shevchenko
> Sent: 27 August 2018 16:36
>
> Switch to use kasprintf() instead of open coded variant.
> No functional change intended.
>
> Signed-off-by: Andy Shevchenko
> ---
> drivers/extcon/extcon.c | 13 +++--
> 1 file changed, 3 insertions(+), 10 deletions(-)
>
> diff
On 18/07/2018 09:49, Amit Kucheria wrote:
> One thermal zone per cpu is defined
The thermal zones are very close, especially when the CPUs belong to the
same 'cluster'. Very likely the temperature will propagate from one core
to another core, so when one core reaches the trip0, there is good
This patch adds support for generating instruction samples from trace of
AArch32 programs using the A32 and T32 instruction sets.
T32 has variable 2 or 4 byte instruction size, so the conversion between
addresses and instruction counts requires extra information from the trace
decoder, requiring
Hi Jisheng,
On mer., août 29 2018, Jisheng Zhang wrote:
> In the loop of mvneta_tx_done_gbe(), we call the smp_processor_id()
> each time, move the call out of the loop to optimize the code a bit.
>
> Before the patch, the loop looks like(under arm64):
>
> ldr x1, [x29,#120]
>
[snip..]
> > >
> > > @@ -38,6 +39,18 @@ static LIST_HEAD(sgx_active_page_list); static
> > > DEFINE_SPINLOCK(sgx_active_page_list_lock);
> > > static struct task_struct *ksgxswapd_tsk; static
> > > DECLARE_WAIT_QUEUE_HEAD(ksgxswapd_waitq);
> > > +static struct notifier_block sgx_pm_notifier;
commit 4585fbcb5331 ("PM / devfreq: Modify the device name as devfreq(X) for
sysfs") changed the node name to devfreq(x). After this commit, it is not
possible to get the device name through /sys/class/devfreq/devfreq(X)/*.
Add new name attribute in order to get device name.
Cc:
On Thu, Aug 16, 2018 at 10:06 PM Stephen Boyd wrote:
> The interrupt controller hardware in this pin controller has two status
> enable bits. The first "normal" status enable bit enables or disables
> the summary interrupt line being raised when a gpio interrupt triggers
> and the "raw" status
On Tue, Aug 28, 2018 at 06:09:24PM +0100, James Morse wrote:
> Does x86 have another source of memory-topology information it needs to
> correlate smbios with?
Bah, pinpointing the DIMM on x86 is a mess. There's no reliable way to
say which DIMM it is in certain cases (interleaving, mirrorring,
On Wed, Aug 29, 2018 at 9:40 AM Linus Walleij wrote:
> This patch applied for fixes with Doug and Bjorn's ACKs.
>
> I suppose you will respin the two others and obtain buy-in from
> the same people for these.
Scrap that. I saw Bjorn has ACKed the two others so applied them for
next (v4.20).
On Thu, Aug 16, 2018 at 10:06 PM Stephen Boyd wrote:
> When requesting a gpio as an interrupt, we should make sure to mux the
> pin as the GPIO function and configure it to be an input so that various
> functions or output signals don't affect the interrupt state of the pin.
> So far, we've
On Tue, 28 Aug 2018 at 03:55, Rob Herring wrote:
>
> In preparation to remove the node name pointer from struct device_node,
> convert printf users to use the %pOFn format specifier.
>
> Cc: Liam Girdwood
> Cc: Mark Brown
> Cc: Sangbeom Kim
> Cc: Krzysztof Kozlowski
> Cc: Bartlomiej
Add missing include of sizes.h.
drivers/soc/qcom/smem.c: In function ‘qcom_smem_get_ptable’:
drivers/soc/qcom/smem.c:666:64: error: ‘SZ_4K’ undeclared
ptable = smem->regions[0].virt_base + smem->regions[0].size - SZ_4K;
^
Since we are using irq_domain_add_linear(), add a select on IRQ_DOMAIN.
This is needed in order to be able to remove the depends on ARCH_QCOM.
drivers/soc/qcom/smsm.c: In function ‘smsm_inbound_entry’:
drivers/soc/qcom/smsm.c:411:18: error: implicit declaration of function
Since commit cab673583d96 ("soc: Unconditionally include qcom Makefile"),
we unconditionally include the soc/qcom/Makefile.
This opens up the possibility to compile test the code even when
building for other architectures.
This patch series prepares and enables all but two Kconfigs to be
compile
On Wed, Aug 8, 2018 at 11:25 AM Tomer Maimon wrote:
> Added device tree binding documentation for Nuvoton BMC
> NPCM750/730/715/705 pinmux and GPIO controller.
>
> Signed-off-by: Tomer Maimon
> Reviewed-by: Rob Herring
Patch applied, bindings are clearly finished!
Yours,
Linus Walleij
'chinfo.name' is used as a NUL-terminated string, but using strncpy() with
the length equal to the buffer size may result in lack of the termination:
drivers//soc/qcom/wcnss_ctrl.c: In function 'qcom_wcnss_open_channel':
drivers//soc/qcom/wcnss_ctrl.c:284:2: warning: 'strncpy' specified bound 32
'adev->name' is used as a NUL-terminated string, but using strncpy() with the
length equal to the buffer size may result in lack of the termination:
In function 'apr_add_device',
inlined from 'of_register_apr_devices' at drivers//soc/qcom/apr.c:264:7,
inlined from 'apr_probe' at
Add missing include of sizes.h.
drivers/soc/qcom/llcc-slice.c: In function ‘llcc_update_act_ctrl’:
drivers/soc/qcom/llcc-slice.c:41:44: error: ‘SZ_4K’ undeclared
#define LLCC_TRP_ACT_CTRLn(n) (n * SZ_4K)
^
Signed-off-by: Niklas Cassel
QCOM_SMD_RPM builds perfectly fine without CONFIG_OF set.
Remove the bogus depends on OF.
Signed-off-by: Niklas Cassel
Reviewed-by: Vivek Gautam
Reviewed-by: Vinod Koul
---
drivers/soc/qcom/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/soc/qcom/Kconfig
Since we are using irq_domain_add_linear(), add a select on IRQ_DOMAIN.
This is needed in order to be able to remove the depends on ARCH_QCOM.
drivers/soc/qcom/smp2p.c: In function ‘qcom_smp2p_inbound_entry’:
drivers/soc/qcom/smp2p.c:317:18: error: implicit declaration of function
Hello Linus,
On Wed, 29 Aug 2018 09:54:04 +0200, Linus Walleij wrote:
> On Mon, Aug 6, 2018 at 4:31 AM Aditya Prayoga wrote:
>
> > Allow more than 1 PWM request (eg. PWM fan) on the same GPIO chip.
> >
> > based on initial work on LK4.4 by Alban Browaeys.
> > URL:
CONFIG_ZRAM=y should be CONFIG_ZRAM=m
it obviously uses zram kernel module in the testing
Signed-off-by: Lei Yang
---
tools/testing/selftests/zram/README | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/testing/selftests/zram/README
Hi Linus,
On mer., août 29 2018, Linus Walleij wrote:
> On Mon, Aug 6, 2018 at 4:31 AM Aditya Prayoga wrote:
>
>> Allow more than 1 PWM request (eg. PWM fan) on the same GPIO chip.
>>
>> based on initial work on LK4.4 by Alban Browaeys.
>> URL:
On Mon, Aug 27, 2018 at 7:30 AM Vinod wrote:
>
> On 02-08-18, 16:10, Andrea Merello wrote:
>
> s/cylic/cyclic in patch title
OK
> > Whenever a single or cyclic transaction is prepared, the driver
> > could eventually split it over several SG descriptors in order
> > to deal with the HW maximum
From: Marcel Ziswiler
Move RTC aliases from module to carrier board to be more in-line with
all our other device trees.
Signed-off-by: Marcel Ziswiler
---
arch/arm/boot/dts/tegra20-colibri-iris.dts | 2 ++
arch/arm/boot/dts/tegra20-colibri.dtsi | 5 -
2 files changed, 2
On Mon, Aug 27, 2018 at 7:31 AM Vinod wrote:
>
> On 02-08-18, 16:10, Andrea Merello wrote:
> > The width of the "length register" cannot be autodetected, and it is now
> > specified with a DT property. Add DOC for it.
>
> Add Documentation for it...
OK
> >
> > Cc: Rob Herring
> > Cc: Mark
From: Marcel Ziswiler
Use no-1-8-v property rather than vmmc/vqmmc supplies and drop now
obsolete and anyway non-existent vcc_sd.
Signed-off-by: Marcel Ziswiler
---
arch/arm/boot/dts/tegra20-colibri-iris.dts | 13 +
1 file changed, 1 insertion(+), 12 deletions(-)
diff --git
From: Marcel Ziswiler
Cleaning up indentation, line-feed and white-space.
Signed-off-by: Marcel Ziswiler
---
arch/arm/boot/dts/tegra20-colibri.dtsi | 18 ++
1 file changed, 6 insertions(+), 12 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi
From: Marcel Ziswiler
Remove the phy-reset-gpio from the USB controller node as it is already
specified in the PHY node.
Signed-off-by: Marcel Ziswiler
---
arch/arm/boot/dts/tegra20-colibri.dtsi | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi
This series is a major overhaul and adds support for the Colibri
Evaluation Board device tree.
Marcel Ziswiler (31):
ARM: tegra: colibri_t20: move aliases from module to carrier board
ARM: tegra: colibri_t20: iris: integrate i2c real time clock support
ARM: tegra: colibri_t20: iris:
From: Marcel Ziswiler
Just cosmetic regulator clean-up.
Signed-off-by: Marcel Ziswiler
---
arch/arm/boot/dts/tegra20-colibri-iris.dts | 20 ++--
arch/arm/boot/dts/tegra20-colibri.dtsi | 147 +++--
2 files changed, 66 insertions(+), 101 deletions(-)
diff --git
From: Marcel Ziswiler
Add rtc0 being the ultra low-power I2C one as found on the carrier board
and the 3rd UART being NVIDIA's UARTB.
Signed-off-by: Marcel Ziswiler
---
arch/arm/boot/dts/tegra20-colibri-iris.dts | 5 +
1 file changed, 5 insertions(+)
diff --git
This patch-set addresses some issues that were raised in the recent
correspondence and might affect the security and the correctness of code
patching. (Note that patching performance is not addressed by this
patch-set).
The main issue that the patches deal with is the fact that the fixmap
PTEs
text_poke() can potentially compromise the security as it sets temporary
PTEs in the fixmap. These PTEs might be used to rewrite the kernel code
from other cores accidentally or maliciously, if an attacker gains the
ability to write onto kernel memory.
Moreover, since remote TLBs are not flushed
The return value of text_poke() is meaningless - it is one of the
function inputs. One day someone may allow the callers to deal with
text_poke() failures, if those actually happen.
In the meanwhile, remove the return value.
Cc: Andy Lutomirski
Cc: Masami Hiramatsu
Cc: Kees Cook
Cc: Peter
From: Andy Lutomirski
Sometimes we want to set a temporary page-table entries (PTEs) in one of
the cores, without allowing other cores to use - even speculatively -
these mappings. There are two benefits for doing so:
(1) Security: if sensitive PTEs are set, temporary mm prevents their use
in
To prevent improper use of the PTEs that are used for text patching, we
want to use a temporary mm struct. We initailize it by copying the init
mm.
The address that will be used for patching is taken from the lower area
that is usually used for the task memory. Doing so prevents the need to
Use lockdep to ensure that text_mutex is taken when text_poke() is
called.
Actually it is not always taken, specifically when it is called by kgdb,
so take the lock in these cases.
Cc: Andy Lutomirski
Cc: Masami Hiramatsu
Cc: Kees Cook
Suggested-by: Peter Zijlstra
Signed-off-by: Nadav Amit
From: Marcel Ziswiler
Add missing regulators:
- reg_lan_v_bus being USB Ethernet chip vbus supply
- carrier board reg_3v3 to be used as backlight and panel power supply
- carrier board HDMI supply being reg_5v0
- reg_usbc_vbus being the USB vbus supply of the EHCI instance 0
Signed-off-by:
Provide a function for copying init_mm. This function will be later used
for setting a temporary mm.
Cc: Andy Lutomirski
Cc: Masami Hiramatsu
Cc: Kees Cook
Cc: Peter Zijlstra
Signed-off-by: Nadav Amit
---
include/linux/sched/task.h | 1 +
kernel/fork.c | 24
From: Marcel Ziswiler
Add display controller parallel RGB panel support incl. backlight PWM.
Signed-off-by: Marcel Ziswiler
---
arch/arm/boot/dts/tegra20-colibri-iris.dts | 31 ++
1 file changed, 31 insertions(+)
diff --git
From: Marcel Ziswiler
Just cosmetic pinmux clean-up.
Signed-off-by: Marcel Ziswiler
---
arch/arm/boot/dts/tegra20-colibri-iris.dts | 10 +-
arch/arm/boot/dts/tegra20-colibri.dtsi | 283 -
2 files changed, 200 insertions(+), 93 deletions(-)
diff --git
From: Marcel Ziswiler
Add empty local-mac-address property to be filled in by boot loader
(e.g. U-Boot).
Signed-off-by: Marcel Ziswiler
---
arch/arm/boot/dts/tegra20-colibri.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi
From: Marcel Ziswiler
Integrate support for GEN1_I2C aka I2C_SDA/SCL on SODIMM pin 194/196 and
the M41T0M6 real time clock on the carrier board.
Signed-off-by: Marcel Ziswiler
---
arch/arm/boot/dts/tegra20-colibri-iris.dts | 15 +++
1 file changed, 15 insertions(+)
diff --git
From: Marcel Ziswiler
Annotate USB EHCI instances.
Signed-off-by: Marcel Ziswiler
---
arch/arm/boot/dts/tegra20-colibri-iris.dts | 2 ++
arch/arm/boot/dts/tegra20-colibri.dtsi | 1 +
2 files changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/tegra20-colibri-iris.dts
From: Marcel Ziswiler
Update sound nvidia,model to be more in-line with our other device
trees.
Signed-off-by: Marcel Ziswiler
---
arch/arm/boot/dts/tegra20-colibri.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi
From: Marcel Ziswiler
Annotate I2C busses: GEN2_I2C and CAM_I2C (I2C3) being unused and
DDC_CLOCK/DATA on X3 pin 15/16 e.g. used for display EDID.
Signed-off-by: Marcel Ziswiler
---
arch/arm/boot/dts/tegra20-colibri-iris.dts | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff
From: Marcel Ziswiler
Reorder Host1x/HDMI properties.
Signed-off-by: Marcel Ziswiler
---
arch/arm/boot/dts/tegra20-colibri.dtsi | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi
b/arch/arm/boot/dts/tegra20-colibri.dtsi
index
Move generic defines common to the Owl family out of S900 driver.
Signed-off-by: Parthiban Nallathambi
Signed-off-by: Saravanan Sekar
---
drivers/pinctrl/actions/pinctrl-owl.h | 131 +++
drivers/pinctrl/actions/pinctrl-s900.c | 139 ++---
Add pinctrl nodes for Actions Semi S700 SoC
Signed-off-by: Parthiban Nallathambi
Signed-off-by: Saravanan Sekar
---
arch/arm64/boot/dts/actions/s700.dtsi | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/actions/s700.dtsi
Am Dienstag, 28. August 2018, 03:52:41 CEST schrieb Rob Herring:
> In preparation to remove the node name pointer from struct device_node,
> convert printf users to use the %pOFn format specifier.
> drivers/pinctrl/pinctrl-rockchip.c| 8 ++---
For the Rockchip-part
Acked-by: Heiko
On Wed, Aug 8, 2018 at 11:26 AM Tomer Maimon wrote:
> Add Nuvoton BMC NPCM750/730/715/705 Pinmux and
> GPIO controller driver.
>
> Signed-off-by: Tomer Maimon
Patch applied! It's a very nice driver.
I had to add back select GPIO_GENERIC as the driver
uses bgpio_init() exactly as I wanted.
On 08/28/2018 09:40 PM, Jann Horn wrote:
> Reset the KASAN shadow state of the task stack before rewinding RSP.
> Without this, a kernel oops will leave parts of the stack poisoned, and
> code running under do_exit() can trip over such poisoned regions and cause
> nonsensical false-positive KASAN
at 8:45 PM, Andy Lutomirski wrote:
> On Tue, Aug 28, 2018 at 6:46 PM, Nadav Amit wrote:
>> Hello Andy,
>>
>> Is there a reason for __flush_tlb_one_kernel() to flush the PTE not only in
>> the kernel address space, but also in the user one (as part of
>> __flush_tlb_one_user)? [ I obviously
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