FYI: this is a slightly different call-trace. I believe this also show a memory
corruption...
[ 17.848975] Run /init as init process
Loading, please wait...
starting version 239
[ 18.045913] BUG: unable to handle page fault for address: 8884bb8f4b98
[ 18.046012] #PF: supervisor write
> Am 03.09.2019 um 04:36 schrieb Viresh Kumar :
>
> On 02-09-19, 12:55, H. Nikolaus Schaller wrote:
>> With opp-v2 in omap36xx.dtsi and ti-cpufreq driver the
>> 1GHz capability is automatically detected.
>>
>> Signed-off-by: H. Nikolaus Schaller
>> ---
>> arch/arm/boot/dts/omap3-n950-n9.dtsi
kfree has taken the null check in account. hence it is unnecessary to add the
null check before kfree the object. Just remove it.
Signed-off-by: zhong jiang
---
fs/nfs/sysfs.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/fs/nfs/sysfs.c b/fs/nfs/sysfs.c
index
Hi Anand,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on linus/master]
[cannot apply to v5.3-rc7 next-20190902]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
Le 03/09/2019 à 07:23, Alastair D'Silva a écrit :
From: Alastair D'Silva
Similar to commit 22e9c88d486a
("powerpc/64: reuse PPC32 static inline flush_dcache_range()")
this patch converts the following ASM symbols to C:
flush_icache_range()
__flush_dcache_icache()
On Mon, Sep 2, 2019 at 8:11 PM Anson Huang wrote:
>
> Hi, Fabio
>
> > On Mon, Sep 2, 2019 at 11:05 PM Anson Huang
> > wrote:
> >
> > > + ret = input_register_device(input);
> > > + if (ret < 0) {
> > > + dev_err(>dev, "failed to register input device\n");
> > > +
On 03.09.2019 05:16, Hayes Wang wrote:
> Heiner Kallweit [mailto:hkallwe...@gmail.com]
>> Sent: Tuesday, September 03, 2019 2:37 AM
> [...]
>> Seeing all this code it might be a good idea to switch this driver
>> to phylib, similar to what I did with r8169 some time ago.
>
> It is too complex to
On Mon, Sep 02, 2019 at 07:42:31PM +0200, Allan W. Nielsen wrote:
> I have been reading through this thread several times and I still do not get
> it.
Allan,
I kept thinking about this and I want to make sure that I correctly
understand the end result.
With these patches applied I assume I
On 03-09-19, 08:01, H. Nikolaus Schaller wrote:
>
> > Am 03.09.2019 um 04:36 schrieb Viresh Kumar :
> >
> > On 02-09-19, 12:55, H. Nikolaus Schaller wrote:
> >> With opp-v2 in omap36xx.dtsi and ti-cpufreq driver the
> >> 1GHz capability is automatically detected.
> >>
> >> Signed-off-by: H.
Hi,
There is a new product which does not support RTC as persistent clock source.
Platform ops get/set wallclock are used to get/set timespec through kernel
timekeeping read/update_persistent_clock64() routines. Presently, get/set
wallclock ops always use MC146818A RTC/CMOS device to read & set
Use wallclock_init() op to detect platforms which does not support RTC and
noop get/set wallclock ops for such platforms.
Reported-by: kbuild test robot
Fixes: 1461badd03e7 ("x86/init: Noop get/set wallclock when platform doesn't
support RTC")
Suggested-by: Andy Shevchenko
Signed-off-by: Rahul
Le 03/09/2019 à 07:23, Alastair D'Silva a écrit :
From: Alastair D'Silva
When presented with large amounts of memory being hotplugged
(in my test case, ~890GB), the call to flush_dcache_range takes
a while (~50 seconds), triggering RCU stalls.
This patch breaks up the call into 1GB chunks,
On Mon, 02 Sep 2019, Bjorn Andersson wrote:
> On Mon 02 Sep 06:24 PDT 2019, Lee Jones wrote:
>
> > From: Bjorn Andersson
> >
> > The Lenovo Yoga C630 is built on the SDM850 from Qualcomm, but this seem
> > to be similar enough to the SDM845 that we can reuse the sdm845.dtsi.
> >
> > Supported
Le 03/09/2019 à 07:23, Alastair D'Silva a écrit :
From: Alastair D'Silva
The 'extern' keyword does not value-add for function prototypes.
Is it worth it ? That kind of change is nice cleanup but the drawback is
to kill automatic backports of fixes.
Signed-off-by: Alastair D'Silva
On Tue, 03 Sep 2019, Lee Jones wrote:
> On Mon, 02 Sep 2019, Bjorn Andersson wrote:
>
> > On Mon 02 Sep 06:24 PDT 2019, Lee Jones wrote:
> >
> > > From: Bjorn Andersson
> > >
> > > The Lenovo Yoga C630 is built on the SDM850 from Qualcomm, but this seem
> > > to be similar enough to the
On Mon, Sep 02, 2019 at 07:18:21PM -0500, Mike Travis wrote:
> Decode the hubless UVsystab passed from BIOS to the kernel saving
> pertinent info in a similar manner that hubbed UVsystabs are decoded.
>
> Signed-off-by: Mike Travis
> Reviewed-by: Steve Wahl
> Reviewed-by: Dimitri Sivanich
>
Le 03/09/2019 à 07:24, Alastair D'Silva a écrit :
From: Alastair D'Silva
This operation takes a significant amount of time when hotplugging
large amounts of memory (~50 seconds with 890GB of persistent memory).
This was orignally in commit fb5924fddf9e
("powerpc/mm: Flush cache on memory
> Am 03.09.2019 um 08:14 schrieb Viresh Kumar :
>
> On 03-09-19, 08:01, H. Nikolaus Schaller wrote:
>>
>>> Am 03.09.2019 um 04:36 schrieb Viresh Kumar :
>>>
>>> On 02-09-19, 12:55, H. Nikolaus Schaller wrote:
With opp-v2 in omap36xx.dtsi and ti-cpufreq driver the
1GHz capability is
On Tue, 2019-09-03 at 08:19 +0200, Christophe Leroy wrote:
>
> Le 03/09/2019 à 07:23, Alastair D'Silva a écrit :
> > From: Alastair D'Silva
> >
> > When presented with large amounts of memory being hotplugged
> > (in my test case, ~890GB), the call to flush_dcache_range takes
> > a while (~50
On 03-09-19, 08:23, H. Nikolaus Schaller wrote:
>
> > Am 03.09.2019 um 08:14 schrieb Viresh Kumar :
> >
> > On 03-09-19, 08:01, H. Nikolaus Schaller wrote:
> >>
> >>> Am 03.09.2019 um 04:36 schrieb Viresh Kumar :
> >>>
> >>> On 02-09-19, 12:55, H. Nikolaus Schaller wrote:
> With opp-v2 in
Add some properties for pcf85263/pcf85363 as follows:
- interrupt-output-pin: string type
- quartz-load-femtofarads: integer type
- nxp,quartz-drive-strength: integer type
- nxp,quartz-low-jitter: bool type
- wakeup-source: bool type
Signed-off-by: Martin Fuzzey
Signed-off-by: Biwen Li
Add some features as follow:
- Set quartz oscillator load capacitance by DT
(generate more accuracy frequency)
- Set quartz oscillator drive control by DT
(reduce/increase the current consumption)
- Set low jitter mode by DT
(improve jitter performance)
- Set
On Tue, 2019-09-03 at 08:23 +0200, Christophe Leroy wrote:
>
> Le 03/09/2019 à 07:24, Alastair D'Silva a écrit :
> > From: Alastair D'Silva
> >
> > This operation takes a significant amount of time when hotplugging
> > large amounts of memory (~50 seconds with 890GB of persistent
> > memory).
>
Hi,
On 03.09.19 16:03, Anson Huang wrote:
i.MX8QXP is an ARMv8 SoC which has a Cortex-M4 system controller
inside, the system controller is in charge of controlling power,
clock and power key etc..
Adds i.MX system controller power key driver support, Linux kernel
has to communicate with
Hi Daniel,
On Tue, Sep 03, 2019 at 07:59:39AM +0200, Daniel Lezcano wrote:
>
> Hi Ming Lei,
>
> On 03/09/2019 05:30, Ming Lei wrote:
>
> [ ... ]
>
>
> >>> 2) irq/timing doesn't cover softirq
> >>
> >> That's solvable, right?
> >
> > Yeah, we can extend irq/timing, but ugly for irq/timing,
On 03.09.19 16:03, Anson Huang wrote:
NXP i.MX8QXP is an ARMv8 SoC with a Cortex-M4 core inside as
system controller, the system controller is in charge of system
power, clock and power key event etc. management, Linux kernel
has to communicate with system controller via MU (message unit)
IPC
On Tue, 3 Sep 2019 at 07:37, Stephen Rothwell wrote:
>
> Hi all,
>
> Today's linux-next merge of the devicetree tree got a conflict in:
>
> Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
>
> between commit:
>
> 5833f5a5daf3 ("dt-bindings: gpu: mali: Add Samsung exynos5250
> Am 03.09.2019 um 08:28 schrieb Viresh Kumar :
>
> On 03-09-19, 08:23, H. Nikolaus Schaller wrote:
>>
>>> Am 03.09.2019 um 08:14 schrieb Viresh Kumar :
>>>
>>> On 03-09-19, 08:01, H. Nikolaus Schaller wrote:
> Am 03.09.2019 um 04:36 schrieb Viresh Kumar :
>
> On 02-09-19,
Heiner Kallweit [mailto:hkallwe...@gmail.com]
> Sent: Tuesday, September 03, 2019 2:14 PM
[...]
> >> Seeing all this code it might be a good idea to switch this driver
> >> to phylib, similar to what I did with r8169 some time ago.
> >
> > It is too complex to be completed for me at the moment.
>
Hi, Oleksij
> On 03.09.19 16:03, Anson Huang wrote:
> > NXP i.MX8QXP is an ARMv8 SoC with a Cortex-M4 core inside as system
> > controller, the system controller is in charge of system power, clock
> > and power key event etc. management, Linux kernel has to communicate
> > with system controller
On 03/09/2019 08:31, Ming Lei wrote:
> Hi Daniel,
>
> On Tue, Sep 03, 2019 at 07:59:39AM +0200, Daniel Lezcano wrote:
>>
>> Hi Ming Lei,
>>
>> On 03/09/2019 05:30, Ming Lei wrote:
>>
>> [ ... ]
>>
>>
> 2) irq/timing doesn't cover softirq
That's solvable, right?
>>>
>>> Yeah, we can
kmemdup contains the kmalloc + memcpy. hence it is better to use kmemdup
directly. Just replace it.
Signed-off-by: zhong jiang
---
fs/omfs/inode.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/fs/omfs/inode.c b/fs/omfs/inode.c
index b76ec6b..8867cef 100644
---
On 03.09.2019 08:36, Hayes Wang wrote:
> Heiner Kallweit [mailto:hkallwe...@gmail.com]
>> Sent: Tuesday, September 03, 2019 2:14 PM
> [...]
Seeing all this code it might be a good idea to switch this driver
to phylib, similar to what I did with r8169 some time ago.
>>>
>>> It is too
wt., 3 wrz 2019 o 06:26 Stephen Rothwell napisał(a):
>
> Hi all,
>
> After merging the regulator tree, today's linux-next build (powerpc
> ppc64_defconfig) failed like this:
>
> ld: drivers/ata/ahci.o:(.opd+0x150): multiple definition of
> `regulator_bulk_set_supply_names';
On Tue, Sep 3, 2019 at 7:32 AM Krzysztof Kozlowski wrote:
>
> On Tue, 3 Sep 2019 at 07:37, Stephen Rothwell wrote:
> >
> > Hi all,
> >
> > Today's linux-next merge of the devicetree tree got a conflict in:
> >
> > Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
> >
> > between
On 03.09.19 08:37, Anson Huang wrote:
Hi, Oleksij
On 03.09.19 16:03, Anson Huang wrote:
NXP i.MX8QXP is an ARMv8 SoC with a Cortex-M4 core inside as system
controller, the system controller is in charge of system power, clock
and power key event etc. management, Linux kernel has to
Hi, Oleksij
> On 03.09.19 16:03, Anson Huang wrote:
> > i.MX8QXP is an ARMv8 SoC which has a Cortex-M4 system controller
> > inside, the system controller is in charge of controlling power, clock
> > and power key etc..
> >
> > Adds i.MX system controller power key driver support, Linux kernel
> static inline bool is_early_uv_system(void)
> {
> return !((efi.uv_systab == EFI_INVALID_TABLE_ADDR) || !efi.uv_systab);
No need for the inner braces here.
But woudn't this be nicer as:
return efi.uv_systab != EFI_INVALID_TABLE_ADDR && efi.uv_systab;
anyway?
> +#define
> +extern int _is_uv_hubbed(int uvtype);
> +#define is_uv_hubbed _is_uv_hubbed
> +static inline int _is_uv_hubbed(int uv) { return 0; }
> +#define is_uv_hubbed _is_uv_hubbed
Another two instances of these weird indirections..
On Mon, Sep 2, 2019 at 7:09 PM Rob Herring wrote:
>
> On Sun, Sep 01, 2019 at 12:39:21PM +0530, Pragnesh Patel wrote:
> > Convert the riscv,sifive-serial binding to DT schema using json-schema.
> >
> > Signed-off-by: Pragnesh Patel
> > ---
> > .../devicetree/bindings/serial/sifive-serial.txt
Heiner Kallweit [mailto:hkallwe...@gmail.com]
> Sent: Tuesday, September 03, 2019 2:45 PM
[...]
> > Besides, I have a question. I think I don't need rtl8152_set_speed()
> > if I implement phylib. However, I need to record some information
> > according to the settings of speed. For now, I do it in
Hi, Oleksij
> On 03.09.19 08:37, Anson Huang wrote:
> > Hi, Oleksij
> >
> >> On 03.09.19 16:03, Anson Huang wrote:
> >>> NXP i.MX8QXP is an ARMv8 SoC with a Cortex-M4 core inside as system
> >>> controller, the system controller is in charge of system power,
> >>> clock and power key event etc.
From: Eric Dumazet
Since ip6frag_expire_frag_queue() now pulls the head skb
from frag queue, we should no longer use skb_get(), since
this leads to an skb leak.
Stefan Bader initially reported a problem in 4.4.stable [1] caused
by the skb_get(), so this patch should also fix this issue.
From: Waiman Long
Tetsuo Handa had reported he saw an incorrect "downgrading a read lock"
warning right after a previous lockdep warning. It is likely that the
previous warning turned off lock debugging causing the lockdep to have
inconsistency states leading to the lock downgrade warning.
Fix
Hi,
I also tried to reproduce this in a targeted way, and run into the
same difficulty as you: satisfying the first condition “
(sk->sk_wmem_queued >> 1) > limit “.
I will not have bandwidth the coming days to try and reproduce it in
this way. Maybe simply forcing a very small send buffer using
From: Hariprasad Kelam
This patch removes NULL checks before calling kfree.
fixes below issues reported by coccicheck
net/sctp/sm_make_chunk.c:2586:3-8: WARNING: NULL check before some
freeing functions is not needed.
net/sctp/sm_make_chunk.c:2652:3-8: WARNING: NULL check before some
freeing
PTR_ERR_OR_ZERO contains if(IS_ERR(...)) + PTR_ERR. It is better
to use it directly. hence just replace it.
Signed-off-by: zhong jiang
---
drivers/net/ethernet/mellanox/mlx5/core/en_tc.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git
From: Nathan Chancellor
Clang warns when one enumerated type is implicitly converted to another:
drivers/pinctrl/sprd/pinctrl-sprd.c:845:19: warning: implicit conversion
from enumeration type 'enum sprd_pinconf_params' to different
enumeration type 'enum pin_config_param' [-Wenum-conversion]
From: David Lechner
This adds rate limiting to the message that is printed when reading a
power supply property via sysfs returns an error. This will prevent
userspace applications from unintentionally dDOSing the system by
continuously reading a property that returns an error.
Signed-off-by:
From: Eric Biggers
Commit 0e5a610b5ca5 ("ppp: mppe: switch to RC4 library interface"),
which was merged through the crypto tree for v5.3, changed ppp_mppe.c to
use the new arc4_crypt() library function rather than access RC4 through
the dynamic crypto_skcipher API.
Meanwhile commit aad1dcc4f011
From: Lanqing Liu
When the source clock is not divisible by the expected baud rate and
the remainder is not less than half of the expected baud rate, the old
formular will round up the frequency division coefficient. This will
make the actual baud rate less than the expected value and can not
Add the SoC IDs for the A113L Amlogic A1 SoC.
Signed-off-by: Jianxin Pan
---
drivers/soc/amlogic/meson-gx-socinfo.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/soc/amlogic/meson-gx-socinfo.c
b/drivers/soc/amlogic/meson-gx-socinfo.c
index 6d0d04f..3c86d8d 100644
---
Add the compatible for the Amlogic A1 Based AD401 board.
Signed-off-by: Jianxin Pan
---
Documentation/devicetree/bindings/arm/amlogic.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml
A1 is an application processor designed for smart audio and IoT applications,
with Dual core ARM Cortex-A35 CPU. Unlike the previous GXL and G12 series,
there is no Cortex-M3 AO CPU in it.
This serial add basic support for the Amlogic A1 based Amlogic AD401 board:
which describe components as
Add basic support for the Amlogic A1 based Amlogic AD401 board:
which describe components as follows: Reserve Memory, CPU, GIC, IRQ,
Timer, UART. It's capable of booting up into the serial console.
Signed-off-by: Jianxin Pan
---
arch/arm64/boot/dts/amlogic/Makefile | 1 +
Add bindings for the new Amlogic A1 SoC family.
A1 is an application processor designed for smart audio and IoT applications,
with dual core Cortex-A35.
Signed-off-by: Jianxin Pan
---
Documentation/devicetree/bindings/arm/amlogic.yaml | 4
1 file changed, 4 insertions(+)
diff --git
From: Richtek Jeff Chang
Signed-off-by: Richtek Jeff Chang
---
sound/soc/codecs/Kconfig | 13 +
sound/soc/codecs/Makefile | 2 +
sound/soc/codecs/mt6660.c | 802 ++
sound/soc/codecs/mt6660.h | 68
4 files changed, 885 insertions(+)
create
Hi,
On 03/09/2019 08:51, Jianxin Pan wrote:
> Add the SoC IDs for the A113L Amlogic A1 SoC.
>
> Signed-off-by: Jianxin Pan
> ---
> drivers/soc/amlogic/meson-gx-socinfo.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/soc/amlogic/meson-gx-socinfo.c
>
Below is the list of build error/warning regressions/improvements in
v5.3-rc7[1] compared to v5.2[2].
Summarized:
- build errors: +6/-1
- build warnings: +121/-134
JFYI, when comparing v5.3-rc7[1] to v5.3-rc6[3], the summaries are:
- build errors: +0/-0
- build warnings: +50/-60
Happy
On 03.09.2019 08:55, Hayes Wang wrote:
> Heiner Kallweit [mailto:hkallwe...@gmail.com]
>> Sent: Tuesday, September 03, 2019 2:45 PM
> [...]
>>> Besides, I have a question. I think I don't need rtl8152_set_speed()
>>> if I implement phylib. However, I need to record some information
>>> according
On Mon, Sep 2, 2019 at 4:03 PM Krzysztof Kozlowski wrote:
>
> Convert the Syscon reboot bindings to DT schema format using
> json-schema.
>
> Signed-off-by: Krzysztof Kozlowski
> ---
> .../bindings/power/reset/syscon-reboot.txt| 30
> .../bindings/power/reset/syscon-reboot.yaml |
On 9/3/19 3:08 AM, Gustavo A. R. Silva wrote:
> Add suffix LL to constant 1000 in order to avoid a potential integer
> overflow and give the compiler complete information about the proper
> arithmetic to use. Notice that this constant is being used in a context
> that expects an expression of
On 15.07.19 16:24:07, Hanna Hawa wrote:
> Adds support for Amazon's Annapurna Labs L1 EDAC driver to detect and
> report L1 errors.
>
> Signed-off-by: Hanna Hawa
> Reviewed-by: James Morse
> ---
> MAINTAINERS | 6 ++
> drivers/edac/Kconfig | 8 +++
>
On 15.07.19 16:24:09, Hanna Hawa wrote:
> Adds support for Amazon's Annapurna Labs L2 EDAC driver to detect and
> report L2 errors.
>
> Signed-off-by: Hanna Hawa
> ---
> MAINTAINERS | 6 ++
> drivers/edac/Kconfig | 8 ++
> drivers/edac/Makefile | 1 +
>
On 03.09.19 08:48, Anson Huang wrote:
Hi, Oleksij
On 03.09.19 16:03, Anson Huang wrote:
i.MX8QXP is an ARMv8 SoC which has a Cortex-M4 system controller
inside, the system controller is in charge of controlling power, clock
and power key etc..
Adds i.MX system controller power key driver
On Tue, Sep 03, 2019 at 08:40:35AM +0200, Daniel Lezcano wrote:
> On 03/09/2019 08:31, Ming Lei wrote:
> > Hi Daniel,
> >
> > On Tue, Sep 03, 2019 at 07:59:39AM +0200, Daniel Lezcano wrote:
> >>
> >> Hi Ming Lei,
> >>
> >> On 03/09/2019 05:30, Ming Lei wrote:
> >>
> >> [ ... ]
> >>
> >>
> >
On Tue 03 Sep 2019 at 02:51, Jianxin Pan wrote:
> Add basic support for the Amlogic A1 based Amlogic AD401 board:
> which describe components as follows: Reserve Memory, CPU, GIC, IRQ,
> Timer, UART. It's capable of booting up into the serial console.
>
> Signed-off-by: Jianxin Pan
> ---
>
Le 03/09/2019 à 08:25, Alastair D'Silva a écrit :
On Tue, 2019-09-03 at 08:19 +0200, Christophe Leroy wrote:
Le 03/09/2019 à 07:23, Alastair D'Silva a écrit :
From: Alastair D'Silva
When presented with large amounts of memory being hotplugged
(in my test case, ~890GB), the call to
On Tue, Sep 03, 2019 at 12:38:02AM -0400, Michael S. Tsirkin wrote:
> On Wed, Jul 17, 2019 at 01:30:27PM +0200, Stefano Garzarella wrote:
> > In order to reduce the number of credit update messages,
> > we send them only when the space available seen by the
> > transmitter is less than
Hi Jacopo,
thanks for your feedback.
On 01/09/19 16:31, jacopo mondi wrote:
> Hi Luca,
>thanks for keep pushing this series! I hope we can use part of this
> for the (long time) on-going GMSL work...
>
> I hope you will be patient enough to provide (another :) overview
> of this work during
On Mon, Aug 12, 2019 at 02:33:56PM -0700, Alexander Duyck wrote:
> From: Alexander Duyck
>
> Add support for the page reporting feature provided by virtio-balloon.
> Reporting differs from the regular balloon functionality in that is is
> much less durable than a standard memory balloon. Instead
On Sat, Aug 31, 2019 at 01:02:24PM +0530, P SAI PRASANTH wrote:
> This patch fixes the following checkpath warning
> in file drivers/staging/rts5208/xd.c:1754
>
> WARNING: line over 80 characters
> + index, offset, DMA_TO_DEVICE,
> chip->xd_timeout);
>
>
Hi, Oleksij
> On 03.09.19 08:48, Anson Huang wrote:
> > Hi, Oleksij
> >
> >> On 03.09.19 16:03, Anson Huang wrote:
> >>> i.MX8QXP is an ARMv8 SoC which has a Cortex-M4 system controller
> >>> inside, the system controller is in charge of controlling power,
> >>> clock and power key etc..
> >>>
>
On Sat, Aug 31, 2019 at 01:10:55PM +0530, Prakhar Sinha wrote:
> This patch solves the following checkpatch.pl's messages in
> drivers/staging/rts5208/sd.c
>
> WARNING: line over 80 characters
> 4517: FILE: drivers/staging/rts5208/sd.c:4517:
> +
> Adding the ATR features to i2c-mux.c was very tricky and error-prone due
> to all of this code, that's why I have moved ATR to its own file in RFCv2.
I forgot to say that I like this.
signature.asc
Description: PGP signature
Heiner Kallweit [mailto:hkallwe...@gmail.com]
> Sent: Tuesday, September 03, 2019 3:13 PM
[...]
> > Some of our chips support the feature of UPS. When satisfying certain
> > condition, the hw would recover the settings of speed. Therefore, I have
> > to record the settings of the speed, and set
drivers/misc/watch_queue.c: In function watch_queue_account_mem:
drivers/misc/watch_queue.c:309:38: error: struct user_struct has no member
named locked_vm; did you mean locked_shm?
cur_pages = atomic_long_read(>locked_vm);
^
On Tue, Sep 03, 2019 at 09:31:20AM +0200, Stefano Garzarella wrote:
> On Tue, Sep 03, 2019 at 12:38:02AM -0400, Michael S. Tsirkin wrote:
> > On Wed, Jul 17, 2019 at 01:30:27PM +0200, Stefano Garzarella wrote:
> > > In order to reduce the number of credit update messages,
> > > we send them only
On Fri, Aug 30, 2019 at 11:13:25PM +, Atish Patra wrote:
> If I understood you clearly, you want to call it legacy in the spec and
> just say v0.1 extensions.
>
> The whole idea of marking them as legacy extensions to indicate that it
> would be obsolete in the future.
>
> But I am not too
On 30.08.19 18:02, Halil Pasic wrote:
> From: Halil Pasic
> Date: Fri, 30 Aug 2019 16:03:42 +0200
> Subject: [PATCH 1/2] s390: vfio-ap: fix warning reset not completed
>
> The intention seems to be to warn once when we don't wait enough for the
> reset to complete. Let's use the right retry
The comment we have is just repeating what the code does.
Include the *reason* for the condition instead.
Cc: Stefano Garzarella
Signed-off-by: Michael S. Tsirkin
---
net/vmw_vsock/virtio_transport_common.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git
On Tue, Sep 3, 2019 at 12:18 AM Marcelo Tosatti wrote:
>
> On Mon, Sep 02, 2019 at 10:34:07PM +0200, Rafael J. Wysocki wrote:
> > On Mon, Sep 2, 2019 at 12:43 PM Joao Martins
> > wrote:
> > >
> > > When cpus != maxcpus cpuidle-haltpoll will fail to register all vcpus
> > > past the online ones
Hi Daniel
On 2019/08/30 0:31, Daniel Thompson wrote:
On Tue, Aug 27, 2019 at 03:29:23PM +0900, Jiada Wang wrote:
From: Nick Dyer
Add a debug switch which causes all messages from the touch controller to
be dumped to the dmesg log with a set prefix "MXT MSG:". This is used by
Atmel user-space
On Mon, Sep 02, 2019 at 11:52:01PM -0500, Eric W. Biederman wrote:
> diff --git a/kernel/sched/core.c b/kernel/sched/core.c
> index 2b037f195473..802958407369 100644
> --- a/kernel/sched/core.c
> +++ b/kernel/sched/core.c
> @@ -3857,7 +3857,7 @@ static void __sched notrace __schedule(bool
Hi Baolu,
On Tuesday, September 3, 2019 3:29:40 AM CEST Lu Baolu wrote:
> Hi Janusz,
>
> On 9/2/19 4:37 PM, Janusz Krzysztofik wrote:
> >> I am not saying that keeping data is not acceptable. I just want to
> >> check whether there are any other solutions.
> > Then reverting 458b7c8e0dde and
Hi,
On 03/09/2019 08:51, Jianxin Pan wrote:
> Add basic support for the Amlogic A1 based Amlogic AD401 board:
> which describe components as follows: Reserve Memory, CPU, GIC, IRQ,
> Timer, UART. It's capable of booting up into the serial console.
>
> Signed-off-by: Jianxin Pan
> ---
>
> From: Zhang, Tina
> Sent: Tuesday, September 3, 2019 9:27 AM
>
> Hi,
>
> Some people are asking whether the display refresh irq could be provided by
> qemu vfio display?
>
> Some background: currently, we have two display timers. One is provided by
> QEMU UI and the other one is provided by
On Tue, Sep 3, 2019 at 12:34 AM Bjorn Helgaas wrote:
>
> On Mon, Sep 02, 2019 at 11:19:58PM +0200, Rafael J. Wysocki wrote:
> > On Wed, Aug 21, 2019 at 5:44 AM Wenwen Wang wrote:
> > >
> > > In acpi_pci_irq_enable(), 'entry' is allocated by kzalloc() in
> > > acpi_pci_irq_check_entry() (invoked
On 03.09.19 09:35, Anson Huang wrote:
Hi, Oleksij
On 03.09.19 08:48, Anson Huang wrote:
Hi, Oleksij
On 03.09.19 16:03, Anson Huang wrote:
i.MX8QXP is an ARMv8 SoC which has a Cortex-M4 system controller
inside, the system controller is in charge of controlling power,
clock and power key
Hi Daniel
On 2019/08/30 0:24, Daniel Thompson wrote:
On Tue, Aug 27, 2019 at 03:27:19PM +0900, Jiada Wang wrote:
From: Karl Tsou
This description is a little brief.
Signed-off-by: Nick Dyer
(cherry picked from ndyer/linux/for-upstream commit
cb98986f8342107bf4a536aed4160b20839e97c1)
On Sun, Sep 1, 2019 at 11:36 PM Hans de Goede wrote:
>
> Rename the algo_init arrays to cc_algo_init so that they do not conflict
> with the functions declared in crypto/sha256.h.
>
> This is a preparation patch for folding crypto/sha256.h into crypto/sha.h.
I'm fine with the renaming.
On Tue, Sep 03, 2019 at 12:39:19AM -0400, Michael S. Tsirkin wrote:
> On Mon, Sep 02, 2019 at 11:57:23AM +0200, Stefano Garzarella wrote:
> > >
> > > Assuming we miss nothing and buffers < 4K are broken,
> > > I think we need to add this to the spec, possibly with
> > > a feature bit to relax the
On Tue, 3 Sep 2019 at 09:14, Rob Herring wrote:
>
> On Mon, Sep 2, 2019 at 4:03 PM Krzysztof Kozlowski wrote:
> >
> > Convert the Syscon reboot bindings to DT schema format using
> > json-schema.
> >
> > Signed-off-by: Krzysztof Kozlowski
> > ---
> > .../bindings/power/reset/syscon-reboot.txt
* Mike Travis wrote:
>
> These patches support upcoming UV systems that do not have a UV HUB.
>
> * Save OEM_ID from ACPI MADT probe
> * Return UV Hubless System Type
> * Add return code to UV BIOS Init function
> * Setup UV functions for Hubless UV Systems
> *
On Tue, Sep 03, 2019 at 03:38:16AM -0400, Michael S. Tsirkin wrote:
> The comment we have is just repeating what the code does.
> Include the *reason* for the condition instead.
>
> Cc: Stefano Garzarella
> Signed-off-by: Michael S. Tsirkin
> ---
> net/vmw_vsock/virtio_transport_common.c | 9
On Tue, Sep 03, 2019 at 09:41:17AM +0200, Peter Zijlstra wrote:
> On Mon, Sep 02, 2019 at 11:52:01PM -0500, Eric W. Biederman wrote:
>
> > diff --git a/kernel/sched/core.c b/kernel/sched/core.c
> > index 2b037f195473..802958407369 100644
> > --- a/kernel/sched/core.c
> > +++ b/kernel/sched/core.c
On 03/09/2019 09:28, Ming Lei wrote:
> On Tue, Sep 03, 2019 at 08:40:35AM +0200, Daniel Lezcano wrote:
>> On 03/09/2019 08:31, Ming Lei wrote:
>>> Hi Daniel,
>>>
>>> On Tue, Sep 03, 2019 at 07:59:39AM +0200, Daniel Lezcano wrote:
Hi Ming Lei,
On 03/09/2019 05:30, Ming Lei
Hello RT Folks!
I'm pleased to announce the 4.4.190-rt187 stable release.
This release is just an update to the new stable 4.4.190 version
and no RT specific changes have been made.
You can get this release via the git tree at:
On Tue, Sep 03, 2019 at 09:45:54AM +0200, Stefano Garzarella wrote:
> On Tue, Sep 03, 2019 at 12:39:19AM -0400, Michael S. Tsirkin wrote:
> > On Mon, Sep 02, 2019 at 11:57:23AM +0200, Stefano Garzarella wrote:
> > > >
> > > > Assuming we miss nothing and buffers < 4K are broken,
> > > > I think
On 2019-09-02 18:18, Jonas Karlman wrote:
> On 2019-09-02 16:00, Philipp Zabel wrote:
>> Hi Jonas,
>>
>> On Sun, 2019-09-01 at 12:45 +, Jonas Karlman wrote:
>>> Scaling list supplied from userspace using ffmpeg and libva-v4l2-request
>>> is already in matrix order and can be used without
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