fix checkpatch.pl error:
ERROR:SPACING: space prohibited before that ','
Cc: Florian Fainelli
Signed-off-by: Chunfeng Yun
Acked-by: Florian Fainelli
---
v4: no changes, but rebase on kernel 5.10-rc1
v3: add acked-by Florian
v2: add Cc Florian
---
drivers/usb/gadget/udc/bdc/bdc_udc.c | 2 +-
1
Prefer using the BIT macro to define bit fileds
Cc: Florian Fainelli
Signed-off-by: Chunfeng Yun
Acked-by: Florian Fainelli
---
v4: no changes, but rebase on kernel 5.10-rc1
v3: add acked-by Florian
v2: add Cc Florian
---
drivers/usb/gadget/udc/bdc/bdc.h | 84
This is used to avoid the warning of function arguments, e.g.
WARNING:FUNCTION_ARGUMENTS: function definition argument 'u32'
should also have an identifier name
Cc: Florian Fainelli
Signed-off-by: Chunfeng Yun
Acked-by: Florian Fainelli
---
v4: no changes, but rebase on kernel 5.10-rc1
v3:
Use '"%s...", __func__' to replace embedded function name
Cc: Florian Fainelli
Signed-off-by: Chunfeng Yun
Acked-by: Florian Fainelli
---
v4: no changes, but rebase on kernel 5.10-rc1
v3: add acked-by Florian
v2: add Cc Florian
---
drivers/usb/gadget/udc/bdc/bdc_dbg.c | 2 +-
For C header files Documentation/process/license-rules.rst
mandates C-like comments (opposed to C source files where
C++ style should be used).
Cc: Florian Fainelli
Signed-off-by: Chunfeng Yun
Acked-by: Florian Fainelli
---
v4: no changes, but rebase on kernel 5.10-rc1
v3: add acked-by Florian
No definition for bdc_ep_set_halt(), so remove it.
Cc: Florian Fainelli
Signed-off-by: Chunfeng Yun
Acked-by: Florian Fainelli
---
v4: no changes, but rebase on kernel 5.10-rc1
v3: add acked-by Florian
v2: add Cc Florian
---
drivers/usb/gadget/udc/bdc/bdc_cmd.h | 1 -
1 file changed, 1
Add () around macro argument to avoid precedence issues
Cc: Florian Fainelli
Signed-off-by: Chunfeng Yun
Acked-by: Florian Fainelli
---
v4: no changes, but rebase on kernel 5.10-rc1
v3: add acked-by Florian
v2: add Cc Florian
---
drivers/usb/gadget/udc/bdc/bdc.h | 18 +-
1
fix the warning:
WARNING:REPEATED_WORD: Possible repeated word: 'and'
Cc: Florian Fainelli
Signed-off-by: Chunfeng Yun
Acked-by: Florian Fainelli
---
v4: no changes, but rebase on kernel 5.10-rc1
v3: add acked-by Florian
v2: add Cc Florian
---
drivers/usb/gadget/udc/bdc/bdc_ep.c | 2 +-
1
fix the warning:
WARNING:BLOCK_COMMENT_STYLE:
Block comments should align the * on each line
Cc: Florian Fainelli
Signed-off-by: Chunfeng Yun
Acked-by: Florian Fainelli
---
v4: no changes, but rebase on kernel 5.10-rc1
v3: add acked-by Florian
v2: add Cc Florian
---
WARNING:SUSPECT_CODE_INDENT: suspect code indent for conditional statements
WARNING:TABSTOP: Statements should start on a tabstop
Cc: Florian Fainelli
Signed-off-by: Chunfeng Yun
Acked-by: Florian Fainelli
---
v4: no changes, but rebase on kernel 5.10-rc1
v3: add acked-by Florian
v2: add Cc
Prefer kzalloc(sizeof(*bd_table)...) over
kzalloc(sizeof(struct bd_table)
Cc: Florian Fainelli
Signed-off-by: Chunfeng Yun
Acked-by: Florian Fainelli
---
v4: no changes, but rebase on kernel 5.10-rc1
v3: add acked-by Florian
v2: add Cc Florian
---
drivers/usb/gadget/udc/bdc/bdc_ep.c | 2 +-
1
This files defines the sud-device types and hwmon profiles support by
Advantech embedded controller.
Signed-off-by: Shihlun Lin
---
include/dt-bindings/mfd/ahc1ec0.h | 25 +
1 file changed, 25 insertions(+)
create mode 100644 include/dt-bindings/mfd/ahc1ec0.h
diff
Add Advantech embedded controller entry
Signed-off-by: Shihlun Lin
---
MAINTAINERS | 11 +++
1 file changed, 11 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 94ac10a153c7..c1fe5233b469 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -562,6 +562,17 @@ S: Maintained
F:
This is one of sub-device driver for Advantech embedded controller
AHC1EC0. This driver provide watchdog functionality for Advantech
related applications to restart the system.
Signed-off-by: Shihlun Lin
---
drivers/watchdog/Kconfig | 8 +
drivers/watchdog/Makefile | 1 +
AHC1EC0 is the embedded controller driver for Advantech industrial
products. This provides sub-devices such as hwmon and watchdog, and also
expose functions for sub-devices to read/write the value to embedded
controller.
Signed-off-by: Shihlun Lin
---
drivers/mfd/Kconfig | 10 +
Add DT binding schema for Advantech embedded controller AHC1EC0.
Signed-off-by: Shihlun Lin
---
.../devicetree/bindings/mfd/ahc1ec0.yaml | 70 +++
1 file changed, 70 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mfd/ahc1ec0.yaml
diff --git
This is one of sub-device driver for Advantech embedded controller
AHC1EC0. This driver provides sysfs ABI for Advantech related
applications to monitor the system status.
Signed-off-by: Shihlun Lin
---
drivers/hwmon/Kconfig |8 +
drivers/hwmon/Makefile|1 +
Hello Dmitry,
Am 12.11.20 um 02:27 schrieb Dmitry Torokhov:
> req->sample[1] is not naturally aligned at word boundary, and therefore
> we should use get_unaligned_be16() when accessing it.
>
> Fixes: 3eac5c7e44f3 ("Input: ads7846 - extend the driver for ads7845
> controller support")
>
On Thu, 12 Nov 2020 16:21:49 +1300
Chris Packham wrote:
> make coccicheck complains:
>
> ./drivers/bus/mvebu-mbus.c:1113:2-8: ERROR: missing iounmap; ioremap on
> line 1106 and execution via conditional on line
>
> It took some staring but I don't think there is a problem because the
>
Hi Thomas,
On 03.11.2020 10:27, Thomas Gleixner wrote:
> No reason having the same code in every architecture.
>
> Signed-off-by: Thomas Gleixner
> Cc: Russell King
> Cc: Arnd Bergmann
> Cc: linux-arm-ker...@lists.infradead.org
This patch landed in linux-next 20201109 as commit 2a15ba82fa6c
Hello Dimitry,
Thank you for that.
What about the other patches?
Regards,
Andrej
> -Original Message-
> From: Dmitry Torokhov
> Sent: Thursday, November 12, 2020 2:54 AM
> To: Valek, Andrej (ADV D EU SK SI-BP1)
> Cc: linux-in...@vger.kernel.org; linux-kernel@vger.kernel.org;
>
On Thu, Nov 12, 2020 at 12:16:50AM +0100, Thomas Gleixner wrote:
> Wrappers which make things simpler are always useful, but the lack of
> wrappers does not justify a wholesale replacement.
Totally right. Lack of wrappers doesn't matter at all. That could be
achieved easily by modifying the
On 2020/11/12 15:58, Mike Rapoport wrote:
> Hi,
>
> On Sat, Oct 31, 2020 at 03:44:30PM +0800, Chen Zhou wrote:
>> Move CRASH_ALIGN to header asm/kexec.h and replace the hard-coded
>> alignment with macro CRASH_ALIGN in function reserve_crashkernel().
>>
>> Suggested-by: Dave Young
>>
On Sat, Oct 31, 2020 at 03:44:33PM +0800, Chen Zhou wrote:
> Make the functions reserve_crashkernel[_low]() as generic.
> Arm64 will use these to reimplement crashkernel=X.
>
> Signed-off-by: Chen Zhou
> Tested-by: John Donnelly
> ---
> arch/x86/include/asm/kexec.h | 25 ++
>
On Tue, 2020-11-10 at 15:19 +0800, Zhenzhong Duan wrote:
> "intel_iommu=off" command line is used to disable iommu but iommu is force
> enabled in a tboot system for security reason.
>
> However for better performance on high speed network device, a new option
> "intel_iommu=tboot_noforce" is
On 11.11.2020 17:28, Antoine Tenart wrote:
EXTERNAL EMAIL: Do not click links or open attachments unless you know the
content is safe
Hi Steen,
Quoting Steen Hegelund (2020-11-11 16:17:53)
The MSCC PHYs selected for PTP and MACSec was not correct
- PTP
- Add VSC8572 and VSC8574
-
On Wed, Nov 11, 2020 at 11:06 PM Martin Schiller wrote:
>
> About 1 year ago I was asked by Arnd Bergmann if I would like to become
> the maintainer for the X.25 stack:
>
> https://patchwork.ozlabs.org/project/netdev/patch/20191209151256.2497534-4-a...@arndb.de/#2320767
>
> Yes, I would agree to
On Wed, 2020-11-11 at 11:23 +0800, Claire Chang wrote:
> On Wed, Nov 11, 2020 at 1:35 AM Johannes Berg
> wrote:
> > On Tue, 2020-11-10 at 16:49 +0800, Claire Chang wrote:
> > > If a device is getting removed or reprobed during resume, use-after-free
> > > might happen. For example,
On Thu, Nov 12, 2020 at 12:55 AM Bird, Tim wrote:
>
>
>
> > -Original Message-
> > From: David Gow
> >
> > On Wed, Nov 11, 2020 at 1:02 AM Bird, Tim wrote:
> > >
> > > > -Original Message-
> > > > From: David Gow
> > > >
> > > > On Mon, Nov 9, 2020 at 2:49 PM Arpitha
On Wed, Nov 11, 2020 at 08:15:19PM -0500, Steven Rostedt wrote:
> diff --git a/arch/x86/include/asm/ftrace.h b/arch/x86/include/asm/ftrace.h
> index e00fe88146e0..235385a38bd9 100644
> --- a/arch/x86/include/asm/ftrace.h
> +++ b/arch/x86/include/asm/ftrace.h
> @@ -54,6 +54,9 @@
currently the NVME_QUIRK_SHARED_TAGS quirk for Apple devices is handled
during the assignment of nr_io_queues in nvme_setup_io_queues().
This however means that for these devices nvme_max_io_queues() will
actually not return the supported maximum which is confusing and
unexpected and also means
in nvme_setup_io_queues() the number of I/O queues is set to either 1 in
case of a quirky Apple device or to the min of nvme_max_io_queues() or
dev->nr_allocated_queues - 1.
This is unnecessarily complicated as dev->nr_allocated_queues is only
assigned once and is nvme_max_io_queues() + 1.
Hi,
while searching for a bug around zPCI + NVMe IRQ handling on a distro
kernel, I got confused around handling of the maximum number
of I/O queues in the NVMe driver.
I think I groked it in the end but would like to propose the following
improvements, that said I'm quite new to this code.
I
On Wed, Nov 11, 2020 at 09:54:48PM +0800, Baoquan He wrote:
> On 11/11/20 at 09:27pm, chenzhou wrote:
> > Hi Baoquan,
> ...
> > >> #ifdef CONFIG_CRASH_DUMP
> > >> static int __init early_init_dt_scan_elfcorehdr(unsigned long node,
> > >> diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
> >
On Thu, Nov 12, 2020 at 2:48 AM 王擎 wrote:
> >> On Wed, Nov 11, 2020 at 03:24:33PM +0200, Grygorii Strashko wrote:
> >
> >I don't think v1 builds cleanly folks (not 100% sure, cpts is not
> >compiled on x86):
> >
> > ret = cpts->ptp_clock ? cpts->ptp_clock : (-ENODEV);
> >
>
Hi Sergey,
Serge Semin wrote on Wed, 11 Nov
2020 22:22:59 +0300:
> On Tue, Nov 10, 2020 at 04:35:56PM +0100, Miquel Raynal wrote:
> > Hi Serge,
> >
> > Serge Semin wrote on Tue, 10 Nov
> > 2020 14:38:27 +0300:
> >
> > > Hello Miquel,
> > >
> > > A situation noted by the warning below
Add read_persistent_clock64() to read the time from the battery backed
persistent clock. With this patch, we can fix the wrong time issue due
to the system clock is not consistent with hardware clock after resume
from sleep state S3 (suspend to RAM), at the same time, the system time
can be right
On 12/11/20 01:28, Babu Moger wrote:
Add support to the mask_cr3_rsvd_bits() callback to mask the
encryption bit from the CR3 value when SEV is enabled.
Additionally, cache the encryption mask for quick access during
the check.
Fixes: a780a3ea628268b2 ("KVM: X86: Fix reserved bits check for
On 11/12/20 at 10:25am, Mike Rapoport wrote:
> On Wed, Nov 11, 2020 at 09:54:48PM +0800, Baoquan He wrote:
> > On 11/11/20 at 09:27pm, chenzhou wrote:
> > > Hi Baoquan,
> > ...
> > > >> #ifdef CONFIG_CRASH_DUMP
> > > >> static int __init early_init_dt_scan_elfcorehdr(unsigned long node,
> > > >>
When suspending the driver, anx7625_power_standby() will be called to
turn off reset-gpios and enable-gpios. However, power supplies are not
disabled. To save power, the driver can get the power supply regulators
and turn off them in anx7625_power_standby().
Signed-off-by: Hsin-Yi Wang
---
anx7625 requires 3 power supply regulators.
Signed-off-by: Hsin-Yi Wang
---
.../display/bridge/analogix,anx7625.yaml | 18 ++
1 file changed, 18 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
Hi Mirela,
On Thu, 2020-11-12 at 05:05 +0200, Mirela Rabulea (OSS) wrote:
> From: Mirela Rabulea
>
> Add jpeg decoder/encoder nodes, for now on imx8qxp only.
> The same should work on imx8qm, but it was not tested.
>
Does imx8qm need changes in the dt bindings?
Unless you are aware of
On Thu, Nov 12, 2020 at 7:25 AM Kuan-Ying Lee
wrote:
>
> We hit this issue in our internal test.
> When enabling generic kasan, a kfree()'d object is put into per-cpu
> quarantine first. If the cpu goes offline, object still remains in
> the per-cpu quarantine. If we call kmem_cache_destroy()
On Sat, 7 Nov 2020 at 01:11, Jian Cai wrote:
>
> This patch replaces 6 IWMMXT instructions Clang's integrated assembler
> does not support in iwmmxt.S using macros, while making sure GNU
> assembler still emit the same instructions. This should be easier than
> providing full IWMMXT support in
Fix to return a negative error code from the error handling case
instead of 0 in function msg_bind(), as done elsewhere in this
function.
Fixes: d86788979761 ("usb: gadget: mass_storage: allocate and init otg
descriptor by otg capabilities")
Reported-by: Hulk Robot
Signed-off-by: Chen Zhou
---
Fix to return a negative error code from the error handling case
instead of 0 in function sel_ib_pkey_sid_slow(), as done elsewhere
in this function.
Fixes: 409dcf31538a ("selinux: Add a cache for quicker retreival of PKey SIDs")
Reported-by: Hulk Robot
Signed-off-by: Chen Zhou
---
Hello Greg,
On Tue, Nov 10, 2020 at 09:31:06PM +0100, Greg Kroah-Hartman wrote:
> On Tue, Nov 10, 2020 at 04:07:23PM +0100, Uwe Kleine-König wrote:
> > The driver core doesn't check the return value of the remove callback
> > because there is only little software can do when hardware disappears.
On Thu, Nov 12, 2020 at 03:15:32PM +0900, Byungchul Park wrote:
> > If on the other hand there's some bug in lockdep itself that causes
> > excessive false positives, it's better to limit the number of reports
> > to one per bootup, so that it's not seen as a nuisance debugging
> > facility.
>
On Wed, Nov 11, 2020 at 4:04 PM Andy Shevchenko
wrote:
>
> On Wed, Nov 11, 2020 at 5:02 PM Andy Shevchenko
> wrote:
> >
> > On Tue, Nov 10, 2020 at 11:42 AM Bartosz Golaszewski wrote:
> > >
> > > From: Bartosz Golaszewski
> > >
> > > If all we want to manage is a single pointer, there's no
Hi Kirill,
On 12/11/2020 9.57, Kirill Marinushkin wrote:
>> The set_fmt callback is there to set the bus format, it has nothing to
>> do (in most cases) with the sample format (hw_params). Bus coding, clock
>> source has nothing to do with hw_params.
>>
>> When you bind a link you will use
Hi Pi-Hsun,
I haven't gone through the code, but did have a high-level comment
(kindly see inline)
On Thu, Nov 12, 2020 at 02:40:40PM +0800, Pi-Hsun Shih wrote:
> When output 2 lanes DP data, anx7625 can output to either TX1/RX1 or
> TX2/RX2. In typical usage, these two TX/RX pairs corresponds
Fix to return a negative error code from the error handling case
instead of 0 in function _ib_modify_qp(), as done elsewhere in this
function.
Fixes: 51aab12631dd ("RDMA/core: Get xmit slave for LAG")
Reported-by: Hulk Robot
Signed-off-by: Chen Zhou
---
drivers/infiniband/core/verbs.c | 4 +++-
The "gpio-line-names" declaration is not fully
documented, so can be useful to add some important
information and one more example.
This commit also fixes a trivial spelling mistake.
Signed-off-by: Flavio Suligoi
---
v2: - fix commit spelling mistakes
- add double back quotes to
Selecting VSC8575 as a MACSec PHY was not correct
The relevant datasheet can be found here:
- VSC8575: https://www.microchip.com/wwwproducts/en/VSC8575
Fixes: 0a504e9e97886 ("net: phy: mscc: macsec initialization")
Signed-off-by: Steen Hegelund
---
drivers/net/phy/mscc/mscc_macsec.c | 1 -
1
On 11/11/20 1:37 AM, Mathieu Poirier wrote:
> On Tue, 10 Nov 2020 at 11:18, Arnaud POULIQUEN
> wrote:
>>
>> Hi Mathieu, Guennadi,
>>
>> On 11/9/20 6:55 PM, Mathieu Poirier wrote:
>>> On Mon, Nov 09, 2020 at 11:20:24AM +0100, Guennadi Liakhovetski wrote:
Hi Arnaud,
On Mon, Nov
Simplify and refactor the descriptor management by removing the redundant
Linked List Item (LLI) queue control logic from the AxiDMA driver.
The descriptor is split into virtual descriptor and hardware LLI so that
only hardware LLI memories are allocated from the DMA memory pool.
Up to 64
YAML schemas Device Tree (DT) binding is the new format for DT to replace
the old format. Introduce YAML schemas DT binding for dw-axi-dmac and
remove the old version.
Signed-off-by: Sia Jee Heng
---
.../bindings/dma/snps,dw-axi-dmac.txt | 39 --
Add device_config() callback function so that the device address
can be passed to the dma driver.
DMA clients use this interface to pass in the device address to the
AxiDMA. Without this interface, data transfer between device to memory
and memory to device would failed.
Reviewed-by: Andy
Add support for device_prep_dma_cyclic() callback function to benefit
DMA cyclic client, for example ALSA.
Existing AxiDMA driver only support data transfer between memory to memory.
Data transfer between device to memory and memory to device in cyclic mode
would failed if this interface is not
Add device_prep_slave_sg() callback function so that DMA_MEM_TO_DEV
and DMA_DEV_TO_MEM operations in single mode can be supported.
Existing AxiDMA driver only support data transfer between
memory to memory. Data transfer between device to memory and
memory to device in single mode would failed if
From: Lars-Peter Clausen
Use a heap allocated memory for the SPI transfer buffer. Using stack memory
can corrupt stack memory when using DMA on some systems.
This change adds 4 bytes at the end of the current DMA buffer, which will
be used by the trigger handler.
This is required because the
The below patch series are to support AxiDMA running on Intel KeemBay SoC.
The base driver is dw-axi-dmac. This driver only support DMA memory copy
transfers. Code refactoring is needed so that additional features can be
supported.
The features added in this patch series are:
- Replacing Linked
Add support for device_synchronize() callback function to sync with
dmaengine_terminate_sync().
Reviewed-by: Andy Shevchenko
Signed-off-by: Sia Jee Heng
---
drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c | 8
1 file changed, 8 insertions(+)
diff --git
Add support for DMA Scatter-Gather (SG) constraint so that DMA clients can
handle the AxiDMA limitation.
Without supporting DMA constraint the default Max segment size reported by
dmaengine is 64KB, which is not supported by Intel KeemBay AxiDMA.
Reviewed-by: Andy Shevchenko
Signed-off-by: Sia
Add support for of_dma_controller_register() so that DMA clients
can pass in device handshake number to the AxiDMA driver.
DMA clients shall code the device handshake number in the Device tree.
When DMA activities are needed, DMA clients shall invoke OF helper
function to pass in the device
On Wed, 2020-11-11 at 22:53 +0100, Martin Kaiser wrote:
> Call irq_set_chained_handler_and_data() to clear the chained handler
> and the handler's data under irq_desc->lock.
>
> See also 2cf5a03cb29d ("PCI/keystone: Fix race in installing chained
> IRQ handler").
>
> Signed-off-by: Martin Kaiser
Add support for Intel KeemBay AxiDMA to the .compatible field.
Reviewed-by: Andy Shevchenko
Signed-off-by: Sia Jee Heng
---
drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
Add support for Intel KeemBay AxiDMA to the dw-axi-dmac
Schemas DT binding.
Signed-off-by: Sia Jee Heng
---
.../bindings/dma/snps,dw-axi-dmac.yaml| 25 +++
1 file changed, 25 insertions(+)
diff --git a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
Add support for Intel KeemBay AxiDMA BYTE and HALFWORD registers
programming.
Intel KeemBay AxiDMA supports data transfer between device to memory
and memory to device operations.
This code is needed by I2C, I3C, I2S, SPI and UART which uses FIFO
size of 8bits and 16bits to perform memory to
Hi Prashant,
Please see inline reply as below.
On Thu, Nov 12, 2020 at 4:59 PM Prashant Malani wrote:
>
> Hi Pi-Hsun,
>
> I haven't gone through the code, but did have a high-level comment
> (kindly see inline)
>
> On Thu, Nov 12, 2020 at 02:40:40PM +0800, Pi-Hsun Shih wrote:
> > When output 2
Add support for Intel KeemBay DMA registers. These registers are required
to run data transfer between device to memory and memory to device on Intel
KeemBay SoC.
Reviewed-by: Andy Shevchenko
Signed-off-by: Sia Jee Heng
---
drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c | 4
Add support for Intel KeemBay AxiDMA device handshake programming.
Device handshake number passed in to the AxiDMA shall be written to
the Intel KeemBay AxiDMA hardware handshake registers before DMA
operations are started.
Reviewed-by: Andy Shevchenko
Signed-off-by: Sia Jee Heng
---
On Wed, 2020-11-11 at 17:45 -0800, Dmitry Torokhov wrote:
> Hi Nicolas,
>
> On Wed, Nov 04, 2020 at 11:39:33AM +0100, Nicolas Saenz Julienne wrote:
> > Use devm_rpi_firmware_get() so as to make sure we release RPi's firmware
> > interface when unbinding the device.
>
> Unless I am mistaken this
The DMA memory block is created at driver load time and exist for
device lifetime. Move the dma_pool_create() to the ->chan_resource()
callback function allowing the DMA memory blocks to be created as needed
and destroyed when the channel is freed.
Reviewed-by: Andy Shevchenko
Signed-off-by: Sia
Add support for DMA_RESIDUE_GRANULARITY_BURST so that AxiDMA can report
DMA residue.
Existing AxiDMA driver only support data transfer between
memory to memory operation, therefore reporting DMA residue
to the DMA clients is not supported.
Reporting DMA residue to the DMA clients is important as
On Thu, Nov 12, 2020 at 05:07:05PM +0800, Pi-Hsun Shih wrote:
> Hi Prashant,
>
> Please see inline reply as below.
>
> On Thu, Nov 12, 2020 at 4:59 PM Prashant Malani wrote:
> >
> > Hi Pi-Hsun,
> >
> > I haven't gone through the code, but did have a high-level comment
> > (kindly see inline)
Le 12/11/2020 à 07:42, Greg Kroah-Hartman a écrit :
> On Thu, Nov 12, 2020 at 07:19:48AM +0100, Brice Goglin wrote:
>> Le 07/10/2020 à 07:15, Greg Kroah-Hartman a écrit :
>>> On Tue, Oct 06, 2020 at 08:14:47PM -0700, Ricardo Neri wrote:
On Tue, Oct 06, 2020 at 09:37:44AM +0200, Greg
On Wed, Nov 11, 2020 at 03:17:28PM -0800, Evan Green wrote:
> GPIOs that attempt to use interrupts get thwarted with a message like:
> "pin 161 cannot be used as IRQ" (for instance with SD_CD). This is because
> the HOSTSW_OWN offset is incorrect, so every GPIO looks like it's
> owned by ACPI.
>
SiFive FU740 has 4 ECC interrupt sources as compared to 3 in FU540.
Update the L2 cache controller driver to support this additional
interrupt in case of FU740-C000 chip.
Signed-off-by: Yash Shah
---
drivers/soc/sifive/sifive_l2_cache.c | 49 +++-
1 file changed,
The L2 cache controller in SiFive FU740 has 4 ECC interrupt sources as
compared to 3 in FU540. Update the DT documentation accordingly with
"compatible" and "interrupt" property changes.
Signed-off-by: Yash Shah
---
.../devicetree/bindings/riscv/sifive-l2-cache.yaml | 33 +-
On Wed, Nov 11, 2020 at 1:05 PM Jens Axboe wrote:
>
> On 11/11/20 1:53 PM, Max Filippov wrote:
> > TIF_NOTIFY_SIGNAL handling in xtensa assembly is implemented
> > incorrectly: there should be a call to do_notify_resume when either
> > TIF_SIGPENDING, TIF_NOTIFY_RESUME or TIF_NOTIFY_SIGNAL bit is
Fix warning of title underline too short
Signed-off-by: Siddhant Gupta
---
Documentation/admin-guide/LSM/SafeSetID.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/admin-guide/LSM/SafeSetID.rst
b/Documentation/admin-guide/LSM/SafeSetID.rst
index
From: Steven Rostedt
> Sent: 12 November 2020 00:33
>
> Inspecting the data structures of the function graph tracer, I found that
> the overrun value is unsigned long, which is 8 bytes on a 64 bit machine,
> and not only that, the depth is an int (4 bytes). The overrun can be simply
> an unsigned
Hi Linu,
Please could you test this slightly modified version and give us
a Tested-by tag if you are happy with the results ?
Suzuki
On 11/10/20 12:45 PM, Anshuman Khandual wrote:
From: Suzuki K Poulose
When there are multiple sinks on the system, in the absence
of a specified sink, it is
On 11/6/2020 11:01 AM, Wang Qing wrote:
> Fix passing zero to 'PTR_ERR' warning
>
Thanks.
> Signed-off-by: Wang Qing
> ---
> drivers/crypto/caam/caamalg_qi.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/crypto/caam/caamalg_qi.c
>
Add VSC8572 and VSC8574 in the PTP configuration
as they also support PTP.
The relevant datasheets can be found here:
- VSC8572: https://www.microchip.com/wwwproducts/en/VSC8572
- VSC8574: https://www.microchip.com/wwwproducts/en/VSC8574
Signed-off-by: Steen Hegelund
---
From: Wenlin Kang
The strncpy() function may create a unterminated string,
use strscpy_pad() instead.
This fixes the following warning:
fs/ext4/super.c: In function '__save_error_info':
fs/ext4/super.c:349:2: warning: 'strncpy' specified bound 32 equals destination
size
From: Wenlin Kang
Replace strncpy() with strscpy(), fixes the following warning:
In function 'bearer_name_validate',
inlined from 'tipc_enable_bearer' at net/tipc/bearer.c:246:7:
net/tipc/bearer.c:141:2: warning: 'strncpy' specified bound 32 equals
destination size [-Wstringop-truncation]
Hi Anshuman,
On Wed, Nov 11, 2020 at 09:18:56AM +0530, Anshuman Khandual wrote:
> On 11/11/20 12:44 AM, Catalin Marinas wrote:
> > On Wed, 14 Oct 2020 10:18:57 +0200, Ard Biesheuvel wrote:
> >> As a hardening measure, we currently randomize the placement of
> >> physical memory inside the linear
On 11/10/20 12:45 PM, Anshuman Khandual wrote:
perf handle structure needs to be shared with the TRBE IRQ handler for
capturing trace data and restarting the handle. There is a probability
of an undefined reference based crash when etm event is being stopped
while a TRBE IRQ also getting
Hi Anshuman,
On 11/10/20 12:45 PM, Anshuman Khandual wrote:
Unlike traditional sink devices, individual TRBE instances are not detected
via DT or ACPI nodes. Instead TRBE instances are detected during CPU online
process. Hence a path connecting ETE and TRBE on a given CPU would not have
been
On Tue, Nov 10, 2020 at 11:10:25PM +0100, Andrey Konovalov wrote:
> diff --git a/arch/arm64/mm/copypage.c b/arch/arm64/mm/copypage.c
> index 70a71f38b6a9..f0efa4847e2f 100644
> --- a/arch/arm64/mm/copypage.c
> +++ b/arch/arm64/mm/copypage.c
> @@ -23,6 +23,7 @@ void copy_highpage(struct page *to,
On Thu, Nov 12, 2020 at 11:09:04AM +0530, Sumit Semwal wrote:
> Hi John,
>
> On Tue, 10 Nov 2020 at 09:19, John Stultz wrote:
> >
> > Hey All,
> > So just wanted to send my last revision of my patch series
> > of performance optimizations to the dma-buf system heap.
>
> Thanks very much for
On Wed, Nov 11, 2020 at 12:10:50PM +0530, Sai Prakash Ranjan wrote:
> On 2020-11-10 17:48, Will Deacon wrote:
> > On Fri, Oct 30, 2020 at 02:53:09PM +0530, Sai Prakash Ranjan wrote:
> > > Add iommu domain attribute for using system cache aka last level
> > > cache by client drivers like GPU to set
On Wed, Nov 11, 2020 at 8:19 AM Ard Biesheuvel wrote:
>
> I am still not convinced we need this change, as I don't see how the
> concerns regarding __section apply to __alias. But if we do, can we
> please use the same approach, i.e., revert the current patch, and
> queue it again after v5.11-rc1
Hi Lorenzo,
On 2020-11-11 16:28, Lorenzo Pieralisi wrote:
GIC CPU interfaces versions predating GIC v4.1 were not built to
accommodate vINTID within the vSGI range; as reported in the GIC
specifications (8.2 "Changes to the CPU interface"), it is
CONSTRAINED UNPREDICTABLE to deliver a vSGI to a
On 11/12/20 9:31 AM, Catalin Marinas wrote:
> On Tue, Nov 10, 2020 at 11:10:25PM +0100, Andrey Konovalov wrote:
>> diff --git a/arch/arm64/mm/copypage.c b/arch/arm64/mm/copypage.c
>> index 70a71f38b6a9..f0efa4847e2f 100644
>> --- a/arch/arm64/mm/copypage.c
>> +++ b/arch/arm64/mm/copypage.c
>> @@
On Thu, Nov 12, 2020 at 3:01 AM syzbot
wrote:
>
> syzbot suspects this issue was fixed by commit:
>
> commit 4d004099a668c41522242aa146a38cc4eb59cb1e
> Author: Peter Zijlstra
> Date: Fri Oct 2 09:04:21 2020 +
>
> lockdep: Fix lockdep recursion
>
> bisection log:
On Wed, Nov 11, 2020 at 07:04:37PM -0600, Tyrel Datwyler wrote:
> Both ibmvfc_show_host_(capabilities|npiv_version) functions retrieve
> values from vhost->login_buf.resp buffer. This is the MAD response
> buffer from the VIOS and as such any multi-byte non-string values are in
> big endian
Both the caller and the supplier's source file should have access to
the include file containing the prototypes.
Fixes the following W=1 kernel build warning(s):
drivers/pinctrl/pinctrl-at91.c:1637:6: warning: no previous prototype for
‘at91_pinctrl_gpio_suspend’ [-Wmissing-prototypes]
1637 |
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