[PATCH 0/8] Tegra SDHCI support HS400 on Tegra210 and Tegra186

Hi all, This series implements support for HS400 signaling on Tegra210 and Tegra186. This includes programming the DQS trimmer values, implementing enhanced strobe and HS400 delay line calibration. This series depends on the "Tegra SDHCI add support for HS200 and UHS signaling" ser

[PATCH 1/8] dt-bindings: mmc: Add DQS trim value to Tegra SDHCI

Document HS400 DQS trim value device tree property. Signed-off-by: Aapo Vienamo --- Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt b/Documentation/devicetree

[PATCH 2/8] mmc: tegra: Parse and program DQS trim value

Parse and program the HS400 DQS trim value from dt. Program a fallback value in case the property is missing. Signed-off-by: Aapo Vienamo --- drivers/mmc/host/sdhci-tegra.c | 32 +--- 1 file changed, 29 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/host

[PATCH 4/8] mmc: tegra: Implement HS400 delay line calibration

Implement HS400 specific delay line calibration procedure. Signed-off-by: Aapo Vienamo --- drivers/mmc/host/sdhci-tegra.c | 29 + 1 file changed, 29 insertions(+) diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c index d81143b..d0b68b7

[PATCH 3/8] mmc: tegra: Implement HS400 enhanced strobe

Implement HS400 enhanced strobe. Signed-off-by: Aapo Vienamo --- drivers/mmc/host/sdhci-tegra.c | 22 ++ 1 file changed, 22 insertions(+) diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c index 426f7ea..d81143b 100644 --- a/drivers/mmc/host/sdhci

[PATCH 5/8] arm64: dts: tegra186: Add SDMMC4 DQS trim value

Add the HS400 DQS trim value for Tegra186 SDMMC4. Signed-off-by: Aapo Vienamo --- arch/arm64/boot/dts/nvidia/tegra186.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi index 6e9ef26..9e07bc6 100644 --- a

[PATCH 6/8] arm64: dts: tegra210: Add SDMMC4 DQS trim value

Add the HS400 DQS trim value for Tegra210 SDMMC4. Signed-off-by: Aapo Vienamo --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi index 14da98a..f8e5f09 100644 --- a

[PATCH 7/8] arm64: dts: tegra186: Enable HS400

Enable HS400 signaling on Tegra186 SDMMC4 controller. Signed-off-by: Aapo Vienamo --- arch/arm64/boot/dts/nvidia/tegra186.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi index 9e07bc6..2f3c8e2 100644

[PATCH 8/8] arm64: dts: tegra210: Enable HS400

Enable HS400 signaling on Tegra210 SDMMC4 controller. Signed-off-by: Aapo Vienamo --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi index f8e5f09..8fe47d6 100644

Re: [PATCH v2 00/40] Tegra SDHCI add support for HS200 and UHS signaling

On Mon, 27 Aug 2018 17:50:53 +0200 Thierry Reding wrote: > On Mon, Aug 27, 2018 at 02:10:58PM +, Marcel Ziswiler wrote: > > On Fri, 2018-08-10 at 21:08 +0300, Aapo Vienamo wrote: > > > Hi all, > > > > > > This series implements support for faster

Re: [PATCH v2 11/40] mmc: sdhci: Add a quirk to skip clearing the transfer mode register on tuning

On Mon, 27 Aug 2018 14:01:52 +0300 Adrian Hunter wrote: > On 10/08/18 21:08, Aapo Vienamo wrote: > > Add SDHCI_QUIRK2_TUNE_SKIP_XFERRMODE_REG_PROG to skip programming the > > SDHCI_TRANSFER_MODE in sdhci_set_transfer_mode() if tuning command is > > being sent. > > &

Re: [PATCH v2 25/40] mmc: sdhci: Add a quirk to disable card clock during tuning

On Mon, 27 Aug 2018 14:25:44 +0300 Adrian Hunter wrote: > On 10/08/18 21:08, Aapo Vienamo wrote: > > Add a quirk to disable card clock when the tuning command is sent. > > > > This has to be done to prevent the SDHCI controller from hanging on > > Tegra210. With

[PATCH v3 00/38] Tegra SDHCI add support for HS200 and UHS signaling

_warn() in tegra_sdhci_init_pinctrl_info() - Don't change start_signal_voltage_switch callback if pinctrl info invalid - Only call udelay(1) on enable in tegra_sdhci_configure_cal_pad() - Add nvidia, prefix to pad autocal offset dt props in the example See the original patch sets for

[PATCH v3 02/38] dt-bindings: mmc: tegra: Add pad voltage control properties

Document the pinctrl bindings used by the SDHCI driver to reconfigure pad voltages on controllers supporting multiple voltage levels. Signed-off-by: Aapo Vienamo Reviewed-by: Mikko Perttunen Reviewed-by: Rob Herring Acked-by: Thierry Reding --- .../bindings/mmc/nvidia,tegra20-sdhci.txt

[PATCH v3 01/38] dt-bindings: Add Tegra PMC pad configuration bindings

-off-by: Aapo Vienamo Acked-by: Jon Hunter Reviewed-by: Rob Herring Acked-by: Thierry Reding --- .../arm/tegra/nvidia,tegra186-pmc.txt | 93 .../bindings/arm/tegra/nvidia,tegra20-pmc.txt | 103 ++ .../pinctrl/pinctrl-tegra-io-pad.h| 18 +++ 3

[PATCH v3 03/38] dt-bindings: Add Tegra SDHCI pad pdpu offset bindings

Add bindings documentation for pad pull up and pull down offset values to be programmed before executing automatic pad drive strength calibration. Signed-off-by: Aapo Vienamo Acked-by: Thierry Reding --- .../bindings/mmc/nvidia,tegra20-sdhci.txt | 35 +++ 1 file changed, 35

[PATCH v3 04/38] dt-bindings: mmc: Add Tegra SDHCI sampling trimmer values

Document the Tegra SDHCI inbound and outbound sampling trimmer values. Signed-off-by: Aapo Vienamo Acked-by: Thierry Reding --- .../devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt | 11 +++ 1 file changed, 11 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/nvidia

[PATCH v3 06/38] soc/tegra: pmc: Factor out DPD register bit calculation

Factor out the the code to calculate the correct DPD register and bit number for a given pad. This logic will be needed to query the status register. Signed-off-by: Aapo Vienamo Acked-by: Jon Hunter Acked-by: Thierry Reding --- drivers/soc/tegra/pmc.c | 20 +--- 1 file changed

[PATCH v3 05/38] soc/tegra: pmc: Fix pad voltage configuration for Tegra186

Implement support for the PMC_IMPL_E_33V_PWR register which replaces PMC_PWR_DET register interface of the SoC generations preceding Tegra186. Also add the voltage bit offsets to the tegra186_io_pads[] table and the AO_HV pad. Signed-off-by: Aapo Vienamo Acked-by: Jon Hunter Acked-by: Thierry

[PATCH v3 07/38] soc/tegra: pmc: Implement tegra_io_pad_is_powered()

Implement a function to query whether a pad is in deep power down mode. This is needed by the pinctrl callbacks. Signed-off-by: Aapo Vienamo Acked-by: Jon Hunter Acked-by: Thierry Reding --- drivers/soc/tegra/pmc.c | 15 +++ 1 file changed, 15 insertions(+) diff --git a/drivers

[PATCH v3 08/38] soc/tegra: pmc: Use X macro to generate IO pad tables

Refactor the IO pad tables into macro tables so that they can be reused to generate pinctrl pin descriptors. Also add a name field which is needed by pinctrl. Signed-off-by: Aapo Vienamo Acked-by: Thierry Reding --- drivers/soc/tegra/pmc.c | 233 ++-- 1 file

[PATCH v3 12/38] mmc: tegra: Poll for calibration completion

Implement polling with 10 ms timeout for automatic pad drive strength calibration. Signed-off-by: Aapo Vienamo Acked-by: Thierry Reding --- drivers/mmc/host/sdhci-tegra.c | 22 +- 1 file changed, 17 insertions(+), 5 deletions(-) diff --git a/drivers/mmc/host/sdhci-tegra.c

[PATCH v3 13/38] mmc: tegra: Set calibration pad voltage reference

Configure the voltage reference used by the automatic pad drive strength calibration procedure. The value is a magic number from the TRM. Signed-off-by: Aapo Vienamo Acked-by: Thierry Reding --- drivers/mmc/host/sdhci-tegra.c | 56 -- 1 file changed, 33

[PATCH v3 15/38] mmc: tegra: Disable card clock during pad calibration

Disable the card clock during automatic pad drive strength calibration and re-enable it afterwards. Signed-off-by: Aapo Vienamo Acked-by: Thierry Reding --- drivers/mmc/host/sdhci-tegra.c | 26 ++ 1 file changed, 26 insertions(+) diff --git a/drivers/mmc/host/sdhci

[PATCH v3 09/38] soc/tegra: pmc: Remove public pad voltage APIs

igned-off-by: Aapo Vienamo Acked-by: Jon Hunter Acked-by: Thierry Reding --- drivers/soc/tegra/pmc.c | 17 - include/soc/tegra/pmc.h | 19 --- 2 files changed, 8 insertions(+), 28 deletions(-) diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c

[PATCH v3 11/38] mmc: tegra: Reconfigure pad voltages during voltage switching

for Tegra210 and Tegra186. The pad configuration is done in the mmc callback because the order of pad reconfiguration and sdhci voltage switch depend on the voltage to which the transition occurs. Signed-off-by: Aapo Vienamo Acked-by: Thierry Reding --- drivers/mmc/host/sdhci-tegra.c | 136

[PATCH v3 10/38] soc/tegra: pmc: Implement pad configuration via pinctrl

Register a pinctrl device and implement get and set functions for PIN_CONFIG_LOW_POWER_MODE and PIN_CONFIG_POWER_SOURCE parameters. Signed-off-by: Aapo Vienamo Acked-by: Jon Hunter Acked-by: Thierry Reding --- drivers/soc/tegra/pmc.c | 187 +++- 1 file

[PATCH v3 20/38] mmc: tegra: Parse default trim and tap from dt

Parse the default inbound and outbound sampling trimmer values from the device tree. Signed-off-by: Aapo Vienamo Acked-by: Thierry Reding --- drivers/mmc/host/sdhci-tegra.c | 22 ++ 1 file changed, 22 insertions(+) diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc

[PATCH v3 16/38] mmc: tegra: Program pad autocal offsets from dt

Parse the pad drive strength calibration offsets from the device tree. Program the calibration offsets in accordance with the current signaling mode. Signed-off-by: Aapo Vienamo Acked-by: Thierry Reding --- drivers/mmc/host/sdhci-tegra.c | 152 - 1 file changed

[PATCH v3 19/38] mmc: tegra: Add a workaround for tap value change glitch

Add quirk to disable the card clock during configuration of the tap value in tegra_sdhci_set_tap() and issue sdhci_reset() after value change. This is a workaround to avoid propagation of a potential glitch caused by setting the tap value. Signed-off-by: Aapo Vienamo Acked-by: Thierry Reding

[PATCH v3 17/38] mmc: tegra: Perform pad calibration after voltage switch

Run the automatic pad calibration after voltage switching if tegra_host->pad_calib_required is set. Signed-off-by: Aapo Vienamo Acked-by: Thierry Reding --- drivers/mmc/host/sdhci-tegra.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/h

[PATCH v3 18/38] mmc: tegra: Enable pad calibration on Tegra210 and Tegra186

Set NVQUIRK_HAS_PADCALIB on Tegra210 and Tegra186 to enable automatic pad drive strength calibration. Signed-off-by: Aapo Vienamo Acked-by: Thierry Reding --- drivers/mmc/host/sdhci-tegra.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/host/sdhci-tegra.c

[PATCH v3 26/38] mmc: tegra: Enable UHS and HS200 modes for Tegra210

Set nvquirks to enable higher speed modes. Signed-off-by: Aapo Vienamo Acked-by: Thierry Reding --- drivers/mmc/host/sdhci-tegra.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c index aa1574b8d96c

[PATCH v3 27/38] mmc: tegra: Enable UHS and HS200 modes for Tegra186

Set nvquirks to enable higher speed modes. Signed-off-by: Aapo Vienamo Acked-by: Thierry Reding --- drivers/mmc/host/sdhci-tegra.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c index 73ea947e9c0c

[PATCH v3 28/38] arm64: dts: Add Tegra210 sdmmc pinctrl voltage states

Add pad voltage configuration nodes for sdmmc pads with configurable voltages on Tegra210. Signed-off-by: Aapo Vienamo Reviewed-by: Mikko Perttunen Acked-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 27 1 file changed, 27 insertions(+) diff --git

[PATCH v3 29/38] arm64: dts: Add Tegra186 sdmmc pinctrl voltage states

Add pad voltage configuration nodes for sdmmc pads with configurable voltages on Tegra186. Signed-off-by: Aapo Vienamo Reviewed-by: Mikko Perttunen Acked-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra186.dtsi | 40 1 file changed, 40 insertions(+) diff --git

[PATCH v3 23/38] mmc: tegra: Use standard SDHCI tuning on Tegra210 and Tegra186

Add a new sdhci_ops struct for Tegra210 and Tegra186 which doesn't set the custom tuning callback used on previous SoC generations. Signed-off-by: Aapo Vienamo Acked-by: Thierry Reding --- drivers/mmc/host/sdhci-tegra.c | 17 +++-- 1 file changed, 15 insertions(+), 2 dele

[PATCH v3 21/38] mmc: tegra: Configure default tap values

Set the default inbound timing adjustment tap value on reset and on non-tunable modes. The default tap value is not programmed on tunable modes because the tuning sequence is used instead to determine the tap value. Signed-off-by: Aapo Vienamo Acked-by: Thierry Reding --- drivers/mmc/host

[PATCH v3 24/38] mmc: tegra: Remove tegra_sdhci_writew() from tegra210_sdhci_ops

en to. This results in tuning failures on Tegra210. Signed-off-by: Aapo Vienamo --- drivers/mmc/host/sdhci-tegra.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c index f68557a01d5d..0bdce437e752 100644 --- a/drivers/mmc/host/

[PATCH v3 33/38] arm64: dts: tegra186: Add sdmmc pad auto calibration offsets

Add the calibration offset properties used for automatic pad drive strength calibration. Signed-off-by: Aapo Vienamo Acked-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra186.dtsi | 20 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia

[PATCH v3 34/38] arm64: dts: tegra210: Add sdmmc pad auto calibration offsets

Add the calibration offset properties used for automatic pad drive strength calibration. Signed-off-by: Aapo Vienamo Acked-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 12 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi

[PATCH v3 32/38] arm64: dts: tegra210-p2597: Remove no-1-8-v from sdmmc1

Allow sdmmc1 to set the signaling voltage to 1.8 V in order to support faster signaling modes. Signed-off-by: Aapo Vienamo Acked-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2597

[PATCH v3 22/38] mmc: tegra: Configure default trim value on reset

Program the outbound sampling trim value in tegra_sdhci_reset(). Unlike the outbound tap value this does not depend on the signaling mode and needs to be only programmed once. Signed-off-by: Aapo Vienamo Acked-by: Thierry Reding --- drivers/mmc/host/sdhci-tegra.c | 7 ++- 1 file changed, 6

[PATCH v3 25/38] mmc: tegra: Disable card clock during tuning cmd on Tegra210

Implement tegra210_sdhci_writew() to disable card clock and issue a reset when the tuning command is sent. This is done to prevent an intermittent hang with around 10 % failure rate during tuning. Add tegra186_sdhci_ops because this workaround is specific to Tegra210. Signed-off-by: Aapo Vienamo

[PATCH v3 31/38] arm64: dts: tegra210-p2180: Correct sdmmc4 vqmmc-supply

On p2180 sdmmc4 is powered from a fixed 1.8 V regulator. Signed-off-by: Aapo Vienamo Reviewed-by: Mikko Perttunen Acked-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi b

[PATCH v3 30/38] arm64: dts: tegra210-p2180: Allow ldo2 to go down to 1.8 V

applies. Signed-off-by: Aapo Vienamo Reviewed-by: Mikko Perttunen Acked-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi | 11 +-- 1 file changed, 1 insertion(+), 10 deletions(-) diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi b/arch/arm64/boot/dts

[PATCH v3 35/38] arm64: dts: tegra210: Add SDHCI tap and trim values

Add SDHCI inbound and outbound SDHCI sampling trimmer values for Tegra210. Signed-off-by: Aapo Vienamo Acked-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 8 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot

[PATCH v3 37/38] arm64: dts: tegra186: Assign clocks for sdmmc1 and sdmmc4

Configure sdmmc4 parent clock to pllc4 and sdmmc1 to pllp_out0 by setting the assigned-clocks device tree properties. pllc4 offer better jitter performance and should be used with higher speed modes like HS200 and HS400. Signed-off-by: Aapo Vienamo Acked-by: Thierry Reding --- arch/arm64/boot

[PATCH v3 38/38] arm64: dts: tegra210: Assign clocks for sdmmc1 and sdmmc4

Use assigned-clock properties to configure pllc4 as the parent clock for sdmmc4 on Tegra210. pllc4 offers better jitter perfomance than the default pllp and is required by HS200 and HS400 modes. Signed-off-by: Aapo Vienamo Acked-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra210.dtsi

[PATCH v3 36/38] arm64: dts: tegra186: Add SDHCI tap and trim values

Add SDHCI inbound and outbound SDHCI sampling trimmer values for Tegra186. Signed-off-by: Aapo Vienamo Acked-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra186.dtsi | 8 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot

[PATCH v3 14/38] mmc: tegra: Power on the calibration pad

Automatic pad drive strength calibration is performed on a separate pad identical to the ones used for driving the actual bus. Power on the calibration pad during the calibration procedure and power it off afterwards to save power. Signed-off-by: Aapo Vienamo Reviewed-by: Mikko Perttunen Acked

Re: [PATCH 1/8] dt-bindings: mmc: Add DQS trim value to Tegra SDHCI

On Thu, 9 Aug 2018 13:36:09 +0200 Thierry Reding wrote: > On Tue, Aug 07, 2018 at 04:59:57PM +0300, Aapo Vienamo wrote: > > Document HS400 DQS trim value device tree property. > > > > Signed-off-by: Aapo Vienamo > > --- > > Documentation/devicetree/bindings

Re: [PATCH 5/8] arm64: dts: tegra186: Add SDMMC4 DQS trim value

On Thu, 9 Aug 2018 13:49:22 +0200 Thierry Reding wrote: > On Tue, Aug 07, 2018 at 05:00:01PM +0300, Aapo Vienamo wrote: > > Add the HS400 DQS trim value for Tegra186 SDMMC4. > > > > Signed-off-by: Aapo Vienamo > > --- > > arch/arm64/boot/dts/nvidia/tegra186.

Re: [PATCH 3/8] mmc: tegra: Implement HS400 enhanced strobe

On Thu, 9 Aug 2018 13:43:45 +0200 Thierry Reding wrote: > On Tue, Aug 07, 2018 at 04:59:59PM +0300, Aapo Vienamo wrote: > > Implement HS400 enhanced strobe. > > Can you provide a little more information about what the impact is of > this? Does this increase throughput? H

Re: [PATCH 4/8] mmc: tegra: Implement HS400 delay line calibration

On Thu, 9 Aug 2018 13:48:05 +0200 Thierry Reding wrote: > On Tue, Aug 07, 2018 at 05:00:00PM +0300, Aapo Vienamo wrote: > > Implement HS400 specific delay line calibration procedure. > > > > Signed-off-by: Aapo Vienamo > > --- > > dr

Re: [PATCH 5/8] arm64: dts: tegra186: Add SDMMC4 DQS trim value

On Thu, 9 Aug 2018 08:23:16 -0400 Peter Geis wrote: > On 08/09/2018 08:02 AM, Aapo Vienamo wrote: > > On Thu, 9 Aug 2018 13:49:22 +0200 > > Thierry Reding wrote: > > > >> On Tue, Aug 07, 2018 at 05:00:01PM +0300, Aapo Vienamo wrote: > >>> Add th

Re: [PATCH 10/40] soc/tegra: pmc: Implement pad configuration via pinctrl

On Thu, 9 Aug 2018 14:27:06 +0200 Thierry Reding wrote: > On Wed, Aug 01, 2018 at 07:32:00PM +0300, Aapo Vienamo wrote: > > Register a pinctrl device and implement get and set functions for > > PIN_CONFIG_LOW_POWER_MODE and PIN_CONFIG_POWER_SOURCE parameters. > > > >

Re: [PATCH 12/40] mmc: tegra: Reconfigure pad voltages during voltage switching

On Thu, 9 Aug 2018 14:43:46 +0200 Thierry Reding wrote: > On Wed, Aug 01, 2018 at 07:32:02PM +0300, Aapo Vienamo wrote: > > Parse the pinctrl state and nvidia,only-1-8-v properties from the device > > tree. Validate the pinctrl and regulator configuration before unmaskin

Re: [PATCH 13/40] mmc: tegra: Poll for calibration completion

On Thu, 9 Aug 2018 14:46:16 +0200 Thierry Reding wrote: > On Wed, Aug 01, 2018 at 07:32:03PM +0300, Aapo Vienamo wrote: > > Implement polling with 10 ms timeout for automatic pad drive strength > > calibration. > > > > Signed-off-by: Aapo Vienamo > > --- &g

Re: [PATCH 1/8] dt-bindings: mmc: Add DQS trim value to Tegra SDHCI

On Thu, 9 Aug 2018 15:46:48 +0200 Thierry Reding wrote: > On Thu, Aug 09, 2018 at 02:45:15PM +0300, Aapo Vienamo wrote: > > On Thu, 9 Aug 2018 13:36:09 +0200 > > Thierry Reding wrote: > > > > > On Tue, Aug 07, 2018 at 04:59:57PM +0300, Aapo Vienamo wrote: &

Re: [PATCH 01/40] dt-bindings: Add Tegra PMC pad configuration bindings

On Thu, 9 Aug 2018 14:13:50 +0200 Thierry Reding wrote: > On Wed, Aug 01, 2018 at 07:31:51PM +0300, Aapo Vienamo wrote: > > Document the PMC pinctrl bindings for pad power state and signaling > > voltage configuration. Both nvidia,tegra186-pmc.txt and > > nvidia,tegra20-pm

Re: [PATCH 02/40] dt-bindings: mmc: tegra: Add pad voltage control properties

On Thu, 9 Aug 2018 14:15:00 +0200 Thierry Reding wrote: > On Wed, Aug 01, 2018 at 07:31:52PM +0300, Aapo Vienamo wrote: > > Document the pinctrl bindings used by the SDHCI driver to reconfigure > > pad voltages on controllers supporting multiple voltage levels. > > &g

[PATCH v2 01/40] dt-bindings: Add Tegra PMC pad configuration bindings

-off-by: Aapo Vienamo Acked-by: Jon Hunter Reviewed-by: Rob Herring --- .../bindings/arm/tegra/nvidia,tegra186-pmc.txt | 93 +++ .../bindings/arm/tegra/nvidia,tegra20-pmc.txt | 103 + include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h | 18 3

[PATCH v2 00/40] Tegra SDHCI add support for HS200 and UHS signaling

k if pinctrl info invalid - Only call udelay(1) on enable in tegra_sdhci_configure_cal_pad() - Add nvidia, prefix to pad autocal offset dt props in the example See the original patch sets for earlier changelogs. Aapo Vienamo (40): dt-bindings: Add Tegra PMC pad configu

[PATCH v2 02/40] dt-bindings: mmc: tegra: Add pad voltage control properties

Document the pinctrl bindings used by the SDHCI driver to reconfigure pad voltages on controllers supporting multiple voltage levels. Signed-off-by: Aapo Vienamo Reviewed-by: Mikko Perttunen Reviewed-by: Rob Herring --- .../bindings/mmc/nvidia,tegra20-sdhci.txt | 22

[PATCH v2 03/40] dt-bindings: Add Tegra SDHCI pad pdpu offset bindings

Add bindings documentation for pad pull up and pull down offset values to be programmed before executing automatic pad drive strength calibration. Signed-off-by: Aapo Vienamo --- .../bindings/mmc/nvidia,tegra20-sdhci.txt | 35 ++ 1 file changed, 35 insertions

[PATCH v2 05/40] soc/tegra: pmc: Fix pad voltage configuration for Tegra186

Implement support for the PMC_IMPL_E_33V_PWR register which replaces PMC_PWR_DET register interface of the SoC generations preceding Tegra186. Also add the voltage bit offsets to the tegra186_io_pads[] table and the AO_HV pad. Signed-off-by: Aapo Vienamo Acked-by: Jon Hunter --- drivers/soc

[PATCH v2 07/40] soc/tegra: pmc: Implement tegra_io_pad_is_powered()

Implement a function to query whether a pad is in deep power down mode. This is needed by the pinctrl callbacks. Signed-off-by: Aapo Vienamo Acked-by: Jon Hunter --- drivers/soc/tegra/pmc.c | 15 +++ 1 file changed, 15 insertions(+) diff --git a/drivers/soc/tegra/pmc.c b/drivers

[PATCH v2 08/40] soc/tegra: pmc: Use X macro to generate IO pad tables

Refactor the IO pad tables into macro tables so that they can be reused to generate pinctrl pin descriptors. Also add a name field which is needed by pinctrl. Signed-off-by: Aapo Vienamo --- drivers/soc/tegra/pmc.c | 233 ++-- 1 file changed, 127

[PATCH v2 10/40] soc/tegra: pmc: Implement pad configuration via pinctrl

Register a pinctrl device and implement get and set functions for PIN_CONFIG_LOW_POWER_MODE and PIN_CONFIG_POWER_SOURCE parameters. Signed-off-by: Aapo Vienamo Acked-by: Jon Hunter --- drivers/soc/tegra/pmc.c | 187 +++- 1 file changed, 185

[PATCH v2 09/40] soc/tegra: pmc: Remove public pad voltage APIs

igned-off-by: Aapo Vienamo Acked-by: Jon Hunter --- drivers/soc/tegra/pmc.c | 17 - include/soc/tegra/pmc.h | 19 --- 2 files changed, 8 insertions(+), 28 deletions(-) diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c index 3b844b0..de6832d 100644

[PATCH v2 06/40] soc/tegra: pmc: Factor out DPD register bit calculation

Factor out the the code to calculate the correct DPD register and bit number for a given pad. This logic will be needed to query the status register. Signed-off-by: Aapo Vienamo Acked-by: Jon Hunter --- drivers/soc/tegra/pmc.c | 20 +--- 1 file changed, 17 insertions(+), 3

[PATCH v2 04/40] dt-bindings: mmc: Add Tegra SDHCI sampling trimmer values

Document the Tegra SDHCI inbound and outbound sampling trimmer values. Signed-off-by: Aapo Vienamo --- .../devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt | 11 +++ 1 file changed, 11 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt b

[PATCH v2 12/40] mmc: tegra: Reconfigure pad voltages during voltage switching

for Tegra210 and Tegra186. The pad configuration is done in the mmc callback because the order of pad reconfiguration and sdhci voltage switch depend on the voltage to which the transition occurs. Signed-off-by: Aapo Vienamo --- drivers/mmc/host/sdhci-tegra.c | 136

[PATCH v2 16/40] mmc: tegra: Disable card clock during pad calibration

Disable the card clock during automatic pad drive strength calibration and re-enable it afterwards. Signed-off-by: Aapo Vienamo --- drivers/mmc/host/sdhci-tegra.c | 26 ++ 1 file changed, 26 insertions(+) diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host

[PATCH v2 14/40] mmc: tegra: Set calibration pad voltage reference

Configure the voltage reference used by the automatic pad drive strength calibration procedure. The value is a magic number from the TRM. Signed-off-by: Aapo Vienamo --- drivers/mmc/host/sdhci-tegra.c | 56 +- 1 file changed, 33 insertions(+), 23

[PATCH v2 20/40] mmc: tegra: Add a workaround for tap value change glitch

Add quirk to disable the card clock during configuration of the tap value in tegra_sdhci_set_tap() and issue sdhci_reset() after value change. This is a workaround to avoid propagation of a potential glitch caused by setting the tap value. Signed-off-by: Aapo Vienamo --- drivers/mmc/host/sdhci

[PATCH v2 19/40] mmc: tegra: Enable pad calibration on Tegra210 and Tegra186

Set NVQUIRK_HAS_PADCALIB on Tegra210 and Tegra186 to enable automatic pad drive strength calibration. Signed-off-by: Aapo Vienamo --- drivers/mmc/host/sdhci-tegra.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci

[PATCH v2 13/40] mmc: tegra: Poll for calibration completion

Implement polling with 10 ms timeout for automatic pad drive strength calibration. Signed-off-by: Aapo Vienamo --- drivers/mmc/host/sdhci-tegra.c | 22 +- 1 file changed, 17 insertions(+), 5 deletions(-) diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci

[PATCH v2 11/40] mmc: sdhci: Add a quirk to skip clearing the transfer mode register on tuning

Add SDHCI_QUIRK2_TUNE_SKIP_XFERRMODE_REG_PROG to skip programming the SDHCI_TRANSFER_MODE in sdhci_set_transfer_mode() if tuning command is being sent. On Tegra210 and Tegra186 the tuning sequence hangs if the SDHCI transfer mode register is touched. Signed-off-by: Aapo Vienamo --- drivers/mmc

[PATCH v2 15/40] mmc: tegra: Power on the calibration pad

Automatic pad drive strength calibration is performed on a separate pad identical to the ones used for driving the actual bus. Power on the calibration pad during the calibration procedure and power it off afterwards to save power. Signed-off-by: Aapo Vienamo Reviewed-by: Mikko Perttunen

[PATCH v2 21/40] mmc: tegra: Parse default trim and tap from dt

Parse the default inbound and outbound sampling trimmer values from the device tree. Signed-off-by: Aapo Vienamo --- drivers/mmc/host/sdhci-tegra.c | 22 ++ 1 file changed, 22 insertions(+) diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c index

[PATCH v2 22/40] mmc: tegra: Configure default tap values

Set the default inbound timing adjustment tap value on reset and on non-tunable modes. The default tap value is not programmed on tunable modes because the tuning sequence is used instead to determine the tap value. Signed-off-by: Aapo Vienamo --- drivers/mmc/host/sdhci-tegra.c | 132

[PATCH v2 17/40] mmc: tegra: Program pad autocal offsets from dt

Parse the pad drive strength calibration offsets from the device tree. Program the calibration offsets in accordance with the current signaling mode. Signed-off-by: Aapo Vienamo --- drivers/mmc/host/sdhci-tegra.c | 152 - 1 file changed, 151 insertions

[PATCH v2 18/40] mmc: tegra: Perform pad calibration after voltage switch

Run the automatic pad calibration after voltage switching if tegra_host->pad_calib_required is set. Signed-off-by: Aapo Vienamo --- drivers/mmc/host/sdhci-tegra.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c in

[PATCH v2 24/40] mmc: tegra: Use standard SDHCI tuning on Tegra210 and Tegra186

Add a new sdhci_ops struct for Tegra210 and Tegra186 which doesn't set the custom tuning callback used on previous SoC generations. Signed-off-by: Aapo Vienamo --- drivers/mmc/host/sdhci-tegra.c | 17 +++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/driver

[PATCH v2 28/40] mmc: tegra: Enable UHS and HS200 modes for Tegra210

Set nvquirks to enable higher speed modes. Signed-off-by: Aapo Vienamo --- drivers/mmc/host/sdhci-tegra.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c index 0959102..8cfa8f4 100644 --- a/drivers/mmc/host

[PATCH v2 23/40] mmc: tegra: Configure default trim value on reset

Program the outbound sampling trim value in tegra_sdhci_reset(). Unlike the outbound tap value this does not depend on the signaling mode and needs to be only programmed once. Signed-off-by: Aapo Vienamo --- drivers/mmc/host/sdhci-tegra.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion

[PATCH v2 27/40] mmc: tegra: Set SDHCI_QUIRK2_TUNE_DIS_CARD_CLK on Tegra210

This prevents a possible hardware hang during tuning. Signed-off-by: Aapo Vienamo --- drivers/mmc/host/sdhci-tegra.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c index 3a53593..0959102 100644 --- a/drivers

[PATCH v2 31/40] arm64: dts: Add Tegra186 sdmmc pinctrl voltage states

Add pad voltage configuration nodes for sdmmc pads with configurable voltages on Tegra186. Signed-off-by: Aapo Vienamo Reviewed-by: Mikko Perttunen --- arch/arm64/boot/dts/nvidia/tegra186.dtsi | 40 1 file changed, 40 insertions(+) diff --git a/arch/arm64/boot

[PATCH v2 32/40] arm64: dts: tegra210-p2180: Allow ldo2 to go down to 1.8 V

applies. Signed-off-by: Aapo Vienamo Reviewed-by: Mikko Perttunen --- arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi | 11 +-- 1 file changed, 1 insertion(+), 10 deletions(-) diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi

[PATCH v2 34/40] arm64: dts: tegra210-p2597: Remove no-1-8-v from sdmmc1

Allow sdmmc1 to set the signaling voltage to 1.8 V in order to support faster signaling modes. Signed-off-by: Aapo Vienamo --- arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi b/arch/arm64/boot/dts

[PATCH v2 29/40] mmc: tegra: Enable UHS and HS200 modes for Tegra186

Set nvquirks to enable higher speed modes. Signed-off-by: Aapo Vienamo --- drivers/mmc/host/sdhci-tegra.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c index 8cfa8f4..2d775ad 100644 --- a/drivers/mmc/host

[PATCH v2 36/40] arm64: dts: tegra210: Add sdmmc pad auto calibration offsets

Add the calibration offset properties used for automatic pad drive strength calibration. Signed-off-by: Aapo Vienamo --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 12 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts

[PATCH v2 26/40] mmc: tegra: Enable workaround for tuning transfer mode bug

Set SDHCI_QUIRK2_TUNE_SKIP_XFERMODE_REG_PROG on Tegra210 and Tegra186. This prevents the controller from hanging during tuning. This bug does not seem to be documented but it's handled in a similar way in the downstream kernel. Signed-off-by: Aapo Vienamo --- drivers/mmc/host/sdhci-tegra.

[PATCH v2 35/40] arm64: dts: tegra186: Add sdmmc pad auto calibration offsets

Add the calibration offset properties used for automatic pad drive strength calibration. Signed-off-by: Aapo Vienamo --- arch/arm64/boot/dts/nvidia/tegra186.dtsi | 20 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot

[PATCH v2 25/40] mmc: sdhci: Add a quirk to disable card clock during tuning

. Signed-off-by: Aapo Vienamo --- drivers/mmc/host/sdhci.c | 15 +++ drivers/mmc/host/sdhci.h | 2 ++ 2 files changed, 17 insertions(+) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 04dc443..166b16f 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host

[PATCH v2 39/40] arm64: dts: tegra186: Assign clocks for sdmmc1 and sdmmc4

Configure sdmmc4 parent clock to pllc4 and sdmmc1 to pllp_out0 by setting the assigned-clocks device tree properties. pllc4 offer better jitter performance and should be used with higher speed modes like HS200 and HS400. Signed-off-by: Aapo Vienamo --- arch/arm64/boot/dts/nvidia/tegra186.dtsi

[PATCH v2 40/40] arm64: dts: tegra210: Assign clocks for sdmmc1 and sdmmc4

Use assigned-clock properties to configure pllc4 as the parent clock for sdmmc4 on Tegra210. pllc4 offers better jitter perfomance than the default pllp and is required by HS200 and HS400 modes. Signed-off-by: Aapo Vienamo --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 8 1 file

[PATCH v2 38/40] arm64: dts: tegra186: Add SDHCI tap and trim values

Add SDHCI inbound and outbound SDHCI sampling trimmer values for Tegra186. Signed-off-by: Aapo Vienamo --- arch/arm64/boot/dts/nvidia/tegra186.dtsi | 8 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi

  1   2   3   4   >