trivial question regarding byte ordering

Hi, Is there a API (or macro) that checks CPU endianness and does byte ordering conversion on given data (32-bit) if endianness is big-endian? Thank you in advance for your comment. Regards, Allexio - To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a

Re: trivial question regarding byte ordering

On 2/23/07, Robert P. J. Day [EMAIL PROTECTED] wrote: #include asm/byteorder.h each architecture is responsible for including the appropriate header file for either big or little endianness. Thank you for answer, Robert. Allexio - To unsubscribe from this list: send the line unsubscribe

Re: trivial question regarding byte ordering

On 2/23/07, Frederik Deweerdt [EMAIL PROTECTED] wrote: including include/asm/byteorder.h will define the needed cpu_to_{b,l}e{16,32,64} and {b,l}e{16,32,64}_to_cpu macros. Great, Thank you for your answer. Regards, Allexio - To unsubscribe from this list: send the line unsubscribe

description on KEYs in .config file

Hi, Where can I get detail description on each KEYs in .config file? I'm trying to understand what are the meaning of those before turn thme on/off. Thanks in advance. Allexio - To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to [EMAIL PROTECTED]

Questions on PCI express AER support in HBA driver

Hi, I've got some questions on supporting PCI Express AER in Linux HBA drivers. BTW, I'm developing SCSI HBA driver. What are the expected changes on SCSI LLD driver in regards to PCIE AER supporting? I understood that the driver need to call following API during probing, --- if

Re: Questions on PCI express AER support in HBA driver

What are the expected changes on SCSI LLD driver in regards to PCIE AER supporting? I understood that the driver need to call following APIs during probing to enable AER support for the device, --- if (pci_find_aer_capability(dev)) { pci_enable_pcie_error_reporting(dev); } --- What else does

description on KEYs in .config file

Hi, Where can I get detail description on each KEYs in .config file? I'm trying to understand what are the meaning of those before turn thme on/off. Thanks in advance. Allexio - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL

trivial question regarding byte ordering

Hi, Is there a API (or macro) that checks CPU endianness and does byte ordering conversion on given data (32-bit) if endianness is big-endian? Thank you in advance for your comment. Regards, Allexio - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a

Re: trivial question regarding byte ordering

On 2/23/07, Robert P. J. Day <[EMAIL PROTECTED]> wrote: #include each architecture is responsible for including the appropriate header file for either big or little endianness. Thank you for answer, Robert. Allexio - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in

Re: trivial question regarding byte ordering

On 2/23/07, Frederik Deweerdt <[EMAIL PROTECTED]> wrote: including include/asm/byteorder.h will define the needed cpu_to_{b,l}e{16,32,64} and {b,l}e{16,32,64}_to_cpu macros. Great, Thank you for your answer. Regards, Allexio - To unsubscribe from this list: send the line "unsubscribe

Questions on PCI express AER support in HBA driver

Hi, I've got some questions on supporting PCI Express AER in Linux HBA drivers. BTW, I'm developing SCSI HBA driver. What are the expected changes on SCSI LLD driver in regards to PCIE AER supporting? I understood that the driver need to call following API during probing, --- if

Re: Questions on PCI express AER support in HBA driver

What are the expected changes on SCSI LLD driver in regards to PCIE AER supporting? I understood that the driver need to call following APIs during probing to enable AER support for the device, --- if (pci_find_aer_capability(dev)) { pci_enable_pcie_error_reporting(dev); } --- What else does