On Mon, 2016-09-12 at 15:33 +0800, wei.guo.si...@gmail.com wrote:
> From: Anshuman Khandual
>
> This patch adds SPR number for TAR, PPR, DSCR special
> purpose registers. It also adds TM, VSX, VMX related
> instructions which will then be used by patches later
> in the series.
>
> Signed-off-by:
On Mon, 2016-09-12 at 15:33 +0800, wei.guo.si...@gmail.com wrote:
> From: Anshuman Khandual
>
> This patch adds ptrace interface test for GPR/FPR registers
> inside TM context. This adds ptrace interface based helper
> functions related to checkpointed GPR/FPR access.
>
> Signed-off-by: Anshuman
On Mon, 2016-09-12 at 15:33 +0800, wei.guo.si...@gmail.com wrote:
> From: Anshuman Khandual
>
> This patch adds ptrace interface test for GPR/FPR registers.
> This adds ptrace interface based helper functions related to
> GPR/FPR access and some assembly helper functions related to
> GPR/FPR regi
On Mon, 2016-09-12 at 15:33 +0800, wei.guo.si...@gmail.com wrote:
> From: Anshuman Khandual
>
> This patch adds ptrace interface test for TAR, PPR, DSCR
> registers. This also adds ptrace interface based helper
> functions related to TAR, PPR, DSCR register access.
>
> Signed-off-by: Anshuman Kh
f-by: Anshuman Khandual
> Signed-off-by: Simon Guo
Reviewed-by: Cyril Bur
> ---
> tools/testing/selftests/powerpc/context_switch/cp_abort.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git
> a/tools/testing/selftests/powerpc/context_switch/cp_abort
On Mon, 2016-09-12 at 15:33 +0800, wei.guo.si...@gmail.com wrote:
> From: Anshuman Khandual
>
> This patch adds ptrace interface test for TM SPR registers. This
> also adds ptrace interface based helper functions related to TM
> SPR registers access.
>
I'm seeing this one fail a lot, it does oc
On Wed, 2017-06-21 at 13:36 +0530, Shilpasri G Bhat wrote:
> In P9, OCC (On-Chip-Controller) supports shared memory based
> commad-response interface. Within the shared memory there is an OPAL
> command buffer and OCC response buffer that can be used to send
> inband commands to OCC. This patch add
On Thu, 2017-06-22 at 09:57 +0530, Shilpasri G Bhat wrote:
> Hi Cyril,
>
> On 06/22/2017 06:28 AM, Cyril Bur wrote:
> > On Wed, 2017-06-21 at 13:36 +0530, Shilpasri G Bhat wrote:
> > > In P9, OCC (On-Chip-Controller) supports shared memory based
> > > commad-resp
On Mon, 2015-01-05 at 11:50 -0500, Don Zickus wrote:
> cc'ing Marcelo
>
> On Mon, Dec 22, 2014 at 04:06:02PM +1100, Cyril Bur wrote:
> > When the hypervisor pauses a virtualised kernel the kernel will observe a
> > jump
> > in timebase, this can cause spuri
cc'd Martin Schwidefsky and Heiko Carstens.
On Mon, 2015-01-05 at 14:10 -0800, Andrew Morton wrote:
> On Mon, 22 Dec 2014 16:06:04 +1100 Cyril Bur wrote:
>
> > On POWER8 virtualised kernels the VTB register can be read to have a view of
> > time that only increases whi
On Mon, 2015-01-05 at 14:09 -0800, Andrew Morton wrote:
> On Mon, 22 Dec 2014 16:06:02 +1100 Cyril Bur wrote:
>
> > When the hypervisor pauses a virtualised kernel the kernel will observe a
> > jump
> > in timebase, this can cause spurious messages from the softlockup d
On Tue, 2015-01-06 at 10:01 -0500, Don Zickus wrote:
> On Tue, Jan 06, 2015 at 10:53:35AM +1100, Cyril Bur wrote:
> > On Mon, 2015-01-05 at 11:50 -0500, Don Zickus wrote:
> > > cc'ing Marcelo
> > >
> > > On Mon, Dec 22, 2014 at 04:06:02PM +1100, Cyr
On Wed, 2015-01-07 at 11:20 +0100, Martin Schwidefsky wrote:
> On Tue, 06 Jan 2015 13:44:01 +1100
> Cyril Bur wrote:
>
> > On Mon, 2015-01-05 at 14:10 -0800, Andrew Morton wrote:
> > > On Mon, 22 Dec 2014 16:06:04 +1100 Cyril Bur wrote:
> > >
> > &g
optimised the non lpar + vtb cases.
Replaced the use of sched_clock_with local_clock it was used originally
in
the softlockup detector.
Cyril Bur (2):
Add another clock for use with the soft lockup watchdog.
powerpc: add running_clock for powerpc to prevent spurious softlockup
warnings
executing, the approxmation is fine as host kernels won't
observe any stolen time.
Signed-off-by: Cyril Bur
---
V2:
Replaced the use of sched_clock_with local_clock it was used originally in
the softlockup detector.
Added #ifdef CONFIG_PPC_PSERIES and optimised the non lpar + vtb
This permits the use of arch specific clocks for which virtualised kernels can
use their notion of 'running' time, not the elpased wall time which will
include host execution time.
Signed-off-by: Cyril Bur
---
V2:
Remove the export of running_clock
Use local_clock instead of sche
This permits the use of arch specific clocks for which virtualised kernels can
use their notion of 'running' time, not the elpased wall time which will
include host execution time.
Signed-off-by: Cyril Bur
---
include/linux/sched.h | 1 +
kernel/sched/clock.c | 14
executing. sched_clock is returned in this case.
Signed-off-by: Cyril Bur
---
arch/powerpc/kernel/time.c | 24
1 file changed, 24 insertions(+)
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index 7505599..839aeae 100644
--- a/arch/powerpc/kernel
trace in the
guest has nothing to do with the observed problem and can only be misleading.
Futhermore, on POWER8 this is completely avoidable with the introduction of
the Virtual Time Base (VTB) register.
Cyril Bur (2):
Add another clock for use with the soft lockup watchdog.
powerpc: add
trace in the
guest has nothing to do with the observed problem and can only be misleading.
Futhermore, on POWER8 this is completely avoidable with the introduction of
the Virtual Time Base (VTB) register.
Cyril Bur (2):
Add another clock for use with the soft lockup watchdog.
powerpc: add
executing. sched_clock is returned in this case.
Signed-off-by: Cyril Bur
---
arch/powerpc/kernel/time.c | 24
1 file changed, 24 insertions(+)
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index fa7c4f1..9ba13ec 100644
--- a/arch/powerpc/kernel
This permits the use of arch specific clocks for which virtualised kernels can
use their notion of 'running' time, not the elpased wall time which will
include host execution time.
Signed-off-by: Cyril Bur
---
include/linux/sched.h | 1 +
kernel/sched/clock.c | 14
On Wed, 2015-02-04 at 11:42 +0100, Paul Bolle wrote:
> On Fri, 2015-01-09 at 14:34 +1100, Cyril Bur wrote:
> > On POWER8 virtualised kernels the VTB register can be read to have a view of
> > time that only increases while the guest is running. This will prevent
> > guests
Hi Andrew,
Could you please pick these patches up through your tree?
Thanks,
Cyril
On Fri, 2015-01-09 at 14:34 +1100, Cyril Bur wrote:
> When the hypervisor pauses a virtualised kernel the kernel will observe a jump
> in timebase, this can cause spurious messages from the softlockup de
On Wed, 2016-10-26 at 16:52 +1100, Michael Ellerman wrote:
> Cyril Bur writes:
>
> > On Wed, 2016-10-05 at 07:57 +0200, Valentin Rothberg wrote:
> > > s/ALIVEC/ALTIVEC/
> > >
> >
> > Oops, nice catch
> >
> > > Signed-off-by: Valentin R
On Wed, 2016-10-05 at 07:57 +0200, Valentin Rothberg wrote:
> s/ALIVEC/ALTIVEC/
>
Oops, nice catch
> Signed-off-by: Valentin Rothberg
Reviewed-by: Cyril Bur
> ---
> arch/powerpc/kernel/process.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --g
type 'unsigned int', but argument 3 has type 'phys_addr_t
{aka long long unsigned int}' [-Wformat=]
dev_info(dev, "Loaded at 0x%08x (0x%08x)\n",
Signed-off-by: Cyril Bur
---
drivers/misc/aspeed-lpc-ctrl.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletion
#x27; [-Wformat=] dev_info(dev,
"Loaded at %pap (0x%08x)\n",
Reported-by: Stephen Rothwell
Signed-off-by: Cyril Bur
---
drivers/misc/aspeed-lpc-ctrl.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/misc/aspeed-lpc-ctrl.c b/drivers/misc/aspeed-lpc-ctrl.c
On Tue, 2017-03-21 at 11:18 +1100, Benjamin Herrenschmidt wrote:
> On Mon, 2017-03-20 at 13:23 +0100, Arnd Bergmann wrote:
> > On Mon, Mar 20, 2017 at 3:44 AM, Stephen Rothwell
> > wrote:
> > > Hi all,
> > >
> > > After merging the char-misc tree, today's linux-next build (x86_64
> > > allmodcon
On Wed, 2017-02-22 at 16:11 +1100, Suraj Jitindar Singh wrote:
> On Fri, 2017-02-17 at 14:28 +1100, Cyril Bur wrote:
>
> I may be too late, but see below...
> > In order to manage server systems, there is typically another
> > processor
> > known as a BMC (Baseboard M
agment the accessible space rather than simply
moving 'zero' upwards. This is caused by the nature of HICR8 being a
mask and the way host LPC addresses are translated.
Signed-off-by: Cyril Bur
---
v2:
Removed unused functions
Removed use of access_ok()
All input is evil
Rewor
agment the accessible space rather than simply
moving 'zero' upwards. This is caused by the nature of HICR8 being a
mask and the way host LPC addresses are translated.
Signed-off-by: Cyril Bur
---
v2:
Removed unused functions
Removed use of access_ok()
All input is evil
Rewor
This provides access to the mbox registers on the ast2400 and ast2500
SoCs.
This driver allows arbitrary reads and writes to the 16 data registers as
the other end may have configured the mbox hardware to provide an
interrupt when a specific register gets written to.
Signed-off-by: Cyril Bur
agment the accessible space rather than simply
moving 'zero' upwards. This is caused by the nature of HICR8 being a
mask and the way host LPC addresses are translated.
Signed-off-by: Cyril Bur
---
v2:
Removed unused functions
Removed use of access_ok()
On Tue, 16 Feb 2016 14:29:32 +0530
Anshuman Khandual wrote:
> This patch creates a function flush_tmregs_to_thread which
> will then be used by subsequent patches in this series. The
> function checks for self tracing ptrace interface attempts
> while in the TM context and logs appropriate warnin
On Tue, 16 Feb 2016 14:29:47 +0530
Anshuman Khandual wrote:
> This patch adds ptrace interface test for EBB specific
> registers. This also adds some generic ptrace interface
> based helper functions to be used by other patches later
> on in the series.
>
> Signed-off-by: Anshuman Khandual
> --
On Tue, 16 Feb 2016 14:29:48 +0530
Anshuman Khandual wrote:
> This patch adds ptrace interface test for GPR/FPR registers.
> This adds ptrace interface based helper functions related to
> GPR/FPR access and some assembly helper functions related to
> GPR/FPR registers.
>
I wonder if with a bit
On Wed, 02 Mar 2016 09:59:06 +0530
Anshuman Khandual wrote:
> On 03/02/2016 05:45 AM, Cyril Bur wrote:
> > On Tue, 16 Feb 2016 14:29:32 +0530
> > Anshuman Khandual wrote:
> >
> >> This patch creates a function flush_tmregs_to_thread which
> >> will the
the OCC works or
anything so I would be best if there were other eyes on this.
Provided zero is an ok request_id:
Reviewed-by: Cyril Bur
> Signed-off-by: Shilpasri G Bhat
> ---
> The skiboot patch for the interface is posted here:
> https://lists.ozlabs.org/pipermail/skiboot/20
ocks.
>
> Tested-by: Lei YU
> Reviewed-by: Andrew Jeffery
> Signed-off-by: Joel Stanley
Reviewed-by: Cyril Bur
> ---
> drivers/misc/aspeed-lpc-ctrl.c | 26 +++---
> 1 file changed, 23 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/m
FWH cycles from when
> the user first configures the address to map. We chose to do this then
> as before that time there is no way for the kernel to know where it is
> safe to point the LPC window.
>
> Tested-by: Lei YU
> Reviewed-by: Andrew Jeffery
> Signed-off-by: J
ucture and it seems a bit
heavyweight for what this ultimately very simple driver is doing.
If you would be so kind as to let me know which direction to take.
Thanks,
Cyril
On Wed, 2017-02-08 at 10:36 +1100, Cyril Bur wrote:
> This provides access to the mbox registers on the ast2400 and ast2
On Mon, 2017-09-04 at 20:13 +0530, Jassi Brar wrote:
> On Mon, Sep 4, 2017 at 12:47 PM, Cyril Bur wrote:
> > Hi,
> >
> > I haven't heard anything about this driver. I'm trying to interpret if
> > the silence is because there is something fundamentally wrong
On Tue, 2017-09-05 at 08:25 +0200, Greg KH wrote:
> On Tue, Sep 05, 2017 at 09:37:19AM +1000, Cyril Bur wrote:
> > On Mon, 2017-09-04 at 20:13 +0530, Jassi Brar wrote:
> > > On Mon, Sep 4, 2017 at 12:47 PM, Cyril Bur wrote:
> > > > Hi,
> > > >
> >
ugh in regex; marked by <-- HERE in
m/^(\+.*(?:do|\))){ <-- HERE / at scripts/checkpatch.pl line 4374.
It seems perfectly reasonable to do as the warning suggests and simply
escape the left brace in these three locations.
Signed-off-by: Cyril Bur
---
scripts/checkpatch.pl | 6 +++---
On Tue, 2017-06-13 at 23:26 +0530, Shilpasri G Bhat wrote:
> In P9, OCC (On-Chip-Controller) supports shared memory based
> commad-response interface. Within the shared memory there is an OPAL
> command buffer and OCC response buffer that can be used to send
> inband commands to OCC. This patch add
On Mon, 2017-06-05 at 11:43 +0530, Shilpasri G Bhat wrote:
> In P9, OCC (On-Chip-Controller) supports shared memory based
> commad-response interface. Within the shared memory there is an OPAL
> command buffer and OCC response buffer that can be used to send
> inband commands to OCC. This patch add
On Mon, 2017-07-31 at 07:54 +0530, Shilpasri G Bhat wrote:
> Adds a generic powercap framework to change the system powercap
> inband through OPAL-OCC command/response interface.
>
> Signed-off-by: Shilpasri G Bhat
> ---
> Changes from V8:
> - Use __pa() while passing pointer in opal call
> - Use
On Mon, 2017-06-19 at 11:44 +0530, Shilpasri G Bhat wrote:
> In P9, OCC (On-Chip-Controller) supports shared memory based
> commad-response interface. Within the shared memory there is an OPAL
> command buffer and OCC response buffer that can be used to send
> inband commands to OCC. This patch add
On Wed, 2017-07-26 at 10:35 +0530, Shilpasri G Bhat wrote:
> Adds a generic powercap framework to change the system powercap
> inband through OPAL-OCC command/response interface.
>
> Signed-off-by: Shilpasri G Bhat
> ---
> Changes from V7:
> - Replaced sscanf with kstrtoint
>
> arch/powerpc/inc
On Wed, 2017-07-26 at 10:35 +0530, Shilpasri G Bhat wrote:
> This patch adds support to set power-shifting-ratio for CPU-GPU which
> is used by OCC power capping algorithm.
>
> Signed-off-by: Shilpasri G Bhat
Hi Shilpasri,
I started looking though this - a lot the comments to patch 1/3 apply
h
On Wed, 2017-07-26 at 10:35 +0530, Shilpasri G Bhat wrote:
> Adds support for clearing different sensor groups. OCC inband sensor
> groups like CSM, Profiler, Job Scheduler can be cleared using this
> driver. The min/max of all sensors belonging to these sensor groups
> will be cleared.
>
Hi Shil
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