ing the regulators init part in order to use
the power on defaults for regulators and maybe also clocks.
> On Fri, Sep 27, 2013 at 9:57 AM, Georgi Djakov wrote:
>> ...
>> +static irqreturn_t sdhci_msm_pwr_irq(int irq, void *data)
>> +{
>> + struct sdhci_msm_h
This platform driver adds the support of Secure Digital Host Controller
Interface compliant controller found in Qualcomm MSM chipsets.
CC: Asutosh Das
CC: Venkat Gopalakrishnan
CC: Sahitya Tummala
CC: Subhash Jadavani
Signed-off-by: Georgi Djakov
---
Changes from v4:
- Simplified
Hi Stan,
Thank you for the detailed review on this patch.
On 09/17/2013 05:55 PM, Stanimir Varbanov wrote:
Hi Georgi,
Thanks for the patch.
I have some commnets below.
On 09/16/2013 05:23 PM, Georgi Djakov wrote:
This platform driver adds the support of Secure Digital Host Controller
Hi Jaehoon,
On 08/27/2013 11:55 AM, Jaehoon Chung wrote:
Hi Georgi,
I found the sdhci_msm_vreg_reset(). Why do you run enable->disable?
+/*
+ * Reset vreg by ensuring it is off during probe. A call
+ * to enable vreg is needed to balance disable vreg
+ */
+static int sdhci_msm_vreg_reset(struc
Hi Ivan,
On 08/23/2013 10:34 AM, Ivan T. Ivanov wrote:
Hi Georgi,
On Tue, 2013-08-20 at 19:44 +0300, Georgi Djakov wrote:
This platform driver adds the support of Secure Digital Host
Controller Interface compliant controller in MSM chipsets.
CC: Asutosh Das
CC: Venkat Gopalakrishnan
CC
This platform driver adds the support of Secure Digital Host Controller
Interface compliant controller found in Qualcomm MSM chipsets.
CC: Asutosh Das
CC: Venkat Gopalakrishnan
CC: Sahitya Tummala
CC: Subhash Jadavani
Signed-off-by: Georgi Djakov
---
Changes from v3:
- Allocate memory for
changes
Georgi Djakov (2):
mmc: sdhci-msm: Initial SDHCI MSM driver documentation
mmc: sdhci-msm: Initial support for MSM chipsets
.../devicetree/bindings/mmc/sdhci-msm.txt | 70 +++
drivers/mmc/host/Kconfig | 13 +
drivers/mmc/host/Makefile
This platform driver adds the initial support of Secure
Digital Host Controller Interface compliant controller
found in Qualcomm MSM chipsets.
CC: Asutosh Das
CC: Venkat Gopalakrishnan
CC: Sahitya Tummala
CC: Subhash Jadavani
Signed-off-by: Georgi Djakov
---
drivers/mmc/host/Kconfig
This patch adds documentation for Qualcomm SDHCI MSM driver.
It contains the differences between the core properties in mmc.txt and
the properties used by the sdhci-msm driver.
Signed-off-by: Georgi Djakov
---
.../devicetree/bindings/mmc/sdhci-msm.txt | 70
1
large timeout values for R1B commands.
Patches are based on v3.11-rc5.
Georgi Djakov (5):
mmc: sdhci: add quirk for R/W Transfer Active EOT
mmc: sdhci: add quirk for slow interrupt clearance
mmc: sdhci: add quirk to ignore CMD CRC err for tuning commands
mmc: sdhci: add quirk for max_discard
.
CC: Sahitya Tummala
Signed-off-by: Georgi Djakov
---
drivers/mmc/host/sdhci.c | 20
include/linux/mmc/sdhci.h |2 ++
2 files changed, 22 insertions(+)
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index d3c9e59..39544b4 100644
--- a/drivers/mmc/host/sd
This patch adds a quirk to ignore data timeout error for R1B commands
as there will be no data associated and the busy timeout value for these
commands could be larger than the maximum timeout value that controller
can handle.
CC: Sahitya Tummala
Signed-off-by: Georgi Djakov
---
drivers/mmc
when operating at
initialization frequency(400KHz).
CC: Venkat Gopalakrishnan
CC: Asutosh Das
CC: Sahitya Tummala
Signed-off-by: Georgi Djakov
---
drivers/mmc/host/sdhci.c |6 ++
include/linux/mmc/sdhci.h |2 ++
2 files changed, 8 insertions(+)
diff --git a/drivers/mmc/host
kind of operations are very slow.
Add quirk so that the SDHCI host can use the default max_discard value.
CC: Krishna Konda
Signed-off-by: Georgi Djakov
---
drivers/mmc/host/sdhci.c |3 ++-
include/linux/mmc/sdhci.h |4
2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a
in Software Reset
Register (Bit 2).
CC: Venkat Gopalakrishnan
CC: Asutosh Das
CC: Sahitya Tummala
Signed-off-by: Georgi Djakov
---
drivers/mmc/host/sdhci.c |3 +++
include/linux/mmc/sdhci.h |2 ++
2 files changed, 5 insertions(+)
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc
Hi Ivan,
On 08/15/2013 10:22 AM, Ivan T. Ivanov wrote:
Hi Georgi,
I have several comments below.
Shouldn't we add required clocks here? It looks that some of them
are optional and others mandatory.
Yes, there are various clocks for MMC, SD/SDIO and at least 400mhz must
be provided for
nk better that use this
function.
Is there a special reason that use the "vreg->is_enabled"?
Best Regards,
Jaehoon Chung
On 08/13/2013 11:06 PM, Georgi Djakov wrote:
This platform driver adds the support of Secure Digital Host
Controller Interface compliant controller in MSM chipset
This platform driver adds the support of Secure Digital Host
Controller Interface compliant controller in MSM chipsets.
CC: Asutosh Das
CC: Venkat Gopalakrishnan
CC: Sahitya Tummala
CC: Subhash Jadavani
Signed-off-by: Georgi Djakov
---
This is an initial version of the Qualcomm MSM SDHCI
On 07/31/2013 03:19 AM, Bjorn Andersson wrote:
On Tue, Jul 30, 2013 at 8:22 AM, Georgi Djakov wrote:
This platform driver adds the support of Secure Digital Host
Controller Interface compliant controller in MSM chipsets.
[snip]
+
+ sdhc_1: qcom,sdhc@f9824900 {
+ compatible
This platform driver adds the support of Secure Digital Host
Controller Interface compliant controller in MSM chipsets.
CC: Asutosh Das
CC: Venkat Gopalakrishnan
CC: Sahitya Tummala
CC: Subhash Jadavani
Signed-off-by: Georgi Djakov
---
Changes from v2:
- Added DT bindings for clocks
- Moved
This platform driver adds the support of Secure Digital Host
Controller Interface compliant controller in MSM chipsets.
CC: Asutosh Das
CC: Venkat Gopalakrishnan
CC: Sahitya Tummala
CC: Subhash Jadavani
Signed-off-by: Georgi Djakov
---
Changes from v1:
- GPIO references are replaced by
On 07/20/2016 01:15 PM, Adrian Hunter wrote:
> On 19/07/16 17:52, Georgi Djakov wrote:
>> From: Ritesh Harjani
>>
>> To allow UHS mode to work properly, we need to implement a Qualcomm
>> specific set_uhs_signaling() callback function. This function differs
>>
Add support for hardware that can switch both parent clocks and divider
at the same time. This avoids generating intermediate frequencies from
either the old parent clock and new divider or new parent clock and
old divider combinations.
Signed-off-by: Georgi Djakov
---
drivers/clk/qcom/Makefile
already applied.
* Add gpll0_vote rate propagation patch.
* Update/rebase patches to the current clk-next.
Georgi Djakov (3):
clk: qcom: Add A53 PLL support
clk: qcom: Add regmap mux-div clocks support
clk: qcom: Add A53 clock driver
.../devicetree/bindings/clock/qcom,a53-pll.txt | 18
Add support for the PLL, which generates the higher range of CPU
frequencies on MSM8916 platforms.
Signed-off-by: Georgi Djakov
---
.../devicetree/bindings/clock/qcom,a53-pll.txt | 18 +
drivers/clk/qcom/Kconfig | 9 +++
drivers/clk/qcom/Makefile
CPU frequency scaling on platforms like
MSM8916.
Signed-off-by: Georgi Djakov
---
.../devicetree/bindings/clock/qcom,a53cc.txt | 23 +++
drivers/clk/qcom/Kconfig | 8 ++
drivers/clk/qcom/Makefile | 1 +
drivers/clk/qcom/a53cc.c
On 09/08/2016 11:02 AM, Adrian Hunter wrote:
On 01/09/16 17:23, Pramod Gurav wrote:
Provides runtime PM callbacks to enable and disable clock resources
when idle. Also support system PM callbacks to be called during system
suspend and resume.
Signed-off-by: Pramod Gurav
Can we get some Teste
Hi Amit,
On 11/02/2017 09:28 AM, Amit Kucheria wrote:
[..>> +Interconnect node is the software definition of the interconnect
hardware
>> +port. Each interconnect provider consists of multiple interconnect nodes,
>> +which are connected to other SoC components including other interconnect
>> +prov
Hi Amit,
On 11/02/2017 09:28 AM, Amit Kucheria wrote:
> On Fri, Sep 8, 2017 at 10:48 PM, Georgi Djakov
> wrote:
>> Add driver for the Qualcomm interconnect buses found in msm8916 based
>> platforms. This patch contains only a partial topology to make reviewing
>> eas
On 09/21/2017 07:49 PM, Georgi Djakov wrote:
> This patchset adds support for the A53 CPU clock on MSM8916 platforms
> and allows scaling of the CPU frequency on msm8916 based platforms.
>
> Changes since v8 (https://lkml.org/lkml/2017/6/23/476)
> * Converted APCS mailbox drive
Hi Bjorn,
Thanks for reviewing!
On 10/26/2017 07:28 AM, Bjorn Andersson wrote:
> On Thu 21 Sep 09:49 PDT 2017, Georgi Djakov wrote:
>
>> Move the structure shared by the APCS IPC device and its subdevices
>> into a separate header file.
>>
>
> As you&#x
On 10/13/2015 11:57 PM, Bjorn Andersson wrote:
> The BIT() was incorrectly inherited from family A and should not be used
> on family B where the state is denoted by an enum.
>
> Reported-by: Georgi Djakov
> Signed-off-by: Bjorn Andersson
Tested-by: Georgi Djakov
> ---
&
On 08/03/2015 07:48 PM, Georgi Djakov wrote:
> This patchset adds initial support for the clocks controlled by
> the RPM (Resource Power Manager) processor on Qualcomm platforms.
> It depends on Bjorn's Qualcomm SMD & RPM patches, that are now in
> linux-next: https://lkml.or
Hi Stephen,
On 09/02/2015 11:31 PM, Stephen Boyd wrote:
> On 08/03, Georgi Djakov wrote:
>> diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c
>> new file mode 100644
>> index ..e564673ec3a5
>> --- /dev/null
>> +++
Srini and Bjorn.
* More detailed binding example.
* Minor changes.
Georgi Djakov (8):
arm64: dts: qcom: 8x16: Add fixed rate on-board oscillator
clk: qcom: msm8916: Set the parent of xo to xo_board
clk: qcom: msm8916: Ignore sleep_clk_src registration errors
arm64: dts: qcom: 8x16: Add fixed
The RPM clock controller driver takes care of registering the
xo clock. Do not register it in this driver if RPM is enabled.
Signed-off-by: Georgi Djakov
---
drivers/clk/qcom/gcc-msm8916.c | 16 +---
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/drivers/clk/qcom
The sleep_clk_src has been moved to DT, so we do not need to
register it in the GCC driver anymore.
Signed-off-by: Georgi Djakov
---
drivers/clk/qcom/gcc-msm8916.c |3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/clk/qcom/gcc-msm8916.c b/drivers/clk/qcom/gcc-msm8916.c
index
Remove the hard-coded clock rate from the driver and set the XO
parent to the on-board XO oscillator that is defined in the DT.
Signed-off-by: Georgi Djakov
---
drivers/clk/qcom/gcc-msm8916.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/qcom/gcc-msm8916.c b
Add support for clocks that are controlled by the RPM processor
on Qualcomm msm8916 based platforms.
Signed-off-by: Georgi Djakov
---
.../devicetree/bindings/clock/qcom,rpmcc.txt | 35
drivers/clk/qcom/Kconfig |8 +
drivers/clk/qcom/Makefile
We are moving the sleep clock to the DT. While all patches
are merged, we will ignore sleep_clk_src registration errors.
By ignoring this error, the msm8916 boards will continue booting
during this transition period, otherwise the clock controller
initialization will fail.
Signed-off-by: Georgi
The sleep clock oscillator should be in the DT instead of being
hard-coded into the clock drivers.
Signed-off-by: Georgi Djakov
---
arch/arm64/boot/dts/qcom/msm8916.dtsi |7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi
b/arch/arm64/boot/dts
shared memory
and accepts clock requests, aggregates the requests and turns
the clocks on/off or scales them on demand.
This driver is based on the codeaurora.org driver:
https://www.codeaurora.org/cgit/quic/la/kernel/msm-3.10/tree/drivers/clk/qcom/clock-rpm.c
Signed-off-by: Georgi Djakov
: Georgi Djakov
---
arch/arm64/boot/dts/qcom/msm8916.dtsi |9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi
b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 8748fcca70f4..355a2acea796 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64
Enable the eMMC on the APQ8016 SBC board (also known as DragonBoard 410c),
so that we can use its internal storage.
Signed-off-by: Georgi Djakov
---
arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi |4
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
b
Hi Rob,
On 08/03/2018 12:02 AM, Rob Herring wrote:
> On Tue, Jul 31, 2018 at 10:13 AM Georgi Djakov
> wrote:
>>
>> This binding is intended to represent the interconnect hardware present
>> in some of the modern SoCs. Currently it consists only of a binding for
>
Hi Maxime,
On 08/27/2018 06:08 PM, Maxime Ripard wrote:
> Hi!
>
> On Fri, Aug 24, 2018 at 05:51:37PM +0300, Georgi Djakov wrote:
>> Hi Maxime,
>>
>> On 08/20/2018 06:32 PM, Maxime Ripard wrote:
>>> Hi Georgi,
>>>
>>> On Tue, Aug 07, 2018 at
Hi Rob and Maxime,
On 08/27/2018 06:11 PM, Maxime Ripard wrote:
> On Fri, Aug 24, 2018 at 10:35:23AM -0500, Rob Herring wrote:
>> On Fri, Aug 24, 2018 at 9:51 AM Georgi Djakov
>> wrote:
>>>
>>> Hi Maxime,
>>>
>>> On 08/20/2018 06:32 PM, Maxime
Hi Saravana,
On 08/02/2018 10:12 PM, skan...@codeaurora.org wrote:
> On 2018-08-02 05:07, Georgi Djakov wrote:
>> Hi Saravana,
>>
>> On 08/02/2018 01:57 AM, skan...@codeaurora.org wrote:
>>> On 2018-07-31 09:13, Georgi Djakov wrote:
>>>> Currently we sup
d refcounting.
* Updated documentation.
* Changed struct interconnect_path to use array instead of linked list.
Georgi Djakov (8):
interconnect: Add generic on-chip interconnect API
dt-bindings: Introduce interconnect binding
interconnect: Allow endpoints translation via DT
interconnect:
This binding is intended to represent the relations between the interconnect
controllers (providers) and consumer device nodes. It will allow creating links
between consumers and interconnect paths (exposed by interconnect providers).
Signed-off-by: Georgi Djakov
---
.../bindings/interconnect
node according to the requested data flow path, physical links and
constraints. The topology could be complicated and multi-tiered and is SoC
specific.
Signed-off-by: Georgi Djakov
Reviewed-by: Evan Green
---
Documentation/interconnect/interconnect.rst | 94
drivers/Kconfig
Add a functionality to provide information about the current constraints
per each node and provider.
Signed-off-by: Georgi Djakov
Reviewed-by: Evan Green
---
drivers/interconnect/core.c | 78 +
1 file changed, 78 insertions(+)
diff --git a/drivers
Add myself as the maintainer of the interconnect API.
Signed-off-by: Georgi Djakov
---
MAINTAINERS | 10 ++
1 file changed, 10 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 32fbc6f732d4..ed1b534c901b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -7420,6 +7420,16 @@ L
Document the device-tree bindings of the Network-On-Chip interconnect
hardware found on Qualcomm msm8916 platforms.
Signed-off-by: Georgi Djakov
Reviewed-by: Evan Green
---
.../bindings/interconnect/qcom-msm8916.txt| 41
include/dt-bindings/interconnect/qcom.h | 98
Add driver for the Qualcomm interconnect buses found in msm8916 based
platforms.
Signed-off-by: Georgi Djakov
---
drivers/interconnect/Kconfig| 5 +
drivers/interconnect/Makefile | 1 +
drivers/interconnect/qcom/Kconfig | 9 +
drivers/interconnect/qcom/Makefile | 2
consumer drivers, introduce a translation function
to help us get the board specific interconnect data from device-tree.
Signed-off-by: Georgi Djakov
Reviewed-by: Evan Green
---
drivers/interconnect/core.c | 78
include/linux/interconnect.h | 7
2 files
On some Qualcomm SoCs, there is a remote processor, which controls some of
the Network-On-Chip interconnect resources. Other CPUs express their needs
by communicating with this processor. Add a driver to handle communication
with this remote processor.
Signed-off-by: Georgi Djakov
Reviewed-by
Hi Saravana,
On 08/02/2018 03:57 AM, Saravana Kannan wrote:
> This driver registers itself as a devfreq device that allows devfreq
> governors to make bandwidth votes for an interconnect path. This allows
> applying various policies for different interconnect paths using devfreq
> governors.
>
>
Hi Maxime,
On 08/20/2018 06:32 PM, Maxime Ripard wrote:
> Hi Georgi,
>
> On Tue, Aug 07, 2018 at 05:54:38PM +0300, Georgi Djakov wrote:
>>> There is also a patch series from Maxime Ripard that's addressing the
>>> same general area. See "dt-bindings: Add a dm
Hi Evan,
Thanks for helping to improve this!
On 07/11/2018 01:34 AM, Evan Green wrote:
> Ahoy Georgi!
> On Mon, Jul 9, 2018 at 8:51 AM Georgi Djakov wrote:
>>
>> This patch introduces a new API to get requirements and configure the
>> interconnect buses across the entire
Hi Alexandre,
On 07/11/2018 07:21 PM, Alexandre Bailon wrote:
> On 07/09/2018 05:50 PM, Georgi Djakov wrote:
>> This patch introduces a new API to get requirements and configure the
>> interconnect buses across the entire chipset to fit with the current
>> demand.
>
Hi Greg,
On 15.07.18 г. 15:15, Greg KH wrote:
> On Mon, Jul 09, 2018 at 06:50:59PM +0300, Georgi Djakov wrote:
>> +static int __init icc_debugfs_init(void)
>> +{
>> +struct dentry *file;
>> +
>> +icc_debugfs_dir = debugfs_create_dir("interconnect
Hi Evan,
On 07/11/2018 01:34 AM, Evan Green wrote:
> On Mon, Jul 9, 2018 at 8:51 AM Georgi Djakov wrote:
>>
>> On some Qualcomm SoCs, there is a remote processor, which controls some of
>> the Network-On-Chip interconnect resources. Other CPUs express their needs
>>
Hi Matthias,
On 07/10/2018 02:56 AM, Matthias Kaehlcke wrote:
> Hi,
>
> On Mon, Jul 09, 2018 at 06:51:02PM +0300, Georgi Djakov wrote:
>> Add driver for the Qualcomm interconnect buses found in msm8916 based
>> platforms.
>>
>> Signed-off-by: Georgi Djakov
Hi,
On 07/11/2018 01:34 AM, Evan Green wrote:
> On Mon, Jul 9, 2018 at 8:51 AM Georgi Djakov wrote:
>>
>> Add driver for the Qualcomm interconnect buses found in msm8916 based
>> platforms.
>>
>> Signed-off-by: Georgi Djakov
>> ---
>> drivers/in
Hi Alexandre,
On 07/11/2018 06:42 PM, Alexandre Bailon wrote:
> On 07/09/2018 05:51 PM, Georgi Djakov wrote:
>> Add driver for the Qualcomm interconnect buses found in msm8916 based
>> platforms.
>>
>> Signed-off-by: Georgi Djakov
>> ---
>> dr
Hi,
On 07/11/2018 01:34 AM, Evan Green wrote:
> On Mon, Jul 9, 2018 at 8:51 AM Georgi Djakov wrote:
>>
>> Add documentation for the interconnect consumer bindings, that will allow
>> to link a device node (consumer) to its interconnect controller hardware.
>>
>>
nterconnect_get() now takes (src and dst ports as arguments).
* Removed public declarations of some structs.
* Now passing prev/next nodes to the vendor driver.
* Properly remove requests on _put().
* Added refcounting.
* Updated documentation.
* Changed struct interconnect_path to use array instead o
On some Qualcomm SoCs, there is a remote processor, which controls some of
the Network-On-Chip interconnect resources. Other CPUs express their needs
by communicating with this processor. Add a driver to handle communication
with this remote processor.
Signed-off-by: Georgi Djakov
Add a functionality to provide information about the current constraints
per each node and provider.
Signed-off-by: Georgi Djakov
---
drivers/interconnect/core.c | 78 +
1 file changed, 78 insertions(+)
diff --git a/drivers/interconnect/core.c b/drivers
.
Signed-off-by: Georgi Djakov
---
.../bindings/interconnect/interconnect.txt| 27 +++
1 file changed, 27 insertions(+)
diff --git a/Documentation/devicetree/bindings/interconnect/interconnect.txt
b/Documentation/devicetree/bindings/interconnect/interconnect.txt
index 6e2b2971b094
consumer drivers, introduce a translation function
to help us get the board specific interconnect data from device-tree.
Signed-off-by: Georgi Djakov
---
drivers/interconnect/core.c | 62
include/linux/interconnect.h | 7
2 files changed, 69 insertions
node according to the requested data flow path, physical links and
constraints. The topology could be complicated and multi-tiered and is SoC
specific.
Signed-off-by: Georgi Djakov
---
Documentation/interconnect/interconnect.rst | 96
drivers/Kconfig | 2
Add driver for the Qualcomm interconnect buses found in msm8916 based
platforms.
Signed-off-by: Georgi Djakov
---
drivers/interconnect/Kconfig| 5 +
drivers/interconnect/Makefile | 1 +
drivers/interconnect/qcom/Kconfig | 9 +
drivers/interconnect/qcom/Makefile | 2
This binding is intended to represent the interconnect hardware present
in some of the modern SoCs. Currently it consists only of a binding for
the interconnect hardware devices (provider).
Signed-off-by: Georgi Djakov
---
.../bindings/interconnect/interconnect.txt| 33
Document the device-tree bindings Network-On-Chip interconnect driver
for Qualcomm msm8916 platforms.
Signed-off-by: Georgi Djakov
---
.../bindings/interconnect/qcom-msm8916.txt| 39
include/dt-bindings/interconnect/qcom.h | 187 ++
2 files changed, 226
Hi Randy,
On 08/02/2018 03:05 AM, Randy Dunlap wrote:
> On 07/31/2018 09:13 AM, Georgi Djakov wrote:
>> This patch introduces a new API to get requirements and configure the
>> interconnect buses across the entire chipset to fit with the current
>> demand.
>>
>
Hi Saravana,
On 08/02/2018 01:57 AM, skan...@codeaurora.org wrote:
> On 2018-07-31 09:13, Georgi Djakov wrote:
>> Currently we support only platform data for specifying the interconnect
>> endpoints. As now the endpoints are hard-coded into the consumer driver
>> this may
Hi MyungJoo,
On 08/02/2018 01:13 PM, MyungJoo Ham wrote:
>> This driver registers itself as a devfreq device that allows devfreq
>> governors to make bandwidth votes for an interconnect path. This allows
>> applying various policies for different interconnect paths using devfreq
>> governors.
>>
>
at the SMD-regulator driver is not compiled and the apq8016
boards could not probe their onboard storage and mount rootfs.
Fix this by switching to the new SMD driver, so that the required
driver is compiled again.
Reported-by: Leo Yan
Signed-off-by: Georgi Djakov
---
arch/arm64/configs/defconfig
Hi Jassi,
On 01/27/2018 05:44 AM, Jassi Brar wrote:
> On Thu, Jan 4, 2018 at 10:26 PM, Georgi Djakov
> wrote:
>> Hi Jassi,
>>
>> On 12/29/2017 08:14 AM, Jassi Brar wrote:
>>> Hi Bjorn,
>>>
>>> On Sun, Dec 24, 2017 at 10:36 AM, Bjorn Andersson
&
On 02/01/2018 08:57 AM, Jassi Brar wrote:
> On Thu, Feb 1, 2018 at 12:10 AM, Georgi Djakov
> wrote:
>>
>> Hi Jassi,
>>
>> On 01/27/2018 05:44 AM, Jassi Brar wrote:
>>> On Thu, Jan 4, 2018 at 10:26 PM, Georgi Djakov
>>> wrote:
>>>>
Hi Jassi,
On 12/29/2017 08:14 AM, Jassi Brar wrote:
> Hi Bjorn,
>
> On Sun, Dec 24, 2017 at 10:36 AM, Bjorn Andersson
> wrote:
>> On Fri 22 Dec 20:57 PST 2017, Jassi Brar wrote:
>>
>>> On Tue, Dec 5, 2017 at 9:16 PM, Georgi Djakov
>>> wrote:
>
On 12/05/2017 05:46 PM, Georgi Djakov wrote:
> This patchset adds support for the A53 CPU clock on MSM8916 platforms
> and allows scaling of the CPU frequency on msm8916 based platforms.
>
> Changes since v10 (https://lkml.org/lkml/2017/12/1/577)
> * Addressed Bjorn's co
.
Signed-off-by: Georgi Djakov
---
.../bindings/interconnect/interconnect.txt | 23 ++
1 file changed, 23 insertions(+)
diff --git a/Documentation/devicetree/bindings/interconnect/interconnect.txt
b/Documentation/devicetree/bindings/interconnect/interconnect.txt
index
consumer drivers, introduce a translation function
to help us get the board specific interconnect data from device-tree.
Signed-off-by: Georgi Djakov
---
drivers/interconnect/core.c | 38 ++
include/linux/interconnect.h | 6 ++
2 files changed, 44 insertions
Add driver for the Qualcomm interconnect buses found in msm8916 based
platforms.
Signed-off-by: Georgi Djakov
---
drivers/interconnect/Kconfig| 5 +
drivers/interconnect/Makefile | 1 +
drivers/interconnect/qcom/Kconfig | 11 +
drivers/interconnect/qcom/Makefile | 2
On some Qualcomm SoCs, there is a remote processor, which controls some of
the Network-On-Chip interconnect resources. Other CPUs express their needs
by communicating with this processor. Add a driver to handle comminication
with this remote processor.
Signed-off-by: Georgi Djakov
This binding is intended to represent the interconnect hardware present
in some of the modern SoCs. Currently it consists only of a binding for
the interconnect hardware devices (provider).
Signed-off-by: Georgi Djakov
---
.../bindings/interconnect/interconnect.txt | 47
Add a functionality to provide information about the current constraints
per each node and provider.
Signed-off-by: Georgi Djakov
---
drivers/interconnect/core.c | 70 +
1 file changed, 70 insertions(+)
diff --git a/drivers/interconnect/core.c b
Updated documentation.
* Changed struct interconnect_path to use array instead of linked list.
Georgi Djakov (7):
interconnect: Add generic on-chip interconnect API
dt-bindings: Introduce interconnect provider bindings
interconnect: Add debugfs support
interconnect: qcom: Add RPM communic
according to the requested data flow path, physical links and
constraints. The topology could be complicated and multi-tiered and is SoC
specific.
Signed-off-by: Georgi Djakov
---
Documentation/interconnect/interconnect.rst | 96 ++
drivers/Kconfig | 2
Hi Matthias,
On 04/06/2018 08:38 PM, Matthias Kaehlcke wrote:
> On Fri, Mar 09, 2018 at 11:09:52PM +0200, Georgi Djakov wrote:
>> This patch introduce a new API to get requirements and configure the
>> interconnect buses across the entire chipset to fit with the current
>>
Hi Matthias,
On 04/06/2018 01:58 AM, Matthias Kaehlcke wrote:
> On Fri, Mar 09, 2018 at 11:09:56PM +0200, Georgi Djakov wrote:
>> Add driver for the Qualcomm interconnect buses found in msm8916 based
>> platforms.
>>
>> Signed-off-by: Georgi Djakov
>> ---
Hi Rob,
Thanks for the comments!
On 09/25/2018 09:02 PM, Rob Herring wrote:
> On Fri, Aug 31, 2018 at 05:01:45PM +0300, Georgi Djakov wrote:
>> This binding is intended to represent the relations between the interconnect
>> controllers (providers) and consumer device nodes
Hi Sudeep,
On 09/26/2018 05:48 PM, Sudeep Holla wrote:
> On Wed, Sep 26, 2018 at 05:42:15PM +0300, Georgi Djakov wrote:
>> Hi Rob,
>>
>> Thanks for the comments!
>>
>> On 09/25/2018 09:02 PM, Rob Herring wrote:
>>> On Fri, Aug 31, 2018 at 05:01:45PM +03
vendor driver.
* Properly remove requests on _put().
* Added refcounting.
* Updated documentation.
* Changed struct interconnect_path to use array instead of linked list.
David Dai (2):
interconnect: qcom: Add sdm845 interconnect provider driver
arm64: dts: sdm845: Add interconnect provider DT node
Add a functionality to provide information about the current constraints
per each node and provider.
Signed-off-by: Georgi Djakov
Reviewed-by: Evan Green
---
drivers/interconnect/core.c | 71 +
1 file changed, 71 insertions(+)
diff --git a/drivers
This binding is intended to represent the relations between the interconnect
controllers (providers) and consumer device nodes. It will allow creating links
between consumers and interconnect paths (exposed by interconnect providers).
Signed-off-by: Georgi Djakov
---
.../bindings/interconnect
Add myself as the maintainer of the interconnect API.
Signed-off-by: Georgi Djakov
---
MAINTAINERS | 10 ++
1 file changed, 10 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 380e43f585d3..4f426863ff3b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -7694,6 +7694,16 @@ L
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