e two patches on your side.
Also I hope you can improve all adding the missing features (that is
what you were already doing).
If you agree, you could also re-send *all* to the mailing list to
be finally reviewed.
On 1/25/2013 11:01 PM, Byungho An wrote:
On 1/23/2013 1:43 PM, Giuseppe CAVALLARO
Hello Romain
On 10/8/2013 5:06 PM, Romain Baeriswyl wrote:
In order to avoid system overload, the clock RXC from the Phy should not be
stopped when in LPI mode.
With the RTL8211E PHY which support EEE mode and with Apple Airport Extreme that
supports it also, the kernel get frozen as soon as so
On 11/28/2012 11:57 AM, Byungho An wrote:
On 11/26/2012 07:31 PM, Giuseppe CABALLARO wrote:
On 11/23/2012 10:04 AM, Byungho An wrote:
This patch changes GMAC control register (TC(Transmit
Configuration) and PS(Port Selection) bit for SGMII.
In case of SGMII, TC bit is '1' and PS bit is 0.
IM
On 7/1/2013 1:43 PM, Srinivas KANDAGATLA wrote:
From: Srinivas Kandagatla
This patch adds dt support to dwmac version 3.610 and 3.710 these
versions are integrated in STiH415 and STiH416 ARM A9 SOCs.
To support these IP version, some of the device tree properties are
extended.
Signed-off-by: S
platform_data if its valid, before
allocating a new one.
Yes, we had seen this long time ago and IIRC i prepared the patch
so
Acked-by: Giuseppe Cavallaro
Signed-off-by: Srinivas Kandagatla
---
.../net/ethernet/stmicro/stmmac/stmmac_platform.c |6 +++---
1 files changed, 3 insertions(+), 3
platform_data if its valid, before
allocating a new one.
Ye, we had seen this long time ago and IIRC i prepared the patch
so
Acked-by: Giuseppe Cavallaro
Signed-off-by: Srinivas Kandagatla
---
.../net/ethernet/stmicro/stmmac/stmmac_platform.c |6 +++---
1 files changed, 3 insertions(+), 3
On 7/2/2013 8:42 AM, Srinivas KANDAGATLA wrote:
Are you happy with the setting pmt based on compatible string or do you
think passing pmt as another property to device tree makes more sense?
I prefer to pass pmt as another property but indeed this is not a big
problem because all the new chips
On 3/6/2013 5:13 AM, Byungho An wrote:
Hello Peppe,
If you agree, you could also re-send *all* to the mailing list to
be finally reviewed.
Anyway, in my opinion, you can take them in your tree for now with my
tested-by if you want. Of course, I'll implement additional patches as you
requested
Hello Byungho
On 1/18/2013 6:41 PM, Byungho An wrote:
Hello Peppe,
On 1/15/2013 11:28 PM, Giuseppe CAVALLARO write:
On 1/15/2013 10:45 PM, Byungho An wrote:
This patch adds gmac autoneg set function for SGMII, TBI, or RTBI
interface. In case of PHY's autoneg is set, gmac's auto
Hello Christian
On 2/15/2013 2:15 PM, Christian Ruppert wrote:
If the DesignWare MAC is synthesised with MMC RX IPC Counter, an unmanaged
and unacknowledged interrupt is generated after some time of operation. To
my knowledge there is no way to autodetect this configuration.
This patch adds a K
On 2/15/2013 3:58 PM, Christian Ruppert wrote:
If the DesignWare MAC is synthesised with MMC RX IPC Counter, an unmanaged
and unacknowledged interrupt is generated after some time of operation.
This patch masks the undesired interrupts.
Signed-off-by: Christian Ruppert
Acked-by: Giuseppe
+0100, Giuseppe CAVALLARO wrote:
Hello Christian
On 2/15/2013 2:15 PM, Christian Ruppert wrote:
If the DesignWare MAC is synthesised with MMC RX IPC Counter, an unmanaged
and unacknowledged interrupt is generated after some time of operation. To
my knowledge there is no way to autodetect this configur
Hello An
On 11/23/2012 10:04 AM, Byungho An wrote:
This patch changes GMAC control register (TC(Transmit
Configuration) and PS(Port Selection) bit for SGMII.
In case of SGMII, TC bit is '1' and PS bit is 0.
I was looking at this too. In particular, I was working on the rgmii
interrupt so I g
On 11/23/2012 10:04 AM, Byungho An wrote:
This patch changes GMAC control register (TC(Transmit
Configuration) and PS(Port Selection) bit for SGMII.
In case of SGMII, TC bit is '1' and PS bit is 0.
IMO this new support that should be released for net-next and further
effort is actually needed
Hello Byungho,
On 1/15/2013 10:45 PM, Byungho An wrote:
This patch adds gmac autoneg set function for SGMII, TBI,
or RTBI interface. In case of PHY's autoneg is set, gmac's
autoneg enable bit should set. After checking phy's autoneg
if phydev's autoneg is '1' gmac's ANE bit set for those
interf
Hello Byungho
On 1/9/2013 12:35 AM, Byungho An wrote:
This patch adds gmac autoneg set function for SGMII, TBI,
and RTBI interface. In case of PHY's autoneg is set, gmac's
autoneg enable bit should set. After checking phy's autoneg
if phydev's autoneg is '1' gmac's ANE bit set for those
interfa
Hello
On 10/27/2017 11:05 AM, Jose Abreu wrote:
I think we should take advantage of the fact that this is working
and ready to be merged. Its just HW configuration but maybe it
can serve as momentum for other drivers to also integrate this?
Let me propose to have it now in the next-next.
This
). To be as little
invasive as possible, this is only done for gmac1000 when the network
device is DSA-enabled (netdev_uses_dsa() returns true).
Signed-off-by: Florian Fainelli
Acked-by: Giuseppe Cavallaro
---
Changes in v2:
- fixed build failure in dwmac4_core.c
- updated dwmac100_core.c to
Hi Florian
for gmac4.x and gmac3.x series the ACS bit is the Automatic Pad or CRC
Stripping, so the
core strips the Pad or FCS on frames if the value of the length field is
< 1536 bytes.
For MAC10-100 there is the Bit 8 (ASTP) of the reg0 that does the same
if len is < 46bytes.
In your patch I
Hi Vince
On 4/15/2015 6:17 PM, Vince Bridgers wrote:
This series of patches corrects flow control configuration for the Synopsys
GMAC driver.
Thx for these patches
For the series
Acked-by: Giuseppe Cavallaro
peppe
Flow control is configured based on a configurable receive fifo size. If
Hello Romain
On 10/13/2013 10:02 PM, Romain Baeriswyl wrote:
Hello Guiseppe,
Thanks for your answer. Please find below some details and answers.
In order to avoid system overload, the clock RXC from the Phy
should not be
stopped when in LPI mode.
With the RTL8211E PHY which support EEE mode a
On 12/7/2013 2:57 AM, Florian Fainelli wrote:
2013/12/6 Chen-Yu Tsai :
On Sat, Dec 7, 2013 at 5:09 AM, Florian Fainelli wrote:
2013/12/6 Chen-Yu Tsai :
The CubieTruck uses the GMAC with an RGMII phy.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 8
On 9/18/2014 2:34 PM, Kweh Hock Leong wrote:
From: "Kweh, Hock Leong"
When the CONFIG_HAVE_CLK is selected for the system, the stmmac_pci_probe
will fail with dmesg:
[2.167225] stmmaceth :00:14.6: enabling device ( -> 0002)
[2.178267] stmmaceth :00:14.6: enabling bus masteri
On 9/23/2014 3:16 AM, Kweh, Hock Leong wrote:
-Original Message-
From: David Miller [mailto:da...@davemloft.net]
Sent: Tuesday, September 23, 2014 2:19 AM
From: Kweh Hock Leong
Date: Thu, 18 Sep 2014 20:34:10 +0800
Giuseppe, Kweh, where are we with this patch?
We are discussing whethe
Amlogic variant.
This has been tested on a Amlogic S802 device with the initial Meson
support submitted by Carlo Caione [1].
patches look fine just a warning with checkpatch as shown below then
Acked-by: Giuseppe Cavallaro
[cavagiu@lxmcdt5 net.git]$ git-format-patch -2
0001-net-stmmac-add
On 9/23/2014 9:03 AM, Kweh, Hock Leong wrote:
-Original Message-
From: Giuseppe CAVALLARO [mailto:peppe.cavall...@st.com]
Sent: Tuesday, September 23, 2014 2:10 PM
the logic is: the priv->stmmac_clk must be always provided from the platform
then we have two cases:
1) if priv-&g
On 9/24/2014 12:48 PM, Kweh, Hock Leong wrote:
-Original Message-
From: Giuseppe CAVALLARO [mailto:peppe.cavall...@st.com]
Sent: Wednesday, September 24, 2014 2:10 PM
Hi peppe,
Appreciate for the explanation. Just to clarify that I am not asking not to
pass in the priv->stmmac_
Hello Hao Liang
On 9/30/2014 7:55 AM, hliang1...@gmail.com wrote:
From: Hao Liang
This is the fix for a power management issue caused by suspend and resume
function in stmmac_main.c.
After enable CONFIG_DEBUG_ATOMIC_SLEEP which enable sleep-inside atomic section
checking, power
managemet can
Hello Alexey
On 5/17/2014 1:15 AM, Alexey Khoroshilov wrote:
There are calls to might sleep functions in atomic context in
stmmac_resume():
- the first one is clk_prepare_enable(priv->stmmac_clk);
- the second one is stmmac_hw_setup()
-> init_dma_desc_rings()
-> stmmac_init_rx_buffers()
Hello Chen-Yu
On 12/6/2013 6:29 PM, Chen-Yu Tsai wrote:
Signed-off-by: Chen-Yu Tsai
---
Guiseppe previously stated that the "stmmaceth" clock is the
main clock that drives the IP. The stmmac driver does not
enable this clock during the probe phase. When the driver is
built in to the kernel, th
On 11/18/2013 12:30 PM, srinivas.kandaga...@st.com wrote:
From: Srinivas Kandagatla
Hi Peppe,
During PM_SUSPEND_FREEZE testing, I have noticed that PM support in STMMAC is
partly broken. I had to re-arrange the code to do PM correctly. There were lot
of things I did not like personally and som
On 11/12/2013 2:51 PM, srinivas.kandaga...@st.com wrote:
From: Srinivas Kandagatla
Hi All,
This patch series adds Ethernet support to STi series SOCs STiH415 and STiH416.
STi SOC series integrates dwmac IP from synopsis, however there is a hardware
glue on top of this standard IP, this glue ne
Hello
On 8/25/2014 1:50 PM, Ley Foon Tan wrote:
This patch add the option to enable DCRS bit in GMAC control register.
Default is disabled if snps,dcrs is not defined.
For MII, Carrier Sense (CRS) must be asserted during transmission
whereas in RGMII, CRS is not. RGMII does not provide a way to
On 8/25/2014 2:34 PM, Chen-Yu Tsai wrote:
Hi,
On Mon, Aug 25, 2014 at 7:50 PM, Ley Foon Tan wrote:
This patch add the option to enable DCRS bit in GMAC control register.
Default is disabled if snps,dcrs is not defined.
For MII, Carrier Sense (CRS) must be asserted during transmission
whereas
On 8/25/2014 5:10 PM, Vince Bridgers wrote:
Hi,
On Mon, Aug 25, 2014 at 7:51 AM, Giuseppe CAVALLARO
wrote:
On 8/25/2014 2:34 PM, Chen-Yu Tsai wrote:
Hi,
On Mon, Aug 25, 2014 at 7:50 PM, Ley Foon Tan wrote:
This patch add the option to enable DCRS bit in GMAC control register.
Default is
On 8/26/2014 9:11 AM, Ley Foon Tan wrote:
Warning:
drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c:122:41:
sparse: cast removes address space of expression
drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c:122:38:
sparse: incorrect type in assignment (different address spaces)
Signed-off-b
On 8/26/2014 9:47 AM, Ley Foon Tan wrote:
On Tue, Aug 26, 2014 at 3:24 PM, Giuseppe CAVALLARO
wrote:
@@ -119,7 +119,8 @@ static int socfpga_dwmac_parse_data(struct
socfpga_dwmac *dwmac, struct device *
return -EINVAL;
}
- dwmac
On 8/26/2014 11:47 AM, Ley Foon Tan wrote:
Warning:
drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c:122:41:
sparse: cast removes address space of expression
drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c:122:38:
sparse: incorrect type in assignment (different address spaces)
Signed-off-
On 8/26/2014 2:35 PM, Vince Bridgers wrote:
Hi Peppe,
In the Synopsys EMAC case, carrier sense is used to stop transmitting
if no carrier is sensed during a transmission. This is only useful if
the media in use is true half duplex media (like obsolete 10Base2 or
10Base5). If no one in using tr
On 8/27/2014 12:32 PM, Kweh Hock Leong wrote:
From: "Kweh, Hock Leong"
Hi,
Intel Quark X1000 SoC has 2 Ethernet controllers integrated on chip and they are
PCI devices. We adopted the stmmac_pci driver and added on code to support Intel
Quark SoC X1000 by creating the patchset below. The patch
-by: Ley Foon Tan
Acked-by: Giuseppe Cavallaro
---
drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
index
On 10/15/2014 4:02 AM, David Miller wrote:
From: Stephen Rothwell
Date: Wed, 15 Oct 2014 10:44:11 +1100
Hi all,
After merging the net tree, today's linux-next build (arm
multi_v7_defconfig) failed like this:
drivers/built-in.o: In function `.LANCHOR0':
:(.rodata+0x6b764): undefined reference
this patch is to fix the stmmac data compatibilities for
all the SoCs inside the platform file.
Signed-off-by: Giuseppe Cavallaro
---
drivers/net/ethernet/stmicro/stmmac/stmmac.h |3 ++-
.../net/ethernet/stmicro/stmmac/stmmac_platform.c |8
2 files changed, 6 insertions
Hello Hao Liang
On 10/1/2014 7:45 PM, David Miller wrote:
From: Hao Liang
Date: Wed, 1 Oct 2014 14:08:28 +0800
I double-check my patch and the ->mac->xxx calls are still under the lock.
I think that lock is trying to protect priv struct and related data, so i
just remove some functions have n
Hello Emilio
I have a subset of new patches to review and fix locks in the
driver. I will plan to send them in the next days.
Sincerely
Peppe
On 11/3/2014 3:36 PM, Emilio López wrote:
Hi everyone,
I was playing with iperf on my Cubietruck today when I hit this lockdep
report/breakage on stmma
Hello Mark
On 4/13/2016 7:23 PM, Mark Brown wrote:
On Wed, Apr 13, 2016 at 09:59:00AM +0200, Giuseppe CAVALLARO wrote:
On 4/13/2016 8:15 AM, Mark Brown wrote:
+static void st_get_satinize_powerup_voltage(struct st_vsense *vsense)
+{
or am I missing something? Why do we need to do this
Hello Tien
On 5/13/2016 9:01 AM, th...@altera.com wrote:
From: Tien Hock Loh
Adds SGMII support for dwmac-socfpga to enable the SGMII PHY when phy-mode
of the dwmac is set to sgmii.
I wonder if part of this patch can be unified to the common code
reusing (or improving) existent PCS support (
Hello
On 11/24/2015 7:09 PM, David Miller wrote:
From: Shunqian Zheng
Date: Sun, 22 Nov 2015 16:44:18 +0800
From: ZhengShunQian
The init_dma_desc_rings() may realloc the rx_skbuff[] when
suspend and resume. This patch free the rx_skbuff[] before
reallocing memory.
Signed-off-by: ZhengShunQ
On 11/25/2015 4:13 PM, Giuseppe CAVALLARO wrote:
Hello
On 11/24/2015 7:09 PM, David Miller wrote:
From: Shunqian Zheng
Date: Sun, 22 Nov 2015 16:44:18 +0800
From: ZhengShunQian
The init_dma_desc_rings() may realloc the rx_skbuff[] when
suspend and resume. This patch free the rx_skbuff
remove driver is no more
driven in stmmac_pltfr but directly in dwmac-stm32 glue driver.
-Take into account Joachim review.
Regards.
Alexandre.
thanks Alex, for the series please consider my:
Acked-by: Giuseppe Cavallaro
Alexandre TORGUE (4):
net: ethernet: dwmac: add Ethernet glue logic
Hello Roger
thx for these patches, my comments inline below
On 11/25/2014 10:07 AM, Roger Chen wrote:
This driver is based on stmmac driver.
Signed-off-by: Roger Chen
---
drivers/net/ethernet/stmicro/stmmac/Makefile |2 +-
drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c | 629
On 11/26/2014 3:29 AM, Roger wrote:
Hi! Giuseppe CAVALLARO
在 2014/11/25 18:05, Giuseppe CAVALLARO 写道:
Hello Roger
thx for these patches, my comments inline below
On 11/25/2014 10:07 AM, Roger Chen wrote:
This driver is based on stmmac driver.
Signed-off-by: Roger Chen
---
drivers/net
the Synopsys
multicast filter register set.
Signed-off-by: Vince Bridgers
Acked-by: Giuseppe Cavallaro
---
drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
b
On 3/21/2015 10:39 PM, Richard Cochran wrote:
This device stores the number of seconds in a 32 bit register. So
more work is needed on this driver before the year 2038 comes around.
Compile tested only.
I cannot perform tests on my side, unfortunately. I have no setup at
this moment. Added Ra
.
Signed-off-by: Beniamino Galvani
Ciao Beniamino
thx for the patch, I also see some improvements on my side
Acked-by: Giuseppe Cavallaro
---
Changes since v1:
- don't access skb->len after the start of DMA transmission in
stmmac_xmit(), to avoid potential use after free
Hello Tomeu, Andreas,
On 3/9/2016 10:52 AM, Giuseppe CAVALLARO wrote:
* today's linux-next: probe failed
* today's linux-next + revert of 88f8b1bb41c6 stmmac: Fix 'eth0: No
PHY found' regression: probe succeeded but no network at all
* today's linux-next + revert of
Hi Tomeu
On 3/9/2016 11:53 AM, Tomeu Vizoso wrote:
On 9 March 2016 at 11:27, Giuseppe CAVALLARO wrote:
Hello Tomeu, Andreas,
On 3/9/2016 10:52 AM, Giuseppe CAVALLARO wrote:
* today's linux-next: probe failed
* today's linux-next + revert of 88f8b1bb41c6 stmmac: Fix 'eth
here try normal setup
and I can confirm that enhanced descriptors are ok on my side
Regards
Peppe
On 3/9/2016 3:31 PM, Giuseppe CAVALLARO wrote:
Hi Tomeu
On 3/9/2016 11:53 AM, Tomeu Vizoso wrote:
On 9 March 2016 at 11:27, Giuseppe CAVALLARO
wrote:
Hello Tomeu, Andreas,
On 3/9/2016 10:
On 3/9/2016 5:31 PM, Dinh Nguyen wrote:
On Wed, Mar 9, 2016 at 8:53 AM, Giuseppe CAVALLARO
wrote:
Hi Tomeu, Dinh, Andreas
I need a sum and help from you to go ahead on the
tx timeout.
The "stmmac: MDIO fixes" seems to be the candidate to
fix the phy connection and I will send t
Hello Tomeu
On 3/15/2016 8:23 AM, Tomeu Vizoso wrote:
Thanks.
Btw, I have rebased on top of 4.5 this morning and I have noticed that
88f8b1bb41c6 ("stmmac: Fix 'eth0: No PHY found' regression") got in
there, so I guess we have now a bunch of boards with broken network on
that release:(
This
On 4/6/2016 11:12 AM, Vineet Gupta wrote:
Hi,
On Thursday 17 March 2016 03:11 PM, Alexey Brodkin wrote:
Following commit broke DW GMAC functionality on AXS10x boards:
http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=e34d65696d2ef13dc32f2a162556c86c461ed763
That's what
On 3/22/2016 5:11 PM, Alexandre Torgue wrote:
Hi guys,
I will fix typo issues (s/vesrion/version and ethernet @).
Concerning compatible string. For sure "snps,dwmac-3.50a" string is
not used inside glue driver.
I perfere to keep it for information but if you really want that I
remove it I will
Hello Robert
On 3/30/2016 8:22 PM, Robert Gadsdon wrote:
I have applied this to my Rock2 - Kernel 4.6-rc1 - and eth0 is present,
now, but no network traffic gets through:
there are some patches not yet applied that fix known
problems
pls take a look at :
"stmmac: MDIO fixes"
and
[PATCH (n
On 3/30/2016 6:44 PM, Dinh Nguyen wrote:
On Tue, Mar 15, 2016 at 7:36 AM, Giuseppe CAVALLARO
wrote:
Hello Tomeu
On 3/15/2016 8:23 AM, Tomeu Vizoso wrote:
Thanks.
Btw, I have rebased on top of 4.5 this morning and I have noticed that
88f8b1bb41c6 ("stmmac: Fix 'eth0: No
repo.
Giuseppe Cavallaro (3):
stmmac: fix TX normal DESC
Revert "stmmac: Fix 'eth0: No PHY found' regression"
stmmac: fix MDIO settings
drivers/net/ethernet/stmicro/stmmac/norm_desc.c| 16 ++--
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 16 +---
drivers/
: Giuseppe Cavallaro
Reviewed-by: Andreas Färber
Tested-by: Frank Schäfer
Cc: Gabriel Fernandez
Cc: Dinh Nguyen
Cc: David S. Miller
Cc: Phil Reid
---
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 16 +---
drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c | 19 +
.../net/ethernet
This reverts commit 88f8b1bb41c6208f81b6a480244533ded7b59493.
due to problems on GeekBox and Banana Pi M1 board when
connected to a real transceiver instead of a switch via
fixed-link.
Signed-off-by: Giuseppe Cavallaro
Cc: Gabriel Fernandez
Cc: Andreas Färber
Cc: Frank Schäfer
Cc: Dinh Nguyen
This patch fixs a regression raised when test on chips that use
the normal descriptor layout. In fact, no len bits were set for
the TDES1 and no OWN bit inside the TDES0.
Signed-off-by: Giuseppe CAVALLARO
Tested-by: Andreas Färber
Cc: Fabrice Gasnier
---
drivers/net/ethernet/stmicro/stmmac
On 4/13/2016 8:15 AM, Mark Brown wrote:
>+static void st_get_satinize_powerup_voltage(struct st_vsense *vsense)
>+{
>+ void __iomem *ioaddr = vsense->ioaddr;
>+ u32 value = readl_relaxed(ioaddr);
>+
>+ dev_dbg(vsense->dev, "Initial start-up value: (0x%08x)\n", value);
>+
>+ /* Sanitize vo
ys helpful.
tools work but indeed should be extended to support more for QoS.
This is another task we have to keep in mind, well spot.
Peppe
Regards,
Ozgur
21.11.2016, 16:38, "Giuseppe CAVALLARO" :
Hello Joao
On 11/21/2016 2:48 PM, Joao Pinto wrote:
Synopsys QoS IP is a separated
Hello Joao, Lars.
On 11/22/2016 3:16 PM, Joao Pinto wrote:
Ok, it makes sense.
> Just for curiosity the target setup is the following:
> https://www.youtube.com/watch?v=8V-LB5y2Cos
> but instead of using internal drivers, we desire to use mainline drivers only.
>
> Thanks!
Regarding this subjec
On 1/27/2017 11:23 AM, Alexey Brodkin wrote:
That's why my initial proposal was to ignore whatever we read from this register
if we have MDIO bus instantiated already.
sorry for my late reply, I agree with this approach, according to the
HW and platform configuration the driver has to understan
Hello Corentin
On 1/31/2017 10:11 AM, Corentin Labbe wrote:
Hello
I am currently working on dwmac-sun8i glue driver for Allwinner H3/A83T/A64.
This serie is the result of all minor problem found in the stmmac driver.
thank for this effort, many changes are to tidy up some part of the code
so
On 1/31/2017 10:11 AM, Corentin Labbe wrote:
The bus_setup function pointer is not used at all, this patch remove it.
indeed this was used and documented on some previous kernels where some
ST40/SH4 platforms (w/o DT).
It's ok to remove it in the new MAC generation; I do not think that
ST will
On 1/31/2017 10:11 AM, Corentin Labbe wrote:
Checkpatch complains about some code style problem on stmmac_mdio.c.
This patch fix them.
Signed-off-by: Corentin Labbe
Acked-by: Giuseppe Cavallaro
---
drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c | 7 ---
1 file changed, 4 insertions
On 1/31/2017 10:11 AM, Corentin Labbe wrote:
As said by checkpatch ENOSYS means 'invalid syscall nr' and nothing
else.
This patch replace ENOSYS by the more appropriate value EINVAL.
Signed-off-by: Corentin Labbe
Acked-by: Giuseppe Cavallaro
---
drivers/net/ethernet/stmi
On 1/31/2017 10:11 AM, Corentin Labbe wrote:
This patch rewrite two test against NULL value with correct style.
Signed-off-by: Corentin Labbe
Acked-by: Giuseppe Cavallaro
---
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff
On 1/31/2017 10:11 AM, Corentin Labbe wrote:
Add 1000 as a valid speed in the error message about invalid speed
in stmmac_adjust_link()
Signed-off-by: Corentin Labbe
---
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/driver
Labbe
Acked-by: Giuseppe Cavallaro
---
drivers/net/ethernet/stmicro/stmmac/common.h | 2 +-
drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c | 2 +-
drivers/net/ethernet/stmicro/stmmac/enh_desc.c | 2 +-
drivers/net/ethernet/stmicro/stmmac/norm_desc.c | 2 +-
drivers/net
On 1/31/2017 10:11 AM, Corentin Labbe wrote:
When a PHY is found, printing which one was found (and which type/model) is
a good information to know.
Signed-off-by: Corentin Labbe
---
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/n
On 1/31/2017 10:11 AM, Corentin Labbe wrote:
The u64 x variable in sysfs_display_ring is unused.
This patch remove it.
Signed-off-by: Corentin Labbe
well spot
Acked-by: Giuseppe Cavallaro
---
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 3 ---
1 file changed, 3 deletions
On 1/31/2017 10:11 AM, Corentin Labbe wrote:
checkpatch complains about two unsigned without type after.
Since the value return is u32, it is simpler to replace it by u32 instead
of "unsigned int"
Signed-off-by: Corentin Labbe
Acked-by: Giuseppe Cavallaro
---
drivers/ne
On 1/31/2017 10:11 AM, Corentin Labbe wrote:
The stmmac driver run TX completion under NAPI but without checking the
work done by the TX completion function.
This patch add work/budget to the TX completion function.
The visible effect is that it keep the driver longer under NAPI and
boost perfo
On 1/31/2017 11:23 AM, Joao Pinto wrote:
Hi Peppe,
Às 10:00 AM de 1/31/2017, Giuseppe CAVALLARO escreveu:
Hello Corentin
On 1/31/2017 10:11 AM, Corentin Labbe wrote:
Hello
I am currently working on dwmac-sun8i glue driver for Allwinner H3/A83T/A64.
This serie is the result of all minor
On 1/31/2017 10:11 AM, Corentin Labbe wrote:
the define MAC_RNABLE_RX have a typo, rename it to MAC_ENABLE_RX
Signed-off-by: Corentin Labbe
Acked-by: Giuseppe Cavallaro
---
drivers/net/ethernet/stmicro/stmmac/common.h| 2 +-
drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c | 4 ++--
2
consider my:
Acked-by: Giuseppe Cavallaro
---
drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c | 33 ---
1 file changed, 11 insertions(+), 22 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
On 1/31/2017 10:11 AM, Corentin Labbe wrote:
This patch fix some typos in comments.
Signed-off-by: Corentin Labbe
Acked-by: Giuseppe Cavallaro
---
drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c | 6 +++---
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 16
On 1/31/2017 11:39 AM, Corentin Labbe wrote:
On Tue, Jan 31, 2017 at 11:13:49AM +0100, Giuseppe CAVALLARO wrote:
On 1/31/2017 10:11 AM, Corentin Labbe wrote:
The stmmac_mdio_busy_wait() function do the same job than
readl_poll_timeout().
So is is better to replace it.
Signed-off-by: Corentin
On 1/31/2017 10:11 AM, Corentin Labbe wrote:
Since commit cf32deec16e4 ("stmmac: add tx_skbuff_dma to save descriptors used by
PTP"),
the struct dma_desc *p in stmmac_tx_clean was not used at all.
This patch remove this dead code.
Signed-off-by: Corentin Labbe
Acked-by: Giuseppe
Hello Alexey
On 1/31/2017 2:24 PM, Alexey Brodkin wrote:
Hi Giuseppe,
On Tue, 2017-01-31 at 10:55 +0100, Giuseppe CAVALLARO wrote:
On 1/27/2017 11:23 AM, Alexey Brodkin wrote:
That's why my initial proposal was to ignore whatever we read from this register
if we have MDIO bus instant
Hello Tien Hock
On 6/21/2016 10:46 AM, th...@altera.com wrote:
From: Tien Hock Loh
This adds support for TSE PCS that uses SGMII adapter when the phy-mode of
the dwmac is set to sgmii
Signed-off-by: Tien Hock Loh
IIUC, you are keeping the two timers w/o looking.
Is there any motivation be
On 6/23/2016 3:38 AM, Tien Hock Loh wrote:
Hi Peppe,
On Wed, 2016-06-22 at 11:00 +0200, Giuseppe CAVALLARO wrote:
Hello Tien Hock
On 6/21/2016 10:46 AM, th...@altera.com wrote:
From: Tien Hock Loh
This adds support for TSE PCS that uses SGMII adapter when the phy-mode of
the dwmac is set
Hello Tien Hock
On 6/9/2016 7:48 AM, Tien Hock Loh wrote:
[snip]
.../devicetree/bindings/net/socfpga-dwmac.txt | 4 +
drivers/net/ethernet/stmicro/stmmac/Makefile | 2 +-
.../net/ethernet/stmicro/stmmac/dwmac-socfpga.c| 140 +--
drivers/net/ethernet/stmicro/stmmac/t
Hello Tien Hock
On 6/10/2016 8:12 AM, Tien Hock Loh wrote:
Yeah the PCS support for TSE is Altera. To avoid confusion, let's rename
> > them, would altr_tse_pcs.[hc] be good? I don't think creating a
> > sub-directory with only 2 files is necessary though.
>
> ok for two files w/o sub-dir.
>
>
Hello Vincent
On 6/10/2016 1:00 AM, Vincent Palatin wrote:
On Wed, Jun 8, 2016 at 5:17 PM, Andrew Lunn wrote:
On Wed, Jun 08, 2016 at 03:25:38PM -0700, Vincent Palatin wrote:
On Tue, Jun 7, 2016 at 12:23 AM, Giuseppe CAVALLARO
wrote:
Hello
On 6/3/2016 7:29 PM, Vincent Palatin wrote:
Do
so be refactored out as well for consistency purposes.
yes agree.
Just an info to better understand the case; after enabling the SGMII on
Altera, do you test in some way the PCS SGMII mode in the main layer?
Regards
Peppe
Thanks
On Fri, May 13, 2016 at 3:47 PM, Giuseppe CAVALLARO
wrote:
Hello Tien
Hello Rayagond !
On 10/27/2016 12:25 PM, Rayagond Kokatanur wrote:
+static int dwmac4_wrback_get_rx_timestamp_status(void *desc, u32 ats)
> {
> struct dma_desc *p = (struct dma_desc *)desc;
> + int ret = -EINVAL;
> +
> + /* Get the status from normal w/b descriptor */
> +
On 11/15/2016 8:19 PM, Florian Fainelli wrote:
Utilize the generic phy_ethtool_nway_reset() helper function to
implement an autonegotiation restart.
Signed-off-by: Florian Fainelli
Acked-by: Giuseppe Cavallaro
---
drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c | 1 +
1 file changed
me "stmmac:" print since
this will be a duplicate with that dev_xxx displays.
Signed-off-by: Corentin Labbe
Thanks for these changes.
Acked-by: Giuseppe Cavallaro
---
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 204 --
drivers/net/ethernet/stmicro/stmmac
is present.
Patch also adds some extra netdev_(debug/inof) to better
dump the configuration.
Signed-off-by: Giuseppe Cavallaro
Cc: Alexandre TORGUE
Cc: Rayagond Kokatanur
---
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 17 -
1 file changed, 12 insertions(+), 5 deletions
1 - 100 of 176 matches
Mail list logo
